MAI COMPANY CONFIDENTIAL FIELD INFORMATION BULLETIN SERVICE GROUP(S): MINI MFG: BASIC FOUR NACS TYPE(S): 4103,4106,4107,4109, MFG. MODEL(S): 7xxx,8xxx,9xxx,ASxx . 4122,4123,4126 CATEGORY: CPU DESC: MPx & ASx SERIES *** TABLE OF CONTENTS AS OF 09/23/96 *** FIB 00001.General Information.........................................12/13/88 FIB 00002.One.megabyte memory board cautions..........................08/24/83 FIB 00003.Backplane ground strap installation caution.................08/24/83 FIB 00004.LS700 power supply with low +5 VOLTS or "OVP" problem.......08/24/83 FIB 00005.New style MDI PCBA is interchangable with the old style.....09/23/83 FIB 00006.IMLC disappears from device table after DOWN.LOAD is run....09/23/83 FIB 00007.Determining memory address in 128,10x,1,xxx four-tuples.....10/26/83 FIB 00008.New controllers will work in both 810 and 8000 CPUs.........11/02/83 FIB 00009.ACS PCBA below LARL can cause 280X ERRORS on REMIDI.........02/28/84 FIB 00010.Field kit available to install air filters..................02/28/84 FIB 00011.Device Subtype switches on shared memory controllers........02/28/84 FIB 00012.MDI memory TIME-OUT ERRORS while running REMIDI.............03/09/84 FIB 00013.Removable disk drives will not start when online............03/09/84 FIB 00014.System dumps when attempting to restore system tape to disk.03/20/84 FIB 00015.Cpu memory and disk read/write failures.....................03/20/84 FIB 00016.New style control panel information (features and part numbe04/02/84 FIB 00017.New fixed disk control panel to prevent rotary switch breaka05/25/84 FIB 00018.Deleted.....................................................07/17/90 FIB 00019.Installation instructions for the BMTC controller...........06/14/84 FIB 00020.Old.BOOT PROMs cause BOOT failure if four TDP's are present.07/02/84 FIB 00021.System hangs with MEMORY TIME-OUT on MDI, cannot force a dum07/02/84 FIB 00022.New style locking type cable end covers available...........09/13/84 FIB 00023.BOOTSTRAP ERRORS F01A and/or system jumps into monitor mode.09/24/84 FIB 00024.Depopulated protected power supply (PPS II) information.....11/05/84 FIB 00025.New artwork 1 MEG memory board information..................11/05/84 FIB 00026.Memory PCBA count restrictions for power supply checking....12/20/84 FIB 00027.Unsuccessful power failure recovery - prior to REL 8.4B....01/16/85 FIB 00028.Floating point math software gives different results than 1302/20/85 FIB 00029.Boot strap and memory errors can be caused by LS700 power su02/22/85 FIB 00030.MDI clock fix for 28,1,1,16 dumps...........................08/06/87 FIB 00031.ERROR 65, File Lacks Integrity - on Releases 8.4A and 8.4B..03/11/85 FIB 00032.False ERROR 2 can occur on Releases 8.4A and 8.4B...........05/20/85 FIB 00033.Incorrect disk status on Type III load, disk to disk copy...06/17/85 FIB 00034.Schematics for 8000 new & old style control panels..........07/22/85 FIB 00035.Mechanical problems with CPU control panels.................07/24/85 FIB 00036.SAVERESTORE slowdown with BMTC installed....................07/24/85 FIB 00037.Miscellaneous problems due to ACS PCBA being below LARL.....08/15/85 FIB 00038.BMTC PROM update to allow booting from 1/2" tape drive......10/22/85 FIB 00039.ECN to fix BMTC parity errors during power fail recovery....11/11/85 FIB 00040.Incomplete power fail recovery - prior to Release 8.5A......11/18/85 FIB 00041.BMTC board location restrictions............................01/13/86 FIB 00042.BMTC Parity light during power fail recovery................01/28/86 FIB 00043.TDP/MPC switch setting for DMP printer (Releases 8.5A & late02/04/86 FIB 00044.MPC PCBA switch settings....................................03/06/86 FIB 00045.7000 System preliminary information & electrical requirement03/06/86 FIB 00046.New version of 4MB memory board.............................03/06/86 FIB 00047.Random dumps or miscellaneous failures......................04/03/86 FIB 00048.LS700 power supply ECN to increase -12 Volts current capacit04/03/86 FIB 00049.ECN to upgrade current capacity of -12V on UPPS P/S (convert04/03/86 FIB 00050.New version NIMLC (903534-001)..............................05/01/86 FIB 00051.New size of boot PROMS on AMS PCBA (9000) are now 4K........05/01/86 CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------Table Of Contents Pg01 of 04 FIB 00052.Minimum revision levels for 8000 to 9000 upgrade............05/10/86 FIB 00053.Incorrectly logged Cache Parity errors - 9000 series on REL 06/17/86 FIB 00054.Presite survey for MPx 80XX to MPx 9XXX field conversion....10/12/87 FIB 00055.Dump with 1,4,128,48 four-tuple on MPx 7000 system..........08/22/86 FIB 00056.Cautions and information on the Revision "S" MCS PCBA.......08/22/86 FIB 00057.9000/9500 Systems board placement information...............09/22/86 FIB 00058.9XXX won't load, hangs or dumps with 2,10,3,3 - 1,137,0,3 4-10/01/86 FIB 00059.REMIDI now has test for 2,10,x,x dumps on 9XXX Systems......10/01/86 FIB 00060.Systems hangs, disk off line, slow disk image backup - 9000 10/30/86 FIB 00061.Dumps with 28,255,0,0 four-tuple on 8.4E,8.5D/9.5D..........10/30/86 FIB 00062.LS-700 or UPPS-100 adjustment/balancing on multi-frame CPU's05/27/87 FIB 00063.Y-bus display and controller self-test instructions and info12/02/86 FIB 00064.DUMPTOFILE - CRASH INFO interpretation......................12/09/86 FIB 00065.Error Log - Interpretation of the Memory Errors Summary Repo12/13/88 FIB 00066.Do not format any but 5 1/4" disks with ECC option on DIVE..06/01/87 FIB 00067.New style IDC PCBA allows greater than 12MB main memory on 901/05/87 FIB 00068.System slowdowns/hangs won't load - caused by unterminated c01/13/87 FIB 00069.Power supply loading and PCBA placement restrictions/informa01/30/87 FIB 00070.System will not load from any source; no bootstrap error....02/03/87 FIB 00071.Memory PCBAs must be at Rev J for addressing above 12MB.....02/09/87 FIB 00072.CPU switch settings for the new style ESTK PCBA.............02/26/87 FIB 00073.0,12,500,0 four-tuple while running ORIGIN Rel 2.0..........02/26/87 FIB 00074.MPx 9xxx Series Helpful Hints...............................05/20/87 FIB 00075.Switch setting clarification for IMLC P/N 903534-001........02/27/87 FIB 00076.Line Conditioner Notes......................................03/10/87 FIB 00077.Cautions on LS700 P/S - Intermittent CPU problems...........03/11/87 FIB 00078.+12 Volts crowbars in the LS700 with modems/multiplexors att03/30/87 FIB 00079.REMIDI may show false errors on 9500 Systems................03/30/87 FIB 00080.AC wiring problem in the 7100/9100 ACDU - ECN instructions..04/14/87 FIB 00081.DEMON DMA/Disk test may give false errors on 9xxx Series....04/22/87 FIB 00082.IDC-64 PCBAs must be at Rev E to prevent data corruption....04/22/87 FIB 00083.REMIDI VERSION 6.01.04 is available for 2,10,x,x fourtuples.04/22/87 FIB 00084.Important information on DC grounding/ground loops..........05/20/87 FIB 00085.Potential cut cable on 71X0/91X0 Systems....................06/04/87 FIB 00086.Top panel interferes with control panel cable on 71X0/91X0..06/04/87 FIB 00087.MPx 9000 series systems failing to recognize IMLC Controller07/01/87 FIB 00088.Priam 14" disk drives will not spin-up......................08/05/87 FIB 00089.Three different ACS PCBAs - difference details..............08/11/87 FIB 00090.MCS and Terminator PCBAs must be updated for 16MB memory PCB08/11/87 FIB 00091.SMDII defect may cause load failure, disk offline and read e07/12/88 FIB 00092.MPx 7100 Series Hardware Announcement.......................08/11/87 FIB 00093.MPx 9100 Series Hardware Announcement.......................08/11/87 FIB 00094.Configuration record compatibility and display information..08/11/87 FIB 00095.System halts, hangs, other intermittant problems............08/11/87 FIB 00096.Caution for adding disk(s) to 7XXX system...................11/16/88 FIB 00097.System dumps with Four-tuples 1,0,X,5 or 1,0,X,6............08/31/87 FIB 00098.Voltage Program Connector (110 or 220 Volts) for MM893000 UP09/22/87 FIB 00099.Step-by-step 8xxx to 9xxx upgrade procedure.................10/12/87 FIB 00100.IMLC set-up information.....................................10/12/87 FIB 00101.9xxx system getting FD20 or F4xx error during boot..........11/30/87 FIB 00102.Requirements for support of greater than 12 MB main memory (10/30/87 FIB 00103.Caution.for creating system dump tapes on the GCR tape drive10/30/87 FIB 00104.Information for sending dump tapes to Basic Four............10/30/87 FIB 00105.Requirements for support of 16 meg memory PCB P/N 903261....08/31/88 FIB 00106.Dumps 2,10,1,65 & 2,10,1,25 due to AMS, REMIDI revised to ca12/02/87 FIB 00107.8/9.6 system dump problem due to operator changing prefix...12/11/87 FIB 00108.8/9.6 operating system problem running NEWX.................12/11/87 FIB 00109.Problem with DEMON on 9.6B O.S..............................03/23/88 FIB 00110.Method to prevent VDT's from logging on.....................03/24/88 FIB 00111.ERROR 2 file full problems [ WPSF 431 ].....................03/28/88 FIB 00112.Updated rule of thumb for memory sizing [ WPSF 433 ]........03/28/88 FIB 00113.ACS problem may cause Hangs/Dumps or load failure [ WPSF 43803/28/88 CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------Table Of Contents Pg02 of 04 FIB 00114.MPx 9400/9600 Systems Hardware Announcement [ WPSH 19 ].....04/20/89 FIB 00115.System hangs while running DOWN.LOAD on 9.6A/B [ WPSF 443 ]04/19/88 FIB 00116.IMLC 903534-001/REV L won't work in an 810 System [ WPS 444 04/20/88 FIB 00117.DMA Rev P released for DISK OFFLINE problems [ WPS 447 ]...04/20/88 FIB 00118.Spare.Keyswitch Miswired - Causes Failure to Load [ WPS 46306/01/88 FIB 00119.Memory Dump Decoding Information [ WPS 465 ]...............09/18/91 FIB 00120.Excessive ID/Data CRC errors [ WPS 467 ]...................06/01/88 FIB 00121.CACHE Errors Logged During the Load Process [ WPSF 481A ]..02/08/89 FIB 00122.Excessive ECC Errors - BMTC Wiring Error [ WPSF 503 ]......12/22/88 FIB 00123.Dumps/Hangs and Strange System Problems due to Incorrect Jum09/14/88 FIB 00124.Things a Customer should do after every Dump................08/16/88 FIB 00125.Code Cache Disabled [ WPSF 476 ]...........................08/16/88 FIB 00126.DMAIII Requires New -5 Volt Power Supply....................10/12/88 FIB 00127.Non-MBF SCSI Disks will not Work on 94xx Systems [ WPSF 492A03/22/90 FIB 00128.Dump Report Form [ WPSF 496C ].............................01/25/95 FIB 00129.Do Not overlook Drive Terminators when troubleshooting disk 11/01/88 FIB 00130.Updated Procedure for Adjusting LS700 Power Supplies [WPSF 310/15/93 FIB 00131.IMLCs not recognized at Boot with two IMLCs present on 9xxx 11/18/88 FIB 00132.Parts list for adding on a second 5 1/4" Disk drive to a 7xx11/30/88 FIB 00133.Information on the LS700 Power Supply.......................12/09/88 FIB 00134.MPx 94xx Systems Hardware Status Word Definitions [ WPS 50412/28/88 FIB 00135.Potential DATA DESTRUCTION when Disk Controllers are replace12/30/88 FIB 00136.Drive Seq. & Status Cabling Errs in DMA-III Manual [ WPSF 5410/25/89 FIB 00137.System Cooling - LowBoy Cabinets [ WPSF 533 ] .............05/12/89 FIB 00138.1/4" Streamer Tape Boot only Supported on 71xx & 94xx System01/30/89 FIB 00139.System.Hangs & Pow. Fail Recovery Fails - Lowboy Cabinet MPX01/30/89 FIB 00140.System Dumps on Print Jobs..................................01/30/89 FIB 00141.Upgrade Advanced Series to Wide Backplane (22 SLOT).........02/24/89 FIB 00142.Loading.with a Bad Membrane/Overlay.........................02/24/89 FIB 00143.Incorrect Memory Err Logging - 8/9/10.6E Errorlog [ WPSF 5407/27/89 FIB 00144.General Installation Guide..................................04/17/89 FIB 00145.General Upgrade & Installation Flow Chart...................04/17/89 FIB 00146.DMA III PCBA P/N 903679 CRC vs ECC format options [WPS 530].04/18/89 FIB 00147.LS 700 Wire Harness Interference............................05/02/89 FIB 00148.Dumps 1,255,255,6 (ESTK failures) caused by ripple on LS-70005/09/89 FIB 00149.SCSI M280 Drives Display Incorrect # of Total Sectors [ WPSF05/12/89 FIB 00150.Excessive Tape Errs in ERRORLOG - Status 80000204 [ WPSF 5305/12/89 FIB 00151.PROBLEMS WITH ADVANCED SREIES UPGRADE ON LO BOY CA(Text Inco10/28/89 FIB 00152.Bad Chips on Stache.........................................06/21/89 FIB 00153.Info - New Style/Old Style Power Adapter for MPx 7000.......06/12/89 FIB 00154.MPx Checkist................................................06/21/89 FIB 00155.Bad Math on BASIC, Using Masks..............................06/26/89 FIB 00156.8/9.E Errorlog Problem......................................07/17/89 FIB 00157.Check Batteries when checking Power Supplies................07/18/89 FIB 00158.Advanced Series 20 Model 21 Configuration & Spare Parts Matr11/11/92 FIB 00159.Part Number for Batteries in Protected P/S..................07/26/89 FIB 00160.Problems Formatting 5-1/4" Drives on 7xxx Systems [ WPSF 5407/27/89 FIB 00161.SMDI and SMDII Differences [ WPSF 547 ]...................08/01/89 FIB 00162.Advanced Series - 40/60 Hardware Announcement [ WPSH 22 ]..08/02/89 FIB 00163.Caution when Testing MCS Tape DR. on MPx....................08/07/89 FIB 00164.DMA 2 GETS RED LIGHTS AFTER COLD START......................08/28/89 FIB 00165.Clarification of the System Time Functions .................08/31/89 FIB 00166.The MCS board does not support protocol using DTR switching.09/12/89 FIB 00167.DMA-II Jumper Settings Incorrect in Various Manuals [ WPSF 10/26/89 FIB 00168.SCSI DIVE Notes & Cautions [ WPSF 555 ]....................10/26/89 FIB 00169.Dumps,.Mem Timeouts, Notes on NEP,STACHE, Mem PCBAs [ WPSF 10/26/89 FIB 00170.LEDs On During System Start-up [ WPSF 562 ]................10/26/89 FIB 00171.Advanced Series 20 Hardware Announcement [ WPSH 25 ].......10/31/89 FIB 00172.System time reverting to 00:00:00...........................11/01/89 FIB 00173.SPLIT.BACKPLANE UPGRADES !!!!!!.............................11/20/89 FIB 00174.Advanced Series 20 Installation Requirements [ WPSF 568R ].01/17/90 FIB 00175.BMTC Rev. "AA" not working on AS System.....................11/28/89 CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------Table Of Contents Pg03 of 04 FIB 00176.System 7000 Tape Errs, Disk Goes Off Line...................12/14/89 FIB 00177.Control Panel Modification Monitors +5V [ WPSF 582 ].......01/17/90 FIB 00178.Upgrade Problems from AS-41 (Split-backplane) to larger AS S02/07/90 FIB 00179.DMA III PCBA's corrupting data (Quick Test).................02/09/90 FIB 00180.MTCS.(1/4" SCSI) in SAVERESTORE, then ESC can cause system d05/23/90 FIB 00181.Incorrect 16-way Switch Settings in AS 20 & 40/60 Service Ma07/17/90 FIB 00182.1,x,y,6 Memory Parity Dumps - P/N 903621-xxx PCBAs [ WPSF 608/24/90 FIB 00183.BMTC at Rev. AB goes offline May Cause Dumps/Hangs [ WPSF 608/24/90 FIB 00184.1/2" MTS Tape Boot Fails with Bootstrap Error E086..........08/31/90 FIB 00185.P/N for Rubber Shock Mounts for 5 1/4" Disk Drives on a 700010/11/90 FIB 00186.Hardware Flow Control Available on M.6H [ WPSF 622 ].......10/11/90 FIB 00187.System Hangs/Dumps/Drive Offline in SAVERESTORE [ WPSF 63010/11/90 FIB 00188.BMTC/GCR Data Integrity [ WPSF 636 ].......................11/28/90 FIB 00189.+12 V. Crowbars in LS700 PS with Xyplex Terminal Server Atta01/29/91 FIB 00190.Temporary System Hangs, Disk Errs Logged with no Status - AS08/01/91 FIB 00191.SCSI Device Termination.....................................07/05/91 FIB 00192.Power Supply Sequencing & Testing Information...............07/09/91 FIB 00193.ASx Series Mem Parity & Timeout Dump Analysis [WPSF 465A1]..09/18/91 FIB 00194.ISDC Cable Present Jumpering & ISDC Interface Signal Pin-out03/03/92 FIB 00195.Number.of Alternate Tracks Allowed on MPx/ASx Disk Drives...04/16/92 FIB 00196.Disk not recognized by system after disk replacement........02/01/93 FIB 00197.Unable to mount fixed disk after OS upgrade to R7B..........05/25/93 FIB 00198.5 1/4" Disk Not Ready & Data Errors.........................06/02/93 FIB 00199.1.X.GB 3.5 INCH DISKS.......................................03/07/94 FIB 00200.1.7GB Disk Drive Patch for BOSS/VS..........................06/21/94 FIB 00201.Release R7B Dive Docwriter File.............................02/26/96 FIB 00202.5 GB SCSI 1/4" MTCS - requires DMA II - 003.................07/23/96 CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------Table Of Contents Pg04 of 04 FIB 00001 12/13/88 *** General Information *** For information on minimum and maximum hardware configurations, see the BOSS/VS Software Announcement at the release that applies. When hardware configurations are enhanced/changed, the details are covered in the Software Announcement in which the change(s) occur. Hardware configurations are model dependent. ------------------------------------------------------------------------------- *** NACS MACHINE TYPES AND FEATURE NUMBERS *** 4103,4123,4310,4315,4320,4325,4330,4411,4412,4421,4422,4423,4424 4310 = 8010, one processor 4315 = 7010, one processor 4320 = 8020, two processors 4325 = 7020, two processors 4330 = 8030, three processors 4471 = 71X0 SYSTEMS 4411 = 9010, one processor 4424 = 91X0 SYSTEMS 4412 = 9020, two processors 4103 = 94X0 SYSTEMS 4421 = 9510, one processor 4422 = 9520, two processors 4423 = 9530, three processors 4123 = ASxx, Advanced Systems, all models *** L.A.R.L. INFORMATION *** A complete LARL listing is maintained in the MPx Handbook F.I.B. #7. *** AVAILABLE DOCUMENTATION *** Sorbus Environmental Handbook ...................................S-HDBK-027 MPx Series Service Manual ..(order from Basic Four)............. M8111 8000 System Service Manual, Two Volume set...................... S-HDBK-B35 8000 System Handbook............................................ S-HDBK-B36 8000 Operators Guide............................................ S-HDBK-??? BOSS/VS Support Manual.......................................... S-HDBK-B37 BOSS/VS Installation Guide...................................... S-HDBK-B39 BOSS/VS Command Language Quick Reference Card................... S-HDBK-B64 BOSS/VS Business Basic Quick Reference Card..................... S-HDBK-B65 BOSS/VS Business Basic Reference Manual......................... S-HDBK-282 BOSS/VS Utilities User's Guide.................................. S-HDBK-253 MPX 9000 and 9500 Series Service Manual, Two Vol set............ S-HDBK-B74 MPX 7000 Fixed Disk Installation Guide (order from Basic Four).. M8076 MPX Series IMLC Controller (order from Basic Four).............. M8098 DMA Controller Service Manual .................................. S-HDBK-B82 Micro Peripheral Controller Service Manual (order from B/4)..... M8154 BMTC Controller Service Manual (order from Basic Four).......... M8156 Service Manual Corrections: The 14" Priam address switch (8J) settings in Vol I of Manual M8101 page 2-41 are incorrect, use the following chart: Drive Address 8J O=open/off C=closed/on 8 7 6 5 4 3 2 1 - switch position CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB001 Pg001 O C O O O C C C - Drive 0 O C O O O C C O - Drive 1 O C O O O C O C - Drive 2 O C O O O C O O - Drive 3 O C O O O O C C - Drive 4 O C O O O O C O - Drive 5 O C O O O O O C - Drive 6 O C O O O O O O - Drive 7 X X X C X X X X - Diagnostic Mode X O X X X X X X - Enable Write Protect MPx 7100 Series Service Manual, M8111A, page 2-23, table 2-11 is in error. Table 2-11 is for MPC controller P/N 903546-xxx only. The correct switch settings for the Model 4513 (169MB - M190) are as follows: DISK 0 DISK 1 SW3-1 SW3-2 SW3-3 SW3-4 SW3-5 SW3-6 SW3-7 SW3-8 O O C O O O C O DISK 2 DISK 3 SW4-1 SW4-2 SW4-3 SW4-4 SW4-5 SW4-6 SW4-7 SW4-8 See MPx Handbook FIB #7 for complete PCBA switch setting information. O O C O O O C O ** NOTE ** See Basic/Four cable category F.I.B. for system cable data. *** AVAILABLE TRAINING *** Formal training is available at either of the Sorbus education centers. Currently the class run approximately four weeks and includes 7000/8000/9000. See the education guide for more information. *** SPECIAL TOOLS *** PART NO. DESCRIPTION PART NO. DESCRIPTION ------------------------------------- ---------------------------------------- MM890140....PCB Extender MM899220....8-way self test -A PROM MM896120....BMTC loopback cable MM899340....Diagnostic display PCBA MM896130....BMTC loopback plug MM899410....810B PROMIDI PCBA MM899170....IMLC XCOM loopback cable MM899420....8-way diag. loopback cable MM899180....IMLC ICOM loopback cable MM899450....ACS loopback cable MM899190....IMLC ACU loopback cable MM899460....MCS self test LP cable MM899195....IMLC (new style) loopback MM899200....8-way loopback cable *** A/C POWER CONNECTOR INFORMATION *** * NOTE * All units require 120 VOLTS A/C except the T-303 Disk Drive. Each mainframe ACDU requires one 20 AMP, NEMA L5-20R receptacle. Each 8" fixed media disk drive ACDU requires one 15 AMP, NEMA L5-15R receptacle. Each 14" fixed media disk drive ACDU requires one 15 AMP, NEMA L5-15R receptacle Each T-83 disk drive requires one 15 AMP, NEMA L5-15R receptacle. Each T-303 disk drive requires one 15 AMP, 208/240 VOLT, NEMA 6-15R receptacle. A standard 7000 System will have one MCS tape drive and one 5 1/4" disk drive. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB001 Pg002 If these is only one each of these two units, their power will be supplied from the CPU's leftmost LS-700. With the addition of a second 5 1/4" disk drive, an ACDU will be required in the bottom of the MCS/DISK frame. This ACDU will then require one 15 AMP, NEMA L5-15R receptacle. Refer to the 8000 Installation Planning Guide for other specific information. *** SPECIAL ADMINISTRATIVE PROCEEDURES *** For lock and key authorization phone numbers and hours of coverage reference FIB 00005 in the General, Basic Four, Administrative Procedures FIB group. After installation of an MPX system and before releasing the system to the customer,the following is required: 1. Check that all O.S. and W.C.S. slots can be loaded from properly, verifying that DEMON, REMIDI and the alternate loads work. 2. Get a four-tuple listing printed for on-site storage. This is done by submitting the ERRORS.LIST file. 3. Use DOCWRITER to print a complete diagnostic manuals listing to be kept with the four-tuple listing. 4. Insure that all Basic Four manuals were shipped for all the hardware installed. If any are missing, contact Basic Four Customer Satisfaction and request shipment of them. Most of the service manuals are also available from the Technical Publications Library in K.O.P. 5. Initiate a system log to be kept on site. 6. Place a correctly marked LARL label inside the system log. It is also advisable to mark the revision level on the upper extraction lever of each PCBA. ORIGINATOR: H. Mitchell/N. Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB001 Pg003 FIB 00002 08/24/83 *** One megabyte memory board cautions *** 1. SWITCH SETTINGS: General switch settings are outlined in the appropriate service manuals as well as a previous Mini Alert. It should be emphasized however, that position ONE on the dip switch must be set to OPEN (set to a "1"). Failure to correctly set position one on .5 Meg boards will cause the first half (256K) to generate parity errors, it is also possible that other memory boards in the system will appear to be getting parity errors. 2. CONVERTING ONE MEGABYTE MEMORIES Under certain circumstances it may be necessary to convert one megabyte memory boards (BFISD P/N 903349-00X) from 810 (200 ns) use to series 8000 (160 ns) use. Conversion of a memory board entails replacing two delay lines with different delay lines and moving a jumper. Use caution when replacing delay lines to avoid bending pins and, above all, installing them backwards. The "dot" which indicates pin 1 is not always easy to see.. be sure and locate this dot. Delay lines should be installed. so that the dot faces the jumper posts (at location 3E). CAUTION: Delay lines will be damaged if installed backwards. One megabyte memory boards are "versionized" as follows: Configuration 810 Version Series 8000 Version 1 MB with ECC _ 903349-001 _ 903349-005 1 MB with PARITY _ 903349-002 _ ** DISALLOWED ** .5 MB with ECC _ 903349-003 _ 903349-004 .5 MB with PARITY _ 903349-004 _ ** DISALLOWED ** DELAY LINES Location 5C _ 150 ns _ 120 ns - P/N 155002-002 _ P/N 155002-001 Location 6C _ 250 ns _ 200 ns - P/N 155002-004 _ P/N 155002-003 JUMPER _ 1 to 2 _ 2 to 3 - 200 ns _ 160 ns NOTE: ONLY ECC VERSIONS ARE BEING SPARED ORIGINATOR: I. LEIBOWITZ CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB002 Pg001 FIB 00003 08/24/83 *** Backplane ground strap installation caution *** In multi-mainframe systems it is necessary to tie the backplane grounds together. The grounds are tied together at the top, between the backplanes, and at the bottom, between the backplanes. The upper strap may easily be installed "backwards" so that the +5 volts and +5 return (ground) are shorted together. At this time the upper strap (P/N 907316-001) is not marked as to which end goes where. The upper ground strap MUST be installed such that the end which fits on TWO studs goes ON THE RIGHT HAND backplane when viewed from the rear of the card cages (i.e., the end with two holes goes to the primary mainframe). DRAWING INFORMATION: See Mini Alert 178 hardcopy for drawing. ORIGINATOR: I. LEIBOWITZ CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB003 Pg001 FIB 00004 08/24/83 *** LS700 power supply with low +5 VOLTS or "OVP" problem *** SYMPTOM: 1. Can't adjust +5 volts above +4 volts. 2. LS700 shows "OVP" for no apparent reason. FIX: 1. If the unprotected +5 volts will not come up to full voltage and neither the margin switch or the +5 volts adjustment pot correct the situation, the problem may be the result of a missing/broken fiber washer. There is supposed to be a fiber washer between the PCB and the lug located above J17, near the sequence out connector. Replace the broken or missing washer and adjust the +5 volts. 2. There are only two carrying +5 volts and return to the backplane bus bar. If a connection from the LS700 bus to the backplane bus bars becomes loose, the power supply to over-voltage protection (there is a seconary circuit within the LS700. Before adjusting the voltages to cure the "OVP" problem, check the bus bar connections. ORIGINATOR: I. LEIBOWITZ CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB004 Pg001 FIB 00005 09/23/83 *** New style MDI PCBA is interchangable with the old style *** A new MDI board, BFISD P/N 903408-001, will be replacing the current MDI board,. BFISD.P/N 903361-001. The new board encompasses an artwork "clean-up" and adds testability for the factory. For the field, these two boards are entirely interchangeable and the same ICN number is applicable to both. ORIGINATOR: I. LEIBOWITZ CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB005 Pg001 FIB 00006 09/23/83 *** IMLC disappears from device table after DOWN.LOAD is run *** Running the program DOWN.LOAD on a IMLC can cause the IMLC to disappear from devices. If running DOWN.LOAD is unsuccessful, the IMLC will disappear from devices. The system has to be re-booted in order for it to re-appear. Some causes for an unsuccessful DOWN.LOAD can be open and/or read errors on files needed for the process. The files used are dependent on how the IMLC is configured in TERM.CONFIG. DataWord uses WPAPA and ICMOS, TBC uses TBCA for Port A and TBCB for Port B, 3270 uses NP3270 and NOA for Port A and NOB for Port B. All of these files are located under the .Rxx.SYS. node. It also appears that a IMLC port can be hung or open in a certain way to cause the DOWN.LOAD to fail. It should also be noted that the IMLC also might not show up when booted because of the same problem with files or ports at boot time. ORIGINATOR: J. KANZLER CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB006 Pg001 FIB 00007 10/26/83 *** Determining memory address in 128,10x,1,xxx four-tuples *** When a DUMP 28,105,1,XXX memory time-out error or a 28,106,1,XXX memory parity error occurs it is necessary to convert the fourth byte of the dump to a hexadecimal starting address boundary. This will give the failing start address of the main or shared memory board. Listed is a basic program that will give this information. 0010 REM "CONVERT DUMP 28,105,1,XXX AND 28,106,1,XXX TO HEX ADDRESS" 0020 PRINT 'CS' 0030 PRINT "THIS PROGRAM CALCULATES THE 64K STARTING BOUNDARY" 0040 PRINT "FROM DUMPS 28,105,1,XXX AND 28,106,1,XXX" 0050 INPUT "ENTER LAST FOUR-TUPLE NUMBER XXX ",N 0060 LET X=N*65536 0070 LET X$=BIN(X,3) 0080 PRINT "THE STARTING ADDRESS BOUNDARY IS ",HTA(X$)," HEX. ",X," DEC." 0090 END ORIGINATOR: J. KANZLER CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB007 Pg001 FIB 00008 11/02/83 *** New controllers will work in both 810 and 8000 CPUs *** New controllers developed for the Series 8000 are now being used in current 810 shipments. The controllers are appropriate for either machine providing they are configured correctly (160 ns cycle time vs. 200 ns cycle time). IMLC (Assembly Number 903381-001, MM896030) When used in System 810: Dip Switch Module "SW6" (location 5L, center of PCBA), all four positions should be set to the "200" position. When used in Series 8000: Dip Switch Module "SW6" (location 5L, center of PCBA), all four positions should be set to the "160" position. 8-Way (Assembly Number 903383-001, MM896040) When used in System 810: JMPE (two jumper posts near location 2G) should be open... NO jumper in place. JMPF (three jumper posts near location 1N) should be jumpered from 2 to 3. When used in Series 8000: JMPE (two jumper posts near location 2G) should be closed... Jumper just be in place. JMPF (three jumper posts near location 1N) should be jumpered 1 to 2. Hi Speed Video Controller or VCON (Assembly 903377-001, MM896050) When used in System 810: JMP8 (three jumper posts next to switch module at location 2C) should be jumpered for "200". Jumper will connect center post to post designated as "200". JMP9 (three jumper posts next to delay line at location 7L) should be jumpered for "200". Jumper will connect center post to post designated as "200". When used in Series 8000: JMP8 (three jumper posts next to switch module at location 2C) should be jumpered for "160". Jumper will connect center post to post designated as "160". JMP9 (three jumper posts next to switch module at location 7L) should be jumpered for "160". Jumper will connect center post to post designated at. "160". Tape Disk Printer Controller or TDP (Assembly 903217-001, MM890090) At Revision level J and above, this board is compatible with either machine. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB008 Pg001 ORIGINATOR: I. LEIBOWITZ CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB008 Pg002 FIB 00009 02/28/84 *** ACS PCBA below LARL can cause 280X ERRORS on REMIDI *** SUBJECT: Series 8000, Remidi Failures 280x Check the revision level of the ACS board when any of the following errors occur upon running an 8.4 software release of Remidi. Remidi Errors 2801 2802 2803 2804 2805 2806 2807 2808 ACS boards below Rev. "G" will fail this test. At this time the lowest acceptable revision level of the ACS board is "G" ORIGINATOR: I. LEIBOWITZ CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB009 Pg001 FIB 00010 02/28/84 *** Field kit available to install air filters *** A Field Modification Kit is now available to upgrade any 810 or 8000 that was not originally equipped with fan filters. Order one kit per Mainframe Chassis. ICN BFISD # MM990033 907261-001 The Filter Kit will minimize dust accumulation on the boards and power supplies, thus improving the system reliability. This change is not billable, use Service Code 11. ORIGINATOR: J. KANZLER CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB010 Pg001 FIB 00011 02/28/84 *** Device Subtype switches on shared memory controllers *** On some future software release the correctness of the device subtype will become critical. In order to alleviate confusion on this matter, the proper subtype should be verified and corrected if necessary. Device subtypes for the Shared Memory Controllers are as follows: 8-Way Controller is subtype "0" (for both 8000 and 810) Switch Module SW2 (Location 1A) position 1 to be OPEN position 2 to be OPEN position 3 to be OPEN IMLC is subtype "0" (for both 8000 and 810) Switch Module SW1 (Location 2M) position 1 to be CLOSED position 2 to be CLOSED position 3 to be CLOSED position 4 to be OPEN MCS 4-Way is subtype "1" (Series 8000 only) MCS subtype is hardwired and not switch selectable ORIGINATOR: I. LEIBOWITZ CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB011 Pg001 FIB 00012 03/09/84 *** MDI memory TIME-OUT ERRORS while running REMIDI *** When running REMIDI it is entirely normal for the MDI board(s) to indicate a time-out error. REMIDI causes the CPU to address non-existent memory and a time-out will be the result. Immediately after REMIDI has loaded, each MDI board will turn on its amber time-out LED. ORIGINATOR: I. LEIBOWITZ CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB012 Pg001 FIB 00013 03/09/84 *** Removable disk drives will not start when online *** During a system 8000 installation or a replace of a LS700 power supply, If a removable disk drive will not start when it is on-line, check the following: 1. Remove AC power from the system. 2. With a OHM meter check for continuity between LS700, J10-3 and mainframe chassis. 3. If resistance reading is greater than 10 OHMs remove LS700 from the mainframe and install an insulated wire as shown on page two of this MSA. NOTE: It is no necessary to disassemble the power supply to install the jumper. DRAWING: See Mini Alert 239 hardcopy for the drawing. ORIGINATOR: J. KANZLER CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB013 Pg001 FIB 00014 03/20/84 *** System dumps when attempting to restore system tape to disk *** SYMPTOM:.System dumps encountered when trying to use the type 2 boot saverestore option after setting up a newly formatted disk drive or pack with volume and family information can be caused by the following: 1. Use of the CR/ENTER key to duplicate fields which appear perfectly correct while in the special functions provided by a type 3 boot (volume label, family informaton). 2. Use of special function 3 (family information update) on a disk which is a continuation disk rather than a base volume disk. 3. The presence of a READY disk drive on which the volume and family information have not been set up (such as a new or freshly formatted one). 4. The presence of two or more disks which have the same family name, but which have not been designated as members of the same family (such as two fixed media drives which have been redefined as separate families but not renamed or two identical packs). FIX: It is recommended that all information required by the type 3 load, special function screens be hand-keyed rather than using the CR/ENTER key to copy exixting fields. *** IMPORTANT! ***: On the family information setup screen, ALWAYS enter SPACE followed by CR/ENTER if you are defining a single drive family. Multi-drive families are defined by keying the drive numbers of the continuation drives separated by commas. ie. - 1,2,3 woud define drives 1, 2 and 3 as "other drives in the family" When the base drive (0 in this case) is updated, information about the family will also be written to the continuation drives (1,2 and 3 in this case). *** IMPORTANT! ***: DO NOT perform the "update family information" function on a drive specified as a base drive which is already defined as a continuation drive. If done accidentally, you must rerun the family information update on the real base drive (this also updates the continuation drive(s). After updating the family information and/or volume information, ALWAYS REBOOT THE SYSTEM before attempting to zero the directory on the base drive. If you attempt to zero the the directory on a drive defined as a continuation drive, the utility should display an error message at the bottom of the screen. A sytem dump should not result. ORIGINATOR: J. VANDER HEYDEN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB014 Pg001 FIB 00015 03/20/84 *** Cpu memory and disk read/write failures *** PROBLEM DETERMINATION: Defective shared memory controllers, VCON, 8-way, or NIMLC or incorrect switch settings on one of these can cause the above failures. These controllers do not have to be in actual use at the time. The fact that they are plugged in connects them to the memory buss. FIX: Replace defective PCBA and/or check switch settings against the service manual or handbook. ORIGINATOR: G. MCGEE CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB015 Pg001 FIB 00016 04/02/84 *** New style control panel information (features and part numbers) *** Manufacturing will soon be shipping systems with new style control panels for the primary main frame and fixed disk modules. These are entirely new assemblies with new mounting brackets. The front covers have been retooled to incorporate the new control panels. These new control panels are NOT a retrofit. Customers who desre to replace their old control panels with new ones must do so through their Basic Four salesman. Features: 1) All four sense switches are available at the control panel. * It will no longer be necessary to gain access to te MCS board to alter sense switch settings!! 2) Both control panels (mainframe and disk) have real key switches. * The key may easily be removed so that there are no obstructions if the front covers need to be removed. * All switches are keyed alike in the event that any key is lost. 3) The mainframe control panels have a dipswitch on the CBA which allows setting te default power up configuration of the sense switches. * Once unprotected power (LS700) is up, the sense switch configuration may be altered by the membrane switches on the front of the control panel. 4) New style disk control panels may be mixed with old style disk control panels on a system (i.e. add-on drives having a new control panel). 5) The new disk control panels have a disk FAULT lamp driven by its respective disk module. 6) When any membrane switch is depressed the associated LED will change state to give the operator feedback. 7) When the keyswitch (mainframe control panel) is in the "locked on" position both the LOAD and ALTLOAD LEDs will be off. Additionally, when in the "locked on" position, the four sense switch membrnes will be inactive and their LEDs will not change state when the membranes are depressed. CAUTIONS: 1) The new mainframe control panel MUST NOT be connected to MCS boards assembly number 903374-001) which are below revision level E. *** MCS board MUST BE REV. E or higher *** 2) The 26 conductor flat cable which connects J2 on the control panel to J1 on the MCS board is no-longer smmetrical; PIN 1 ON THE CONTROL PANEL MUST CONNECT TO PIN 1 ON THE MCS. 3) On MCS board all sense switches must be off (down). Default Sense Switch Setting: On the PCBA for the mainframe control is a four position dipswitch; this dipswitch is used to set the default power up setting of the sense switches. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB016 Pg001 Setting a "bit" or position to ON is equivalent to setting an MCS sense switch to UP. Position 4 corresponds to the bottom MCS switch Position 3 corresponds to te second from the bottom Position 2 corresponds to the second from the top Position 1 corresponds to the top MCS switch These settings may be altered from the front panel once unprotected power is applied. Spare Parts Information: PCBA, Control Panel, mainframe, new style BFISD P/N 903432-001, MM896160 PCBA, Control Panel, disk, new style, BFISD P/N 903447-001, MM896170 Switch, membrane, control panel, mainframe, BFISD P/N 907592-001, MM896180 Switch, key, control panel, mainframe, new style, BFISD P/N 332002-002, MM896190 Switch, key, control panel, disk, new style, BFISD P/N 332002-001, MM896200 ORIGINATOR: I. LEIBOWITZ CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB016 Pg002 FIB 00017 05/25/84 *** New fixed disk control panel to prevent rotary switch breakage *** A new control panel bracket and nut is now available that will help to prevent the breakage of the rotary switch used on the mainframe and fixed disk control panel. These parts should be replaced on a next service call basis. The parts are a no charge item. ICN BFISD No. Description YY013927 907705-001 Bracket Cont. Panel YY013928 214016-016 Nut Hex 3/8 X 32 NOTE: Service call is non-billable, use Service Code 11. DRAWING INFORMATION: See Mini Alert 255 hardcopy for drawing & rework inst. ORIGINATOR: J. KANZLER CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB017 Pg001 FIB 00018 07/17/90 *** Deleted *** ORIGINATOR: I. LEIBOWITZ DELETED BY: Norm Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB018 Pg001 FIB 00019 06/14/84 *** Installation instructions for the BMTC controller *** SUBJECT: 8000 Series, Installation of Buffered Tape Controller (BMTC) BFISD P/N 903413-001 (MM896110) General: 1. The Buffered Tape Controller (BMTC) is intended for use only on the 8000 Series (NOT the System 810). 2. System software must be level 8.4B or later to support this controller. 3. ACS boot PROMs must be revision level 2.0.0.2, making the ACS revision "S" or later. 4. BMTC must be installed to the RIGHT of the CPU set(s), just like the TDP. 5. The BMTC will support the following tape drive combinations: a. One 1/4" cartridge streamers ("MCS"). b. Four 1/2" streamers ("MTS"). c. Two 1/2" vaccuum column tape drives ("MTR"). d. A combination of (a) and (b) or a combination of (a) and (c). MTRs and MTS canNOT be operated on the same BMTC. 6. In systems utilizing a tape unit on the TDP and a tape unit on the BMTC, the software will consider the tape drive on the TDP as unit 0. TDPs are lower (system relative) unit numbers then BMTCs. 7. The system may be loaded from tape via the BMTC by the usual sense switch settings. 8. The BMTC is supported by standard 8000 Series diagnostics. Cabling: PCBA Connectors: J4 Future Use Top _ * J3 For 1/2" tape units, connect to: P2 on MTS _ (SAme as TDP J6) Bottom on MTR _ _ * J2 For 1/2" tape units, connect to: P1 on MTS _ (Same as TDP J5) Top on MTR _ _ J1 For 1/4" tape Units _ _ P2 For diagnostic display ("Y Bus Display") Bottom NOTE: * These connections are just opposite the TDP Connectors at top edge of PCBA (P3 and P4) are for repair center use only. Cables: The following cables should be used: a) MTS (2 required) - P/N 907065-001, length = 20 feet b) MTR (2 required) - P/N 906561-001, length = 20 feet c) MCS (1 required) - P/N 907567-001, length = 20 feet BMTC Configuration: Dipswitch, location 2S Position 1 = Address bit 15 Position 2 = Address bit 16 Position 3 = Address bit 17 Position 4 = Address bit 18 Position 5 = Address bit 19 Position 6 = Address bit 20 Position 7 Parity Select Normal setting is CLOSED CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB019 Pg001 CLOSED = External parity selected, correct parity supplied by BMTC for tape transport. Correct parity checked for by BMTC from tape transport. If position 7 is set to open, the BMTC will report hard errors continuously. Ensure that tape drives are also set for external parity as follows: MTR: S1-3 set to OFF (Formatter PCBA) MTS: Dipswitch at location 5W - position 5 CLOSED, position 6 OPEN If tape drive is reconnected to the TDP (except for brief testing) the drive parity switches should be reset opposite to the above settings. position 8: Device Type, 1/2 Tape Drive CLOSED = MTS OPEN = MTR * Mixing of MTR and MTS on the same BMTC is NOT supported position 9: Self Test Enable OPEN = Loop on selected self test (see below) CLOSED = Normal operation Dipswitch, Location 9A Normal - On Line Usage: (Determined by position 9, switch location 2S) position 1 closed = cable present 1/2" drive, unit 0 * position 2 closed = cable present 1/2" drive, unit 1 * position 3 closed = cable present 1/2" drive, unit 2 * position 4 closed = cable present 1/2" drive, unit 3 * position 5 closed = cable present 1/4" drive, unit 0 * position 6 closed = cable present 1/4" drive, unit 1 * position 7 closed = cable present 1/4" drive, unit 2 * position 8 closed = cable present 1/4" drive, unit 3 * position 9 NOT USED * BMTC relative unit number JUMPER: Clock select for P2, JMP 2 is the NORMAL setting JMP 2 = Normal clock for Diagnostic Display supplied to P2 JMP 1 = System clock (SCLK) supplied to P2 for logic analyzer use. LEDS: Red - Parity Error Resettable by the push button switch. The latch holding parity error status is on battery backup. If the LED was on prior to a power failure or turning off the system via the front panel, the LED will once again light with restoration of power. Green - This LED indicates successful completion of self-test. When load is depressed or the BMTC is commanded to reset, the green LED will be turned off, at successful completion of self-test the LED is turned on. BOARD ADDRESS (Dipswitch at location 2S): NOTE: BMTC occupies two consecutive shared memory addresses. Shared memory controller numbers 0 and 1 may NOT be used. 0 = Closed 1 = Open POSITIONS OF SWITCH AT 2S _ 6 _ 5 _ 4 _ 3 _ 2 _ 1 _ ISDC SLOTS OCCUPIED ----------------------------------------------------------- _ 1 _ 0 _ 0 _ 1 _ 1 _ 0 _ 2 and 3 _ 1 _ 0 _ 0 _ 1 _ 0 _ 1 _ 4 and 5 _ 1 _ 0 _ 0 _ 1 _ 0 _ 0 _ 6 and 7 _ 1 _ 0 _ 0 _ 0 _ 1 _ 1 _ 8 and 9 _ 1 _ 0 _ 0 _ 0 _ 1 _ 0 _ 10 and 11 CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB019 Pg002 _ 1 _ 0 _ 0 _ 0 _ 0 _ 1 _ 12 and 13 _ 1 _ 0 _ 0 _ 0 _ 0 _ 0 _ 14 and 15 _ 0 _ 1 _ 1 _ 1 _ 1 _ 1 _ 16 and 17 _ 0 _ 1 _ 1 _ 1 _ 1 _ 0 _ 18 and 19 _ 0 _ 1 _ 1 _ 1 _ 0 _ 1 _ 20 and 21 _ 0 _ 1 _ 1 _ 1 _ 0 _ 0 _ 22 and 23 _ 0 _ 1 _ 1 _ 0 _ 1 _ 1 _ 24 and 25 _ 0 _ 1 _ 1 _ 0 _ 1 _ 0 _ 26 and 27 _ 0 _ 1 _ 1 _ 0 _ 0 _ 1 _ 28 and 29 _ 0 _ 1 _ 1 _ 0 _ 0 _ 0 _ 30 and 31 _ 0 _ 1 _ 0 _ 1 _ 1 _ 1 _ 32 and 33 _ 0 _ 1 _ 0 _ 1 _ 1 _ 0 _ 34 and 35 _ 0 _ 1 _ 0 _ 1 _ 0 _ 1 _ 36 and 37 _ 0 _ 1 _ 0 _ 1 _ 0 _ 0 _ 38 and 39 _ 0 _ 1 _ 0 _ 0 _ 1 _ 1 _ 40 and 41 _ 0 _ 1 _ 0 _ 0 _ 1 _ 0 _ 42 and 43 _ 0 _ 1 _ 0 _ 0 _ 0 _ 1 _ 44 and 45 _ 0 _ 1 _ 0 _ 0 _ 0 _ 0 _ 46 and 47 _ 0 _ 0 _ 1 _ 1 _ 1 _ 1 _ 48 and 49 _ 0 _ 0 _ 1 _ 1 _ 1 _ 0 _ 50 and 51 _ 0 _ 0 _ 1 _ 1 _ 0 _ 1 _ 52 and 53 _ 0 _ 0 _ 1 _ 1 _ 0 _ 0 _ 54 and 55 _ 0 _ 0 _ 1 _ 0 _ 1 _ 1 _ 56 and 57 _ 0 _ 0 _ 1 _ 0 _ 1 _ 0 _ 58 and 59 _ 0 _ 0 _ 1 _ 0 _ 0 _ 1 _ 60 and 61 _ 0 _ 0 _ 1 _ 0 _ 0 _ 0 _ 62 and 63 _ 20 _ 19 _ 18 _ 17 _ 16 _ 15 _ Address Bits These are the only switch settings allowed. Other combinations may interfere with normal operation of the system. ORIGINATOR: I. LEIBOWITZ CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB019 Pg003 FIB 00020 07/02/84 *** Old BOOT PROMs cause BOOT failure if four TDP's are present *** ACS revision level "E" incorporated updated boot PROMs to support four TDPs. It appears that there are some ACS boards designated as higher revision levels that in fact have early boot PROMs. OLD boot PROMs will prevent the system from booting if four TDPs are present. The old boot PROMs were version 2.0.0.0. The current version of boot PROMs is . 2.0.0.1. Either of the following procedures may be used to verify the revision level of the ACS boot PROMs: 1. Remove each ACS board and check part numbers.... Location New PROM Old PROM 8A 165043-09 165043-08 8C 165043-10 165043-06 2. The DEMON logon screen gives the boot level of the I/O CPU. By alternately forcing (use the "I/O disable switch") each CPU to be I/O and booting with it you can check the PROM version levels on each CPU. 3. Boot level is also displayed by OSINFO. Use procedure in #2 (above) to force each CPU to be I/O and check OSINFO each time. If it is found that boot PROMs are below revision level, replace the appropriate ACS(s) at your earliest convenience. Be sure to indicate on the DMT that boot PROMs are below revision level. ORIGINATOR: I. LEIBOWITZ CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB020 Pg001 FIB 00021 07/02/84 *** System hangs with MEMORY TIME-OUT on MDI, cannot force a dump *** If an 8000 system is getting periodic hangs along with a memory time-out lamp on an MDI board and you cannot force a system dump, verify that there are no empty card slots between controllers. An interrupting controller will normally block lower priority controllers (those to the left of itself) on the same daisy chain from interrupting. An open card slot prevents a controller from blocking those lower priority controllers on the other side of the open. It is therefore possible that more then one controller. may present its address when the CPU so commands. In this case the presented addresses will be ORed together on the backplane and a non-existent address may result causing the CPU firmware to loop...attempting to service the false controller address. Since there is no response (MCT) from the non-existent controller, a time-out error is detected by the MDI board and the time-out LED is turned on. The above information applies to these controllers: IMLC 4 WAY 8 WAY 16 WAY Hi Speed VDT Controller ORIGINATOR: I LEIBOWITZ CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB021 Pg001 FIB 00022 09/13/84 *** New style locking type cable end covers available *** A new cable connector cover is now available that will keep the cable locked in place when used with a PCBA that has the locking latches installed. The connector covers are being supplied as a no charge, no return item and are available on a Code C order only. No Code A orders will be accepted. Parts should be written off on the IR using Service Code 11. The service call is non- billable. PART NUMBERS ICN MFG NUM DESCRIPTION 1. YY014275 310022-001 Connector Half 26 Position 2. YY014276 310022-002 Connector Half 50 Position 3. YY014277 310022-003 Connector Half 14 Position REWORK INSTRUCTIONS 1. Remove connector cover half (310016-XXX) and replace with respective cover (310022-XXX) on the following cables: 907148-VAR Cable Assy TDP/Printer-15/30 Ft. REPLACE WITH 907224-VAR Cable Assy TDP/Printer-25/50 Ft. P/N YY014275 907054-VAR Cable Assy NIMLC ICOM-25/1000 Ft. REPLACE WITH 907219-VAR Cable Assy NIMLC XCAM/RS232-25/50 Ft P/N YY014276 907115-VAR Cable Assy 8-Way/RS232-25/50 Ft 907116-VAR Cable Assy 8-Way/Periph-25/1000 Ft REPLACE WITH 907117-VAR Cable Assy 8-Way/Modem-25/50 Ft P/N YY014277 907218-VAR Cable Assy 8-Way/Periph Adptr-15/30 Ft. Remove old cover and replace with new one. ORIGINATOR: J. KANZLER CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB022 Pg001 FIB 00023 09/24/84 *** BOOTSTRAP ERRORS F01A and/or system jumps into monitor mode *** If a System 8000 is getting a Bootstrap Error of F01A or is jumping into Monitor Mode and displaying incorrect error code on the I/O CPU the problem could be the I/O CPU's MDI board. This problem is due to a incompatibility between the ACS and MDI set. This type of error could happen after changing the ACS board. A MDI board 903361-001 at Revision H or 903408-001 at Revision F will eliminate this problem. If you are replacing an ACS board check the revision level of the MDI board. If it is below the above revision levels it should also be replaced. NOTE: This problem only occurs on the I/O CPU. As a temporary solution on a multiple CPU system, the failing I/O CPU can be forced to be non-I/O. This should only be used as a TEMPORARY solution. ORIGINATOR: J. KANZLER CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB023 Pg001 FIB 00024 11/05/84 *** Depopulated protected power supply (PPS II) information *** Basic Four is now shipping 8000 systems with the Protected Power Supply depopulated ("PPS II"). The circuits which were responsible for generating -5 volts VB and +12 volts VB have been removed. These circuits were used to support the old 256X memories ........ not used on 8000 machines. These "new" versions of the Protected Supply are FULLY COMPATIBLE with the previous version. The +12 volts required by the ISDCs and MCS is supplied by the LS700. ORIGINATOR: I. LEIBOWITZ CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB024 Pg001 FIB 00025 11/05/84 *** New artwork 1 MEG memory board information *** The factory has cut over to new artwork 1 Megabyte memory boards. The BFISD assembly number and MM numbers have not changed as this board is fully compatible with the previous artwork. Because of the artwork change, the jumper which selects 200 NS/160 NS has been re-oriented on the assembly. NOTE: Some early shipments of the new artwork board had the jumper installed INCORRECTLY. The jumper should be in the "160" position (pins 2 to 3). When installing a new system or add-on memory, verify correct installation of this jumper. Incorrect jumper installation may cause system dumps pointing to memory corruption or "NIL POINTER". ORIGINATOR: I. LEIBOWITZ CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB025 Pg001 FIB 00026 12/20/84 *** Memory PCBA count restrictions for power supply checking *** The following rules must be maintained when servicing and/or upgrading 8000 Series mainframes to ensure proper protected power distribution: o The maximum number of memory PCBA's in a system may not exceed nine (9) boards or six megabytes (8 megabytes for Level 8.4B and above). o A protected power supply will support a maximum of three (3) memory and BMTC boards (total). Since power supplies are paralleled, a single frame system will support three (3) boards, a two frame system will support six (6) boards and a three frame system is required for seven (7) or more boards, to a maximum of nine (9). Since there is no firm rule for physical placement of memory boards within a system of multiple frames, and since the power supplies are paralleled, caution must be used when isolating the power supplies for testing. WHEN TESTING UNPARALLELED POWER SUPPLIES, NO MORE THAN THREE (3) MEMORY AND BMTC BOARDS (TOTAL) MAY BE INSTALLED IN EACH FRAME. When making voltage checks on power supplies which have been isolated from each other (unparalleled) in multi-mainframe systems, observe the following rules: o If a mainframe contains more than three (3) memory and BMTC boards (total), . remove or relocate all boards in excess of three (3) boards PRIOR TO POWERING THE SYSTEM ON. o Remember that the BMTC is counted as a memory board for power supply loading purposes. ORIGINATOR: J. RIPPL CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB026 Pg001 FIB 00027 01/16/85 *** Unsuccessful power failure recovery - prior to REL 8.4B *** SYMPTOM: If system input AC power fails, the system will not do a power fail recovery. PROBLEM DETERMINATION: This problem only occurs on systems running an O.S. release prior to 8.4B AND with total system memory in the range of 5 and 5.75 megabytes. FIX: 1. Increase system memory to 6 MB or decrease system memory to less than 5 MB. 2. Upgrade the O.S. to 8.4B or higher. ORIGINATOR: C. FOSTER CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB027 Pg001 FIB 00028 02/20/85 *** Floating point math software gives different results than 13XX CPU *** The BASIC language on the MPX series and 2000 series CPUs will round all floating point numbers. This is not the case with 13XX systems. On the 13XX, numbers are sometimes rounded and sometimes not. Only certain expressions are rounded. The following are examples: : 13XX : 2000 : 8000 MATH EXPRESSION : RESULT : RESULT : RESULT -------------------:--------------------:--------------------:------------------ 1/N : .083333333333 : .083333333333 : .083333333333 : : : 12/C : 2.0 : 2.0 : 2.0 : : : (1/N)*(12/C) : .166666666666 : .166666666667 : .166666666667 : : : 1/((1/N)*(12/C)) : 6.000000000024 : 5.999999999999 : 5.999999999999 ------------------------------------------------------------------------------- These slight differences can cause large deviations on the same expressions used on both systems. Programs on the 13XX that have expressions that take into account this innaccuracy may not work the same on the 2000 or MPX series. The expression has to be re-written to account for the automatic rounding off by the 2000 and MPX series. ORIGINATOR: MBF PRODUCT SUPPORT CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB028 Pg001 FIB 00029 02/22/85 *** Boot strap and memory errors can be caused by LS700 power supply *** Bootstrap and Memory Parity Errors may be encountered following system upgrades (additional hardware installation) caused by oscillations in the LS700 Power Supply. An audible hum may also be detected. If the above problems are noted, check the +5 VDC output of the LS700 supply with a scope. If a 50 to 300 mv sinewave (1 to 3 KHz) is observed and removing some of the hardware produces a cleaner +5 VDC, replace the LS700. Power supplies (MM896070) at or above Revision V have an ECN installed to correct this problem. ORIGINATOR: J. RIPPL CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB029 Pg001 FIB 00030 08/06/87 *** MDI clock fix for 28,1,1,16 dumps *** PROBLEM DESCRIPTION: A problem may exist where the MDI/ACS clocks drift out of phase with the system clocks. Resulting system dumps are typically of the type 28,1,1,16 or 28,101,1,25. An ECN has been implemented to resolve the problem by adding a capacitor to the MDI PCBA. The dumps may also be caused by execution of a Basic Program which was edited prior to the installation of the MDI ECN. A correction to BOSS will be made on Level 8.4C to resolve the problem by compiling Basic programs when a 'SAVE' command is performed. SOLUTION: When the above mentioned dumps occur, two steps must be taken. First ensure that the MDI is at the revision noted below. Secondly, from the dump, determine the terminal task which caused the dump and try to ascertain the program being executed at that time. This program must be loaded and resaved thru the Editor which will recompile the program and correct any existing problem with that program. Note that errors will only be existing on those programs which were edited (modified) and saved prior to the occurrence of the dump. The customer should contact his programmer to resolve problems with programs which cannot be readily identified. MDI PCBA LARL REQUIREMENT: MM896010, 903361-001 --> REVISION L 903408-001 --> REVISION K Also, the IC's at location 3N and 4N should be checked. The IC's at these two locations were changed to use IC's with tighter tolerances; they are identified by the letters "PDS" on the IC. Location PN Description 3N 163000-001 4044 Phase Detector (4044PDS) 4N 163001-001 4024 Multivib Dual Contr (4024PDS) These IC's should be replaced to insure PCB reliability, but it does not mean that all the non-PDS IC's at these two locations are bad. Dumps that could possibly be caused by these IC's are "STK Overflow and Invalid Operation". This change was not incorporated in an ECN, it was an in-line change in manufacturing. REQUIRED: Capacitor, 33pf 5% 300V, Mica YY005406 Teflon tubing, (approx. 1/2") 0R999074 Add capacitor C102 between pin 2 of IC 3N and C67 as shown keeping lead length as short as possible (a 25 watt or less iron should be used). Use insulating sleeve as required to prevent lead shorts to other components. DRAWING INFORMATION: SEE MINI ALERT 345A FOR DRAWING INFORMATION ORIGINATOR: J. RIPPL CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB030 Pg001 FIB 00031 03/11/85 *** ERROR 65, File Lacks Integrity - on Releases 8.4A and 8.4B *** PROBLEM DETERMINATION: In O.S. releases 8.4A and 8.4, a problem exists that causes.a recently accessed file to gererate error 65, although the file has been properly opened and accessed. The problem occurs only when write-through is disabled and only with a file having read-only access for some users and read- weite access for others. The problem is triggered when the last user to close the file was a read-only . user. If the last user to close a file has read-write access, all modifications to the file are written to the disk and the lack-of-integrity flag is reset. However, if the last user to close the file has read-only access, file modifications are not written to the disk and the lack-of-integrity flag is not reset. Subsequent access to the file is prevented until the file has been re- constructed. FIX: There are two workarounds for this problem. The first is to enable write- through. The second is to modify the usage rights of affected files to allow read-write access to all users. This problem was fixed on BOSS/VS Release 8.4C. ORIGINATOR: C. FOSTER CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB031 Pg001 FIB 00032 05/20/85 *** False ERROR 2 can occur on Releases 8.4A and 8.4B *** False error 2's (end of file) have been reported on both 8.4A and 8.4B releases. The false errors can be caused by: a. Removal of a large number of records from the file. b. Writing to the file with two or more tasks having the file open. If this is done, in a short time an error 2 will be reported on one of the terminals. The temporary workaround is to copy the file to a new file, delete the old one and rename the new one to the original name. This may also be done by the "update file attributes" function in the file utilities, making the file larger. However it is done, it is the responcibility of the customer and/or Basic Four software personel. DO NOT alter customer data yourself! ORIGINATOR: MBF PRODUCT SUPPORT CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB032 Pg001 FIB 00033 06/17/85 *** Incorrect disk status on Type III load, disk to disk copy *** SYMPTOM: When a disk I/O error is encountered on level 8.4B while in a Type III load, doing a COPY FAMILY FROM DISK TO DISK, the error status bits are displayed on the screen. However, a bug in this release causes the display to always show the same error. EXAMPLE: DISK ERROR STATUS = 000003F8 (DEV) DRIVE HARDWARE ERROR< STARTING SECTOR = NNNN TO CONTINUE Where (DEV) is either the source or destination disk and NNNN is the sector number. SOLUTION: This incorrect status, 000003F8, is corrected in release 8.4C. Note that the sector number is a sector withn a 64K block. The exact sector number can be found by doing a DISKREAK of the pack, which will show up as a single sector error in the error log. ORIGINATOR: J. RIPPL CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB033 Pg001 FIB 00034 07/22/85 *** Schematics for 8000 new & old style control panels *** Mini Alert 385 contains schematics of the old and new style control panel assemblies for reference until BFISD 8075 Service Manual is updated. Note: BFISD 8075 Service Manual Appendices are available as follows (with schematics): BFISD 8075 Appendix A - BMTC BFISD 8075 Appendix B - 16-Way Controller BFISD 8075 Appendix C - MPC DRAWING INFORMATION: See Mini Alert 385 hardcopy for schematics. ORIGINATOR: J. RIPPL CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB034 Pg001 FIB 00035 07/24/85 *** Mechanical problems with CPU control panels *** In some cases, when replacing the CPU Control Panel PCB, the shaft is not long enough to fit the ON/OFF switch knob. To prevent this from happening, order the next higher assembly which includes the mounting bracket. Order MM895010 Vendor # 907068-001 Control Panel, CPU ORIGINATOR: J. BUSCAGLIA CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB035 Pg001 FIB 00036 07/24/85 *** SAVERESTORE slowdown with BMTC installed *** PROBLEM: Under a Type 2 load, SAVERESTORE backups to 1/2 inch tape drives (MTR/MTS) are slower by a factor of 3 or 4 times when connected to a BMTC as when connected to a TDP (PDC). The reason is due to the way. the buffering is handled for a BMTC for levels 8.4B/C/D for the Type 1 load which was also implemented for the Type 2 load. SOLUTION: In 8.5A, Type 2 load SAVERESTORE is optimized for better performance due to a rewrite in the tape handling routines with this release. ORIGINATOR: J. RIPPL CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB036 Pg001 FIB 00037 08/15/85 *** Miscellaneous problems due to ACS PCBA being below LARL *** PROBLEM: ACS boards, Revisions V, W, X and Y, cause problems on systems below 8.5 OS. An example is "READRECORD(x,SIZ=3)A$" where, if the third entered character is an "A", it is apparently ignored. "A" entries also may cause problems in "DEMON". SOLUTION: ACS boards with Revision U and below or Revision Z and above can be used on all O/S except MPC Boot. MPC Boot requires Revision Y only or Revision AA or higher. ORIGINATOR: J. RIPPL CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB037 Pg001 FIB 00038 10/22/85 *** BMTC PROM update to allow booting from 1/2" tape drive *** New PROMs have been released for the BMTC board (MM896110) to allow revision levels to be checked on a tape boot and to allow tape booting from 1/2" tape. Installation of the PROMs upgrades the board to Rev. R. Previous LARL for the board was Rev. J or Rev. N for 1/4" cartridge tape. Boards below Rev. J should be replaced. Parts should be ordered and installed on all customer machines at the next service call and on spare parts ASAP. This is not billable. NACS ICN LOC. REV. R # REPLACES REV. J # REV. N # YY016025 5F 165043-059 165043-031 165043-045 YY016026 5G 165043-060 165043-032 165043-046 YY016027 5B 165043-061 165043-033 165043-047 YY016028 5C 165043-062 165043-034 165043-048 YY016029 5D 165043-063 165043-035 165043-049 YY016030 5E 165043-064 165043-036 165043-050 ORIGINATOR: C. GAHAN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB038 Pg001 FIB 00039 11/11/85 *** ECN to fix BMTC parity errors during power fail recovery *** Basic Four has released an ECN to ensure on-board RAM refresh in the event of a power failure on BMTC Bds., MM896110. This involves cut etches and jumpers, so will only be installed in Repair Depots. The board will become Rev. Level S when the change has been installed. Do not replace the board unless problems appear to have been experienced. Do not include the board replaced on the IR, and indicate on the DMT "Revision Upgrade". This is not billable. ORIGINATOR: C. GAHAN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB039 Pg001 FIB 00040 11/18/85 *** Incomplete power fail recovery - prior to Release 8.5A *** Systems having more than five T-303 drives will experience incomplete power recovery. Software fix has been implemented in 8.5A release. ORIGINATOR: J. BUSCAGLIA CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB040 Pg001 FIB 00041 01/13/86 *** BMTC board location restrictions *** There appears to be some confusion concerning the location of controller boards, particularly the BMTC, in relationship to the CPU sets. The Basic Four Configuration Specification Document states that, for machines with a single of chassis, "the controller boards, VCON/ 8-way/ NIMLC/ BMTC/ 16-way may reside in any order, but must be located to the right of the processor set. The TDP and MPC controllers must be located immediately to the right side of the CPU set." For multiple chassis machines the document states "TDP, MPC, BMTC and NIMLC controller boards must reside on the right side of the CPU's. The TDP and MPC Controllers must reside immediately to the right side of the CPU's. VCON, Memory and 8-way (Note 1) may reside either on the right or left side of the CPU's. 16-way Controller boards must reside on the left side of the CPU's. Note 1: Systems with 8-way I/O panel assy., the 8-way Controllers must reside on the left side of the CPU's." ORIGINATOR: C. GAHAN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB041 Pg001 FIB 00042 01/28/86 *** BMTC Parity light during power fail recovery *** Basic Four has released an ECN to prevent the parity light from coming on during a power-fail recovery on the BMTC board, ICN MM896110. As this involves cuts and jumpers, it will only be implemented in the Repair Depots. The revision level of BMTC PCBAs' with this ECN installed will be Rev. U. ORIGINATOR: C. GAHAN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB042 Pg001 FIB 00043 02/04/86 *** TDP/MPC switch setting for DMP printer (Releases 8.5A & later) *** With Software Release Level 8.5A or 8.5B, the parallel DMP device variance code needs to be changed. Currently, the DMP printer has the same code as a matrix printer. Changing the DMP printer to a new device variance is done by changing the switch settings on the TDP or MPC board, whichever is being used as the Printer Controller. Please note the new settings on your Switch Settings Sheets in your 8000 Composite Service Manual. TDP MM890090 Switch at Location 4C Position # 8 7 6 ------------- Setting - - - 0 0 C MPC MM894000 (903500) SW. 2 at location 2A Position # 8 5 2 (Printer #0) 7 6 3 (Printer #1) --------- Setting - - - 0 0 C MPC MM894000 (903546) SW. 2 at location 2A SW. 5 at location 9F Position # 5 4 3 - - - 1 (Printer #0) 8 7 6 - - - 2 (Printer #1) -------------------------------- Setting - - - 0 C 0 - - - 0 0 = Open C = Closed ORIGINATOR: C. GAHAN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB043 Pg001 FIB 00044 03/06/86 *** MPC PCBA switch settings *** Enclosed is the corrected switch setting pages for the MPC, MM89400, done in the format of the 8000 Composite Manual. Note that two different boards are shown and both have the same Sorbus ICN. This may tend to cause some confusion. The boards with Basic Four number 903500-001 were the first generation art-work; there were only a few released with machines to the field. Basic Four number 903546-001 board is the current production art- work. The two boards have the same function, but switch settings are entirely different, with the current board having "cleaned up the act" and following a much less confusing pattern. Also, the current board allows manipulation of the Printer Strobe polarity by switches, which the early board did not. DRAWING INFORMATION: See Mpx Handbook FIB section for controller switch settings ORIGINATOR: C. GAHAN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB044 Pg001 FIB 00045 03/06/86 *** 7000 System preliminary information & electrical requirements *** The 7000 family has the same requirements for AC power, cooling and installation as the 8000 family. Refer to the 8000 Installation Planning Guide for the specific requirements. The 7000 family may have 5 1/4" fixed disk drives (controlled by an MPC), 8" fixed or 14" removable disk drives (controlled by a TDP). All drives in the same frame must be of the same model; i. e., it is not permissible to have a mixture of 8" and 5 1/4" drives in one frame. The add-on disk frames will have an ACDU unit if the system has more than one disk/tape drive. A standard 7000 system will have one 1/4" MCS tape unit and one 5 1/4" disk drive and will obtain the required power from the CPU's LS-700 power supply. The CPU's ACDU requires a 20A. twist-lock receptacle, NEMA L5-20R IG (isolated ground) twist-lock. With the addition of a second disk drive, an ACDU will be required in the disk drive cabinet (there can be up to four fixed disk drives of the same model in one frame). This ACDU will require a 15A. twist-lock receptacle, NEMA L5-15R IG. (isolated ground) twist-lock. Removable disk drives require one 15A. receptacle per drive: a T83 requires a NEMA L5-15R IG (isolated ground) twist-lock and a T303 requires a NEMA 6-15R IG (isolated ground 208/240V) straight blade. ORIGINATOR: C. GAHAN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB045 Pg001 FIB 00046 03/06/86 *** New version of 4MB memory board *** A new, stripped down version of the 4MB Memory PCBA is now being supplied by Basic Four. In addition to the 4MB PCBA, P/N 903516-002 (MM896260) and the 2MB PCBA, P/N 903516-001 (MM896250), the board may now be populated for 1MB. The Basic Four P/N of the new version is 903516-003. The ICN will remain the same as the older 1MB PCBA, MM896090. ORIGINATOR: C. GAHAN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB046 Pg001 FIB 00047 04/03/86 *** Random dumps or miscellaneous failures *** A number of dumps sent to Engineering for analysis have been attributed to "hardware anomalies". These include such things as nil pointers, invalid ops, or "some other phenomena", possibly due to "bad" data on the back-plane (as a result of timing). Basic Four has asked field personnel servicing 8000s to ensure that the ECN described in MSA #345A is installed on all systems. (this is the ECN which adds the 33pf capacitors to the MDI board) They have also suggested reminding the field that the following items can cause subtle problems: 1. Power supply voltages must be correct. 2. PCBAs must be properly installed in the card cages. This means board placement and "fit". (This will be even more critical on 9000 systems.) 3. PCBAs should be at the appropriate revision level. (Again, conversions to 9000 systems will make this more critical.) 4. Ensure that all MPX 8000 series systems with three CE sets have the MM896025 903379-002 ACS PCBAs. 5. Ensure that PCBA loation requirements are met. (i.e., the MCS board plus CPU sets must occupy consecutive cardslots in the same chassis.) ORIGINATOR: C. GAHAN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB047 Pg001 FIB 00048 04/03/86 *** LS700 power supply ECN to increase -12 Volts current capacity *** Basic Four has released an ECN to allow the LS700 to increase the current from the -12V supply from 2.65A. to 4.4A. to support increased loading from 8-Way and 16-Way Controllers. The change is so complex that it boggles the mind. It consists of changing the value of the fuse in F3 (located along the bottom edge of the PCBA, next to J9) from 4A. to 6A. This can easily be done on the next PM or service call. After performing the ECN, the value marked on the PCBA "F3 4A" should be changed to "F3 6A" with a permanent felt marker. The revision level of the PCBA will be U and the revision level of the LS700 will be W. ORIGINATOR: C. GAHAN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB048 Pg001 FIB 00049 04/03/86 *** ECN to upgrade current capacity of -12V on UPPS P/S (converted 810) *** An ECN has been released that will increase the current rating of the -12V from 1.5A to 2.6A for 810 machines and for converted 8000 systems that are still using a UPPS, ICN MM893000. The change is being made to support increased loading from 8-Way and 16-Way Controllers. This will be installed on units passing through the Repair Center. The LARL of the UPPS will become J and the LARL of the PCBA attached will be M. ORIGINATOR: J. BUSCAGLIA CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB049 Pg001 FIB 00050 05/01/86 *** New version NIMLC (903534-001) *** Basic Four has announced a re-designed Intelligent Multi-lined Communications Controller. The Basic Four number for the new PCBA is 903534-001. As it functions the same as the previous IMLC (as used in the United States), it will retain the same ICN, MM896030. (The previous boards were numbers 903381-001, domestic and 903381-002, international.) The following will explain terms that are associated with the IMLC Controller and the maximum allowable configurations: a. ICOM (Internal Communications) is used for Dataword II. Dataword II can only be configured on port A. The maximum number of Dataword II terminals . allowed is eight per system. b. XCOM (External Communications) is used for synchronous protocol to remote systems. c. RS-232 (Recommend Standard 232) is used for equipment which is designed for interfacing to synchronous modems. d. 3270 is used for interactive communication between a Basic Four and IBM compatible host. This software product emulates an IBM 3271-2 cluster controller with up to 32 attached terminals and/or printer devices per IMLC port. The maximum number of devices per system is 64. e. TBC (Transportable Batch Communications) is used between Basic Four and non- Basic Four systems which support the IBM 2770/3770/3780 bisynchronous protocol. TBC has the capacity of using dial up or dedicated lines through modems. The maximum number of TBC lines per IMLC is two. f. RS-366 Auto-Dial supports only a Bell 801C compatible auto-call unit. This is used in conjunction with the TBC package; one is allowed per IMLC Controller. g. X.25 is a synchronous protocol which conforms to CCITT standards. X.25 is used between Basic Four systems which use the file transfer facility (FTF) package. The maximum configurable logical units is sixteen (eight per port). h. X.21 is a physical interface for X.25 and can be configured on ports A & B. The software and diagnostics for this IMLC are the same with the exception of the loopback plug. The new test connector is a 50 pin loopback plug, 907831-001; ICN is MM899195 and the wiring is shown below. DRAWING INFORMATION: See Mini Alert 461A for switch settings/cable drawings. ORIGINATOR: C. GAHAN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB050 Pg001 FIB 00051 05/01/86 *** New size of boot PROMS on AMS PCBA (9000) are now 4K *** The 9000 family of CPUs, which at present are now in Beta test sights only, will have the boot PROMs on one of the three PCBAs that make up the CPU sets, the AMS PCBA, updated to 4K from 2K PROMs. Basic Four is sending out new AMS PCBAs to be installed in those machines. The change must be implemented before the latest revision of the operating system, which will be 9.5C*15, can be installed. The LARL of the AMS PCBA is now F and may be identified by jumpers J8 wired or strapped to J9. Earlier revision level PCBAs had J8 jumped to J7. (The J7-9 jumpers are located near the front of the board, in between the two foreplane connectors.) ORIGINATOR: C. GAHAN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB051 Pg001 FIB 00052 05/10/86 *** Minimum revision levels for 8000 to 9000 upgrade *** The following list gives the minimum revision level of 8000 PCBAs and units to successfully support a conversion to a 9000 CPU: 1/2/4 MB Memory Assy.# 903516 Rev. E 1 MB Memory Assy.# 903349 Rev. V MCS PCBA Assy.# 903374 Rev. L BMTC Cntrllr. Assy.# 903413 Rev. R NIMLC Cntrllr. Assy.# 903381 Rev. K -or Assy.# 903534 Rev. D HS Vid. Cntrllr. Assy.# 903377 Rev. C 8 Way Cntrllr. Assy.# 903383 Rev. A 16 Way Cntrllr. Assy.# 903437 Rev. J PCBAs unique to the 9000: DMA Cntrllr. Assy.# 903554 Rev. E CPU Set AMS Assy.# 903548 Rev. F IDC Assy.# 903550 Rev. H ESTK Assy.# 903552 Rev. D Power Supplies: 810A Prot. P.S. Assy.# 906418 Rev. C With PCBAs Main Assy.# 903231 Rev. J Aux. Assy.# 903235 Rev. D -or Main Assy.# 903338 Rev. J Unprot. P. S. Assy.# 906419 Rev. H With PCBAs Main Assy.# 903229 Rev. V Aux. Assy.# 903241 Rev. L 7000/8000/9000 Prot. P. S. II Assy.# 907251 Rev. C (Some units used PCBAs from the 810A supply; see 810A list) With PCBA Main Assy.# 903513 Rev. E LS 700 Assy.# 907295 Rev. N With PBCA Main Assy.# 903386 Rev. L ORIGINATOR: J. BUSCAGLIA CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB052 Pg001 FIB 00053 06/17/86 *** Incorrectly logged Cache Parity errors - 9000 series on REL 9.5C *** Cache parity errors reported in the ERRORLOG under ECC errors are not reported correctly. Cache parity errors may randomly be logged against CPU 0 and not the appropriate CPU. Added steps need to be taken to determine which CPU's IDC PCB is logging errors. To determine which IDC is reporting errors, disable the suspect IDC PCB (Instruction/Data Cache) by placing the cache disable switch in the up position. The ERRORLOG should be renamed to "ERRORLOG.OLD" for future reference, and a new one created. A new errorlog will automatically be created at load time if no errorlog is detected while the system is loading. If there are no cache errors logged in the new ERRORLOG, then the suspected IDC PCB was the one and should be replaced at the next available time. If there are always cache errors in the ERRORLOG then enable the disabled IDC's cache and disable another. Repeat these steps until the defective IDC PCB is found. If errors appear to be on all IDC PCBs, then turn off the cache on all the IDC PCBs at the same time and verify that the cache errors are gone. (The RSTACK cache does not report errors to the ERRORLOG.) Enable the cache on the IDC PCBs one at a time, if the IDC PCB reports errors then replace it. Cache parity errors should not cause dumps. If there is a cache parity error, it will appear as a miss when the check is made to cache for data and will be forced to go to main memory. At this time the Cache Parity LED is being reset by firmware. You will only see the LED blink when a cache parity error is detected. A latch can be used to capture the error by monitoring test point E4 next to the Cache Parity LED. To use the "Y BUS" to latch the error proceed with the following: This process makes use of the Diagnostic Display Board; additionally, a "test lead" will be required. a. Connect the Diagnostic Display to the I/O CPU as you normally would. b. Connect a test lead from the pad marked "Ext" on the display board to test point "E4" on the IDC board of the I/O CPU. NOTE: Test point "E4" is the TOP test point of the two which are used to perform the lamp test on the yellow cache parity LED. c. Set position 1 of the dipswitch on the Diagnostic Display to the "EXT" position. d. At this time be sure to note what is displayed on the Diagnostic Display, it should not change. e. If a cache parity error occurs on the monitored IDC PCB, a different number will be latched into the display board. If no cache parity error occurs, the original number will remain. NOTE: The display is actually updated when the firmware resets the cache parity LED. f. If no error occurs after leaving the display connected for a sufficient amount of time, move the external clock lead to the next IDC board and repeat steps (d) thru (f). It is not necessary to move the "Y Bus" connection to the next CPU. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB053 Pg001 NOTE: Judgement will be needed to determine how long to wait before moving the clock to the next IDC. The frequency of error as determined by the ERROLOG will dictate the length of monitoring time. ORIGINATOR: D. LUQUE CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB053 Pg002 FIB 00054 10/12/87 *** Presite survey for MPx 80XX to MPx 9XXX field conversion *** When an existing MPx 8000 system is to be updated to an MPx 9000 or 9500 system a presite survey is required. 810 systems must have already had the 810 to MPx 8000 conversion done prior to being upgraded to the MPx 9000 Series System. Since the CPU now contains 3 PCB's per set and the disk drives may need to be recabled, this survey will help to establish the current state of the system and determine what materials and components will be needed to successfully carry out the upgrade. A Field Service Engineer and the Branch/Dealer should perform this survey together for the proper hardware to be ordered. NOTE: An 810 system is defined as a three (3) mainframe system. When upgraded to an MPx 9000 system only 27 chassis slots can be used. Refer to Field Bulletin #303. The MPx 9000 and 9500 system also requires the 9.5C OS level (or later) and a 9.5C configuration record. The MPx 8000 system needs to be running on 8.5C two weeks prior to any hardware conversion if the previous OS level is 8.4D or earlier. If the MPx 8000 system was running on an OS level of 8.4E or 8.5 then the two week run time on 8.5C is not required, though we do generally recommend that hardware and OS level changes are not done at the same time. The OS levels of 8.4E and 8.5C or later have the capability of updating the 9.5 OS/WCS on line. The OS level 8.5B does not support an online update of the 9.5 OS/WCS image. If you Do Not get the message "WCS version does not match the hardware type. "Do you want to continue anyway?" you must update the system disk with the 8.5C OS/WCS and install the INST and SYS nodes. Load from the 8.5C OS and then update to the 9.5 OS/WCS images so a disk load can be performed when the MPx 9000/9500 CPU PCB's are installed. Updating the hardware first and then doing a altload of the 9.5 OS tape to update the OS/WCS from tape is okay providing that the hardware has no problems. If problems are encountered you would have no diagnostics to run as a MPx 9000/9500 system. The ACS, MDI, TDP, and MPC PCB's are not supported on the MPx 9000 and 9500 system. There are no mandatory power supply revision levels but there are requirements that have to be met to insure proper power supply loading. Please refer to Field Bulletin #216 for additional information on power supply loading and PCB placement to achieve proper operation. There is a minimum of 4 megabytes of memory required for the MPx 9000. The memory PCB's in the MPx 9000 and 9500 systems need to be positioned between the DMA PCB and the BMTC PCB. This may cause recabling of internal cables. Refer to figures 1 and 2. Are the PCB's at or above their LARL (Lowest Acceptable Revision Level)? Use the procedures that are in effect in your location to bring PCB's to LARL. See the LARL listing for the MPx 9000 and 9500 system in the attached Check Off List. The DMA PCB which replaces the TDP PCB does not have tape drive support. Therefore, a BMTC is required for the support of a tape drive. One DMA controller will support up to 4 disk drives and two parallel printers. Replacing multiple TDP installations with the DMA CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB054 Pg001 controller will require some attention to disk cable lengths. The Bus cables are daisy chained from one drive to another for the drives that are on the same DMA controller. Since excessive Bus cable length can produce random data errors, it may be necessary to replace some Bus cables with shorter length cables. Total Bus length should not exceed 55 feet per DMA PCB. To help determine total Bus cable length, refer to Table 1. TABLE 1 Bus cable lengths are: 906608-004, 30' (Cntrl to Fix Dsk, Remote) 906608-006, 30' (Cntrl to Rem Dsk) 906608-012, 30' (Fix to Rem Dsk) 906608-018, 20' (Cntrl to Fix Dsk, Remote) 906608-019, 20' (Cntrl to Rem Dsk) 906608-020, 20' (Fix to Rem Dsk) 906608-014, 16' (Rem to Rem Dsk) 907155-002, 13' (Fix Dsk) 907155-004, 13' (Fix Dsk) 906608-021, 10' (Rem to Rem Dsk) 907155-001, 10' (Fix Dsk) 907155-003, 10' (Fix Dsk) Although the DMA controller will handle up to four (4) disk drives, performance increases when fewer drives are being accessed per controller. In a multiple DMA installation there are usually several ways in which the disks may be connected, one of which will give better performance. Generally, the best performance can be achieved when... 1) Multi-volume families are distributed across DMA controllers as opposed to concentrated on one controller. 2) Disks which receive the greatest amount of activity should be distributed across the DMA controllers rather than concentrated on a single controller. The lower usage disks can then be distributed across the controllers to be paired with the more active drives. Examples: A) 4 fixed disks in one family plus 2 removable. Cable up such that each DMA has two fixed and one removable disk attached, instead of 4 fixed on one DMA and removables on the other DMA. B) 5 fixed disk in one family. Cable 2 disks to the first DMA and 3 disks to the second DMA instead of 4 disks on one DMA and 1 disk on the remaining DMA. Are there enough slots for the additional PCB(s) required for the MPx 9000 and 9500 CPU? Now that the CPU is a 3 board set there will need to be an extra slot per CPU. There are 11 usable slots per mainframe. 810 systems will support no more than 27 usable slots. Also the need to have a BMTC will require an extra slot. These extra slots will be provided when the TDP PCB's are replaced by the DMA PCB (2 TDP's can be replaced by 1 DMA PCB), but there still may be a need to condense other CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB054 Pg002 PCB's. Example: one 16-Way vs two 8-Ways, one 4meg memory vs four 1meg memory. NOTE: If 16-Ways are substituted for 8-Ways, remember that an I/O panel comes with the 16-way, this will require rework to the existing serial cable ends. With the addition of a BMTC and if extra memory or ISDC's are installed the Dump Area on disk must be enlarged. If new PCB's are used to condense the PCB total and/or if new PCBs are added to the system, these PCB's need to be tested on the system prior to the conversion. An MPx 9020 system requires a 2 frame system due to slot requirements. Normal order procedures and exchange programs must be followed to achieve the slots required for the MPx 9000 and 9500 hardware and BMTC PCB. They are not part of the MPx 9000 and 9500 upgrade. Along with the MPx 9000 and 9500 CPU(s) and DMA controller, the upgrade will also include new color panels and system/fixed disk control panels if not already present. Old style frames use threaded screws where the new frames use 1/2 twist screws. The necessary hardware (including two blank control panels) for use with old style frames is included with each end panel set. The ordering of the new color panels is done separately from the upgrade kit market code. The price of these panels is still included in the price of the upgrade kit market code. Procedures for ordering the appropriate no charge panel market codes for upgrades only may be found in MAI Basic Four Marketing Announcement #392 for the U.S. and # 280 for International. Please refer to these announcements for further information. CHECK OFF LIST I) LARL OF PCB's (Lowest Acceptable Revision Levels) Use figure 3 to write in revision levels. [] 1 Megabyte Memory, and 1/2 Megabyte Memory, Assy# 903349, Rev."V" [] 2/4 Megabyte Memory, Assy# 903516, Rev. "E" [] MCS PCB, Assy# 903374, Rev. "L" [] BMTC PCB, Assy# 903413, Rev. "R" [] NIMLC PCB, Assy# 903381, Rev. "K" [] NIMLC PCB, Assy# 903534, Rev. "D" LARL 7/10/86 [] Hi-Speed Video PCB, Assy# 903377, Rev. "C" [] 8-Way PCB, Assy# 903383, Rev. "A" [] 16-Way PCB, Assy# 903437, Rev. "J" [] LAN PCB, Assy# 903595, Rev. "F" NOTE: For Power Supply concerns please refer to Field Bulletin #216, 303, & 303 Addendum. II) DISK DRIVE CONSIDERATIONS Total number of disk drives on the system is...Qty___ Number of drives to be installed; On DMA #1 Qty___ Total Bus length On DMA #2 Qty___ Total Bus length On DMA #3 Qty___ Total Bus length CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB054 Pg003 On DMA #4 Qty___ Total Bus length If the total length of the Bus cables exceeds 55 feet per DMA (4 drives per one DMA) then order "N" number of short Bus cables to keep length within 55 feet. (Refer to Table 1) [] Short Bus cable(s) 10' length Part # Qty___ [] Short Bus cable(s) 16' length Part # Qty___ III) MAINFRAME SLOTS vs PCB COMPLEMENT There are 11 usable slots per system mainframe. Other PCB(s) needed to achieve proper board complement/system requirements are: [] 2 Megabyte Memory Qty___ [] 4 Megabyte Memory Qty___ [] 16 Way Qty___ BMTC (For tape support) Qty___ NOTE: Minimum of 4 megabytes of memory is required on the MPx 9000 and 9500 system. IV) NEW SYSTEM COLOR PANELS/NEW CONTROL PANELS (** STOP ** Before going and further read Marketing Announcement "MPx Family New Color Panel" number 392 U.S. or number 280 International. This could be confusing!) If the upgrade is being done on a system that already has the new MPx color scheme then only the front panels need to be ordered. The quantity of front panels needed will equal the number of frames. If the system to be upgraded has the original sienna colors then both the front and top cover will need to be ordered. This too is equal to the number of frames. Use the proper Market Code to order the proper sets. If you have control panels other than the ones in figure 4, then they must be replaced to accommodate the new front color panels. [] Does the system have the new style system control panel? Refer to figure 2. [] New style system control panel required. [] Do the fixed disk drives have the new style disk control panels. Refer to figure 2. (This should pertain to model 4501 14" disks only) [] New style control panels needed Qty___ [] Quantity of frames that make up the system. Include mainframes and fixed disk frames in this total count. Qty___ [] Quantity of fixed disk frames in stand-alone module. Qty___ [] Quantity of End Panel sets. One set will need to be ordered per system and per stand-alone fixed disk modules. [] I/O panel and cable conversion kit(s) if required for PCB condensing. 8way kit Qty___ 4way kit Qty___ Cable conversion kit Qty___ [] If upgrade is on an 810 system without a fixed disk drive then the need of a support module will be required to accommodate the I/O panel if required. Be sure to indicate on the ETR CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB054 Pg004 what model of system this is going on so that the proper color panels will come with the support module. PN 906867-001 Qty___ V) OTHER [] 9.5C OS level [] 9.5C configuration record. (Submit PHOTO of current configuration record and list added hardware that may change configuration record.) DRAWING INFORMATION: See MBF WPS Bulletin #161A for drawings and figures. ORIGINATOR: D. LUQUE CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB054 Pg005 FIB 00055 08/22/86 *** Dump with 1,4,128,48 four-tuple on MPx 7000 system *** Four-tuple 1,4,128,48 "Invalid unit number in IOCB. An IOCB containing an invalid unit number was started. This may be the result of IOCB 0 being activated by mistake" has been reported on the MPX 7000 systems. This dump is inconsistent and happens when the SPOOLER is printing to a line printer at the same time SAVERESTORE is used, with both devices connected to the MPC controller. This dump has been recreated and is more prone to happen when the tape operation involves tape Mount (insert) or Unmount (taken out) from the tape drive while a print job is printing to a line printer. The fix for this problem will be in the WCS image of the 8.5D OS release. Print jobs printing to a serial printer while using SAVERESTORE are not reported to have this problem so if a workaround is needed until the 8.5D OS is available then: 1) Use SAVERESTORE when no printing is to take place. This will avoid the problem. 2) Do not Mount, Unmount or read from a tape while printing to a line printer. Dumps will occur with greater frequency during these operations. 3) Use a serial printer for concurrent print and tape operations. ORIGINATOR: D. LUQUE CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB055 Pg001 FIB 00056 08/22/86 *** Cautions and information on the Revision "S" MCS PCBA *** Revision "S" of the MCS PCBA adds another option to the switch setting of SW#1, the selection of either the MPx 7000/8000 Series Systems or the MPx 9000/9500 Series System. The need to have revision "S" MCS PCBA is NOT mandantory for the function of either system. To support up to 12MB of main memory on the MPx 9000/9500 Series System, the added address range was provided by re-arranging the shared memory and VCON controller addresses. This made the need to have the IMLC addressed in the board range of 32 thru 47. With the addition of the Revision "S" MCS PCBA, now any shared memory controller may also use addresses 32 thru 47 and the IMLC PCB's are no longer restricted to this range in the MPx 9000/9500 Series Systems. The setting of SW1-4 matches the differences between the two address schemes for the proper system type as follows: Switch SW1-4 open : MPx 7000/8000 Switch SW1-4 closed: MPx 9000/9500 NOTE: Revision "S" MCS is NOT a LARL issue. MPx 9000/9500 systems using lower revision boards do not need to be replaced with the MCS PCBA at the new revision level. If the MCS PCBA is changed in an MPx 9000/9500 system, check for controllers addressed in the board range of 32 thru 47 and/or if IMLC is other than 32 thru 47, then the revision "S" MCS PCBA (SW1-4 closed) will be required or the controllers will need to be re-addressed and the configuration tables changed accordingly. If the revision "S" MCS PCBA is set for the MPx 9000/9500 Series System (SW1-4 closed) and installed into an MPx 7000/8000 Series System, a BOOTSTRAP ERROR "FFFF" will occur at load time. The red LED (CR2 - parity error in WCS) on the ACS PCB will also illuminate. ORIGINATOR: D. LUQUE CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB056 Pg001 FIB 00057 09/22/86 *** 9000/9500 Systems board placement information *** The following table shows the minimum and maximum number of PC boards for the 9000/9500 system: ITEM MINIMUM MAXIMUM REMARKS ------------------------------------------------------------------------------- CPU 1 3 1 thru 3 mainframes MEMORY 4MB 12MB Maximum of 9 MEM + BMTC boards allowed (three per chassis). DMA CONTROLLER 1 4 Supports 1 to 4 disk units plus 2 parallel printers. DISK 1 16 9500 system - (up to 8ea 14" and 1 12 9000 ststem - (removables. Up to the limit adding 8" drives. BMTC 1 2 Controls 1/4" and 1/2" tape drives 1/2" TAPE 1 2 MTR, MTS and/or GCR 1/4" MCS TAPE 0 1 Via BMTC PARALLEL PRINTER 0 4 Any combination of 150/300/600/1000 LPM SYSTEM PRINTERS 1 99 Parallel or serial to MCS, 8-way or 16-way controllers TERMINALS 1 164 Any combination of HVDT's, VDT's and serial printers VCON CONROLLER 0 6 HVDT's (four per controller) ISDC 0 10 8-ways and/or 16-ways NIMLC 0 2 Supports TBC, 3270, DWII MDT's 0 8 Via NIMLC SLAVE SER. PTR's 0 164 Via VDT's printer ports ............................................................................... *** NOTE ON POWER SUPPLY LOADING *** In a multiple chassis syatem, most of the load may be concentrated in one chassis; this is permissable, as the power supplies are tied in parallel. When the power supplies are unparalled for any reason, remember that the load can be excessive for just one power supply to handle. In this case, PC boards should be removed from the backplane, leaving only a few boards to provide a load for the power supply. ............................................................................... *** 9000/9500 BOARD PLACEMENT REQUIREMENTS FOR SINGLE & MULTIPLE MAINFRAMES *** SINGLE MAINFRAME SYSTEM (SEE FIGURE 1): 1. Two terminator boards are required, leaving 11 useable card slots. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB057 Pg001 2. Except for terminator boards, all boards must be consecutive, with no empty . slots beetween them. There may be empty slots at either end. 3. There is only one MCS board per system. 4. The AMS/ESTK/IDC set makes up the processor unit and must be located immediately to the right of the MCS board. The order from left to right is: MCS, AMS, ESTK and then IDC. 5. The DMA controller(s) must be located immediately to the right of the IDC. 6. The MEMORY board(s) must be located immediately to the right of the DMA(s). The sum count of MEMORY and BMTC boards must not exceed three. 7. The BMTC board(s) must be located immediately to the right of the MEMORY. 8. All 8-way and 16-way controllers with backpanel connections should be located to the left of the MCS board. 8-way controllers with cables direct to terminals may be located on either side. 9. VCON controllers may be located on either side. 10. NIMLC controllers must be located on the right side. BOARD PLACEMENT - SINGLE FRAME :---:---:---:---:---:---:---:---:---:---:---:---:---: : T : : : : : : : : : : : : T : : E : : : : : : : : : : : : E : : R : 1 : : : : : : : M : : : : R : : M : 6 : 8 : : : : : : E : : : N : M : : I : : : : : E : : : M : B : V : I : I : : N : W : W : M : A : S : I : D : O : M : C : M : N : : A : A : A : C : M : T : D : M : R : T : O : L : A : : T : Y : Y : S : S : K : C : A : Y : C : N : C : T : : O : : : : : : : : : : : : O : : R : : : : : : : : : : : : R : :---:---:---:---:---:---:---:---:---:---:---:---:---: FIGURE 1 ............................................................................... DOUBLE MAINFRAME SYSTEM (SEE FIGURE 2): 1. Two terminator boards plus two intercnnect boards are required for a two mainframe system. This leaves 22 usable slots. 2. Except for terminator boards, all boards must be consecutive, with no empty . slots beetween them. There may be empty slots at either end. 3. There is only one MCS board per system. 4. The AMS/ESTK/IDC set makes up the processor unit and must be located immediately to the right of the MCS board. The order from left to right is: MCS, AMS, ESTK and then IDC. Both CPU sets must be next to each other and in the same chassis. 5. The DMA controller(s) must be located immediately to the right of the IDC. If there are more than one DMA boards, they must be next to each other and CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB057 Pg002 located in the same chassis. 6. The MEMORY board(s) must be located immediately to the right of the DMA(s). The sum count of MEMORY and BMTC boards must not exceed six. 7. The BMTC board(s) must be located immediately to the right of the MEMORY. A maximum of two BMTC boards are allowed in the system. 8. All 8-way and 16-way controllers with backpanel connections should be located to the left of the MCS board. 8-way controllers with cables direct to terminals may be located on either side. 9. VCON controllers may be located on either side. 10. NIMLC controllers must be located on the right side. BOARD PLACEMENT - LEFT FRAME OF TWO FRAME SYSTEM :---:---:---:---:---:---:---:---:---:---:---:---:---: : T : : : : : : : : : : : : I : : E : : : : : : : : : : : : N : : R : 1 : : 1 : 1 : : : : : : : : T : : M : 6 : 8 : 6 : 6 : : : : : : : : E : : I : : : : : : : E : : : E : : R : : N : W : W : W : W : M : A : S : I : A : S : I : C : : A : A : A : A : A : C : M : T : D : M : T : D : O : : T : Y : Y : Y : Y : S : S : K : C : S : K : C : N : : O : : : : : : : : : : : : N : : R : : : : : : : : : : : : . : :---:---:---:---:---:---:---:---:---:---:---:---:---: BOARD PLACEMENT - RIGHT FRAME OF TWO FRAME SYSTEM :---:---:---:---:---:---:---:---:---:---:---:---:---: : I : : : : : : : : : : : : T : : N : : : : : : : : : : : : E : : T : : : M : M : : : : : : : : R : : E : : : E : E : : 8 : : : : N : 8 : M : : R : : : M : M : B : : V : V : V : I : : I : : C : D : D : O : O : M : W : C : C : C : M : W : N : : O : M : M : R : R : T : A : O : O : O : L : A : A : : N : A : A : Y : Y : C : Y : N : N : N : C : Y : T : : N : : : : : : : : : : : : O : : . : : : : : : : : : : : : R : :---:---:---:---:---:---:---:---:---:---:---:---:---: FIGURE 2 ............................................................................... TRIPLE MAINFRAME SYSTEM (SEE FIGURE 3): 1. Two terminator boards plus four intercnnect boards aare required for a three mainframe system. This leaves 33 useable slots. NOTE! Converted 810 systems, due to power supply limitations, must not have more than 27 PCBa installed. 2. Except for terminator boards, all boards must be consecutive, with no empty . slots beetween them. There may be empty slots at either end. 3. There is only one MCS board per system. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB057 Pg003 4. The AMS/ESTK/IDC set makes up the processor unit and must be located immediately to the right of the MCS board. The order from left to right is: MCS, AMS, ESTK and then IDC. ALL CPU sets MUST be next to each other and in the middle chassis with the last IDC board next to the right interconnect board. 5. The DMA controller(s) must be located in the left-most slots of the rightmost chassis. If there are more than one DMA boards, they must be next to each other. 6. The MEMORY board(s) must be located immediately to the right of the DMA(s). The sum count of MEMORY and BMTC boards must not exceed nine. 7. The BMTC board(s) must be located immediately to the right of the MEMORY. A maximum of two BMTC boards are allowed in the system. 8. All 8-way and 16-way controllers with backpanel connections should be located to the left of the MCS board. 8-way controllers with cables direct to terminals may be located on either side. 9. VCON controllers may be located on either side. 10. NIMLC controllers must be located on the right side. BOARD PLACEMENT - LEFT FRAME OF THREE FRAME SYSTEM :---:---:---:---:---:---:---:---:---:---:---:---:---: : T : : : : : : : : : : : : I : : E : : : : : : : : : : : : N : : R : : : 1 : 1 : 1 : 1 : 1 : : : : : T : : M : : 8 : 6 : 6 : 6 : 6 : 6 : 8 : : : : E : : I : : : : : : : : : V : V : V : R : : N : : W : W : W : W : W : W : W : C : C : C : C : : A : : A : A : A : W : A : A : A : O : O : O : O : : T : : Y : Y : Y : Y : Y : Y : Y : N : N : N : N : : O : : : : : : : : : : : : N : : R : : : : : : : : : : : : . : :---:---:---:---:---:---:---:---:---:---:---:---:---: BOARD PLACEMENT - CENTER FRAME OF THREE FRAME SYSTEM :---:---:---:---:---:---:---:---:---:---:---:---:---: : I : : : : : : : : : : : : I : : N : : : : : : : : : : : : N : : T : : : : : : : : : : : : T : : E : : : : : : : : : : : : E : : R : V : : : E : : : E : : : E : : R : : C : C : M : A : S : I : A : S : I : A : S : I : C : : O : O : C : M : T : D : M : T : D : M : T : D : O : : N : N : S : S : K : C : S : K : C : S : K : C : N : : N : : : : : : : : : : : : N : : . : : : : : : : : : : : : . : :---:---:---:---:---:---:---:---:---:---:---:---:---: BOARD PLACEMENT - RIGHT FRAME OF THREE FRAME SYSTEM CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB057 Pg004 :---:---:---:---:---:---:---:---:---:---:---:---:---: : I : : : : : : : : : : : : T : : N : : : : : : : : : : : : E : : T : : : M : M : M : : : : : : : R : : E : : : E : E : E : : : : N : N : : M : : R : : : M : M : M : B : V : V : I : I : : I : : C : D : D : O : O : O : M : C : C : M : M : : N : : O : M : M : R : R : R : T : O : O : L : L : : A : : N : A : A : Y : Y : Y : C : N : N : C : C : : T : : N : : : : : : : : : : : : O : : . : : : : : : : : : : : : R : :---:---:---:---:---:---:---:---:---:---:---:---:---: FIGURE 3 ORIGINATOR: J. BUSCAGLIA CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB057 Pg005 FIB 00058 10/01/86 *** 9XXX won't load, hangs or dumps with 2,10,3,3 - 1,137,0,3 4-tuple *** The CPU ID switch, S-4, at location 5EE on the ESTK PCBA, may develope a problem in that the contacts can become intermittent or open. This condition can cause any of the following: 1. The system will not load. The CPU ID may become a duplicate ID to another CPU an an illegal ID. 2. The system hangs. While the system is running, the CPU ID switch may become open causing the hang condition. 3. The system dumps. While the system is running, the CPU ID switch may become intermittent causing a dump with a four-tuple of 2,10,3,3 - 1,137,0,3 (Instruction fault in IO module - byte offset field of pointer exceeds segment size. An attempt was made to access a segment beyond the end of the segment). When installing the ESTK PCBA, insure that the switch is properly set by using an ohmmeter across the pins of the switch on the solder side. The CPU ID's may be verified using a voltmeter or oscilloscope on the top foreplane (CPU interconnect) connector, J2. Pin 1 is at the bottom of the connector, "A" is the left hand row, "B" is the center row and "C" is the right hand row. J2-24A J2-24B J2-24C CPU ID# LOW HI HI 0 HI LOW HI 1 HI HI LOW 2 NOTE: ECN # 11589 corrects this problem by replacing the switch with another type. However, this is not a field installable ECN. ORIGINATOR: D. LUQUE CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB058 Pg001 FIB 00059 10/01/86 *** REMIDI now has test for 2,10,x,x dumps on 9XXX Systems *** SYMPTOM: 2,10,X,X DUMPS; REMIDI fails wth error codes of 6C01, 6C02 or 6C03. PROBLEM DETERMINATION: A test was added to REMIDI to help detect the cause of 2,10,x,x dumps. This test will set up a special timing sequence to test the 869 IC on the ESTK board. The 869 IC is an 8-bit synchronous counter which makes up part of the memory address registers. This IC was found tp occaisionally fail on low voltage margins. When running this test, the system should be set to low margin. When REMIDI has completed, return the system to normal voltage margin. The error codes for this test are 6C01, 6C02 and 6C03, which would indicate a component failure on the ESTK board. This test will be added to the 9.6A REMIDI. Copies of this version of REMIDI will run an any 9.5 level and will be supplied upon request. For further information on REMIDI, please refer to DOCWRITER under the INST node. FIX: If this REMIDI test fails with a 6C01, 6C02 or 6C03 error code while running under normal OR low voltage margins, replace the applicable ESTK board. ORIGINATOR: L. SANDERS CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB059 Pg001 FIB 00060 10/30/86 *** Systems hangs, disk off line, slow disk image backup - 9000 Systems *** SYMPTOM: 1). System hangs. 2). Disks may repeatedly report 'off line' if ID CRC errors occur. 3). Slow disk to disk image backup. PROBLEM DETERMINATION: Check revision level of the DMA controller (903554). FIX: Replace DMA controller (903554) if below Rev. G. NOTE: This revision to the DMA controller will also incorporate support for the new 600 LPM band printer (PT 4220). ORIGINATOR: D. LUQUE CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB060 Pg001 FIB 00061 10/30/86 *** Dumps with 28,255,0,0 four-tuple on 8.4E,8.5D/9.5D *** Two special circumstances can cause a diagnostic dump to occur on O.S. levels 8.4E and 8.5D/9.5D. In both cases, system security checking must be enabled, and File System Security Override must be set to FALSE. The four-tuple of the dump is 28,255,0,0. The first situation to cause the dump is when a non-owner of a file (who has read access to the file) attempts to copy the file, with NEWRIGHTS set to TRUE (the default). The copy will complete successfully, and then the system will dump. A workaround for this problem is to have the user doing the copy set NEWRIGHTS to FALSE. The other situation is when a non-owner of a file attempts to change the Usage Rights of the file using the UPDATE.RIGHTS utility. The following messages will be displayed: "Privilege insufficient" and "File rights not updated - ERROR". Then the system will dump. (The Usage Rights will change, however. This is a bug, because a non-owner of a file should not be able to change the Usage Rights. This bug will be fixed in release 8.6A.) The workaround for this problem is to only have the owner of a file change the Usage Rights with UPDATE.RIGHTS. Use of the system may proceed normally after the dump completes. The system does not need to be reloaded after a diagnostic dump. This problem is fixed in 8.6A. IMPORTANT NOTE: The diagnostic dump must be allowed to complete. If an attempt is made to reload the system while the dump is in process, file reconstruction . may be necessary. ORIGINATOR: N. PRENTISS CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB061 Pg001 FIB 00062 05/27/87 *** LS-700 or UPPS-100 adjustment/balancing on multi-frame CPU's *** Whenever a UPPS-100 power supply (810) or an LS-700 power supply (MPX series) must have the output voltages adjusted, if there are more than one of them in the CPU (multi-frames), ALL of the unprotected supplies must be adjusted and balanced individually. The following is a procedure to accomplish this: *** CAUTION *** When applying power to the separate frames, there can be no more than three of a combination of memory and BMTC PCBA's plugged into the backplane when separated. Also in a 9000 CPU that is a converted 810 and has UPPS-100 instead of LS-700 supplies, there can be no more than 9 PCBA's in one frame under any circumstance. INITIAL SET-UP: 1. Power down the CPU from the back and unplug from the wall receptacles. 2. Remove the +5 volt jumper(s) connecting the CPU backplanes together. 3. If this CPU has LS-700 power supplies, disconnect the cable plugged into J16 of the LS-700 in frame 2. Also, if there is a third frame, unplug the cable plugged into J16 of the LS-700 in frame 3. 4. Unplug one end of each pair of terminator interconnect boards, as necessary, to isolate the backplanes from each other. 5. If necessary, unplug PCBA's to prevent overloading of any of the individual unprotected power supplies as mentioned in the caution above. 6. Converse to step 5, there must be a load of at least 10 amps on each LS-700 +5 volts supply while they are separated. Check each chassis, using the chart shown in Figure 1, and insert PCBAs as necessary to bring the load up to at least 10 amps. +5 VOLT PCBA LOAD IN AMPS ------------------------- AMS 16 ESTK 16 IDC 15 DMA 15 MDI 14 ACS 13.9 BMTC 11.4 MPC 10.4 16-WAY 9.2 LAN 8.8 VCON 8.8 IMLC 6.9 MCS 5.5 8-WAY 5 MEM 1/2/4MB 3.6 TERMINATOR 1.9 Figure 1 CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB062 Pg001 1ST (PRIMARY) FRAME VOLTAGE ADJUSTMENTS: 1. Restore power to the frames in the back and power on from the control panel. 2. Using a digital voltmeter, adjust the output voltages of the UPPS-100 or LS-700 supply. Be very precise in your adjustments. Try to set them EXACTLY to specified level, i.e., + or - .00 volts. It is highly advisable to check for ripple/noise on the voltages using an oscilloscope. You should see no more than 100 mv on the +5 volts and no more than 200 mv on the others. 2ND FRAME VOLTAGE ADJUSTMENTS: 1. Adjust and check the voltages from the UPPS-100 or LS-700 in frame 2, using the instructions in step 2 of the frame 1 procedure above. 2. If this CPU has only 2 frames proceed to step 2 of the 3rd frame procedure below. 3RD FRAME VOLTAGE ADJUSTMENTS: 1. Adjust and check the voltages from the UPPS-100 or LS-700 in frame 3, using the instructions in step 2 of the frame 1 proceedure above. 2. Power down from the front panel, turn off the breakers on all frames in the back, unplug the power cables from the wall receptacals and then restore all previously disconnected cables, the +5 volt jumper(s) between the backplanes and plug in all terminator interconnect cards and PCBA's that you may have unplugged. CHECKING THE LOAD BALANCE ON THE UNPROTECTED SUPPLIES: The procedure done thus far is sufficient for all voltages except the +5 volts. Since the +5 volts output busses of the unprotected power supplies are all paralleled together, they should each provide an nearly equal share of the +5 volt current drawn by the CPU. Since the current drain is quite high from the +5 volts, it is highly advisable to measure the AC CURRENT into each of the un- protected power supplies to verify that each supply is working properly. This can be effectively measured by clamping a clamp-on AC ammeter over either the AC hot wire feeding each frame's ACDU or the AC hot wire feeding the unprotected power supply (the preferred check point). You can make adapter cables which will allow you to clamp the ammeter over the. AC hot wire feeding the ACDU from the wall receptacle, which would make this adjustment easier. Alternatives are to clamp the ammeter over the AC hot wire inside the breaker panel for the system or to pull the wall receptacles from the wall and clamp the ammeter over the AC hot wire there. TOOLS REQUIRED: A clamp-on type AC ammeter which has a range of 0 to 10 or 0 to 15 amps. The AMPROBE model RS3 works well in this application. PROCEDURE: 1. Install adapter cable(s), if you have them, and power up the system. 2. Check the AC current flowing into each ACDU or unprotected power supply. If you wish to monitor input current into the LS-700/UPPS-100 instead of the ACDU, this may be done by clamping the ammeter over one of the three wires in CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB062 Pg002 the cable connecting from the ACDU to the LS-700/UPPS-100 J1. One of these wires is tied to ground and carries no current. Either of the other two wires may be used to measure input current into the unprotected supply. This method of current measurement is the most accurate and is advised. *** NOTE *** Check the current at the same point for each frame. If you are measuring at the ACDU input on one frame, do it the same way on the other frame(s). 3. Due to the fact you are measuring the AC input current into the unprotected power supplies, the current probably will not be exactly the same. This is due to component variations from one supply to the next and also due to any imbalance of load on the +12V and -12V power supplies. However, since 75% to 90% of the total load on the supply is drawn from the +5 volts, the AC input currents on all unprotected supplies should be within 1.5 amps of each other (assuming PCBA distribution in the frames is properly done). The reading will typically be in the range of 3 to 7 amps each. 4. If you find a variation of more than 1.5 amps of input current between the supplies, take steps to determine the reason as follows: A) Re-check the separate adjustments of the power supplies. + or - .00 volts IS required. B) Does the frame with the higher input current have a full or near full load of PCBAs in it and the other frame(s) have only a few. If this is the case, a more even distribution of the PCBA population is advised. After redistributing the PCBAs check the input currents again. C) It is possible that one of the supplies cuts off when paralleled with the other(s). If this occurs, typically it will be drawing 1 to 2 amps while the others will be drawing 5 to 7 amps. If this occurs, replacement of the supply will be necessary. If a supply is changed, you must break apart the frames and adjust again. D) Regardless of what is required to resolve the mismatch, do not leave the supplies without achieving a near balance. In some cases, it may be necessary to "tweek" the +5 volt regulator pot on a problem supply, in order to bring the output within specification. ORIGINATOR: H. MITCHELL CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB062 Pg003 FIB 00063 12/02/86 *** Y-bus display and controller self-test instructions and info *** This FIB contains a collection of instructions for the MPX series controller self tests and Y-BUS display usage. Also included is any miscellaneous information concerning the Y-BUS display unit. ------------------------------------------------------------------------------- *** OLD AND NEW STYLE Y-BUS DISPLAY KIT PART NUMBERS *** Old style kit = MM899000 New style kit = MM899340 ------------------------------------------------------------------------------- *** USE OF DIAGNOSTIC DISPLAY - P/N MM899340 *** CONNECTOR J7 - MCS: This connector (and function) is valid only for MCS boards with assembly number 903363, that is the MCS with .5 megabytes of memory. Socket at location 11DD is used for this purpose. This connector is used to display the information provided by the ECC syndrome bits. Either the corrected bit and bank for a single bit error or the occurrence of a multi-bit error is indicated. The display is illuminated only when anerror occurs. The display may illuminate when first plugged into the MCS. Depressing the reset button will clear the display. CONNECTOR J6 - 1MB: .This connector is functionally identical to J7. It is used for the one megabyte memory board (pin out of ECC signals is different between MCS and memory). When the cable between the display and memory is properly connected, there will be a half twist in the cable (pin 1 on the display is at the top; on the memory it is at the bottom). CONNECTOR J5 - 8 BIT: This connector is used for shared memory devces (ISDC's): 8-way controller IMLC 4-way controller portion of the MCS board Use of the new display board on the 8-way and IMLC is identical to using the display on these assemblies. When the target device is the MCS 4-way, use the socket at: Location 9E on MCS board without memory (903374) Location 11J on MCS board with memory (903363) CONNECTOR J4 - DISPLAY: The signals on this connector are those driving the LED displays. The purpose CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB063 Pg001 of this connector is to allow the user to remote a display with the front panel in place. The user may connect another nre style display board (MM899340) or an old style display (MM899000) in parallel. Use the long (40 inch) cable and connect to J4 on another new display or P2 on an old display. NOTE It will be necessary to supply +5 volts to this second display by connecting it's +5 lead to + side of capacitor - C1 on the frst display board. NOTE Do not use this cable for any other function (i.e., shared memory/8 bit mode, PCB test sockets are not buffered and usng the long cable may cause problems). SUMMARY TABLE FOR DIAGNOSTIC DISPLAY USAGE USE DISPLAY CABLE DIPSWITCH POSITIONS REMARKS CONNECTOR NUMBER 1 2 3 4 (SEE BELOW) 810 Y bus J2 907032-003 down down down X (1) 7/8000 CPU J1 907032-002 down down down X (1) (2) Y bus J3 906628-004 1 meg mem with ECC J6 907174-006 down down up up (3) MCS memory J7 907174-001 down down up down (3) MCS 4-way J5 303000-001 down up down X (4) 8-way J5 303000-001 down up down X (4) IMLC J5 303000-001 down up down X Remote disp. J4 907174-012 - depends upon usage as above- (5) BMTC J5 907174-001 down up down x (1) Placing position of the dipswitch down and connecting a jumper to TP1 (next to dip switch) will allow using an external clock. (2) Actual error strobe is applied to display via J3. (3) +5 volts for display is provided through the indicated cable. Separate connection for +5 volts is not required for this use. (4) Placing board into constant self-test requires a self-test PROM and loopback cable(s). (5) It will be necessary to provide +5 volts to the remote unit. Either the old or new display may be used as a remote. ------------------------------------------------------------------------------- *** REPLACEMENT CABLES ARE AVAILABLE FOR Y-BUS DIAGNOSTIC DISPLAY UNIT *** Subject: 8000 Series/System 810, Diagnostic display, replacement cables The following "MM" numbers may be used to order replacement cables for either the new style or old style diagnostic display ("Y" bus display). USE BFISD P/N MM NUMBER 810 Y Bus (CE) 907032-001 899360 * 8000 Y Bus (ACS) 907032-002 899350 ACS Y Bus, Error Strobe 906628-004 899370 1 Meg Memory, ECC Strobe 907174-006 899390 IMLC, all ISDC Controllers 303000-001 899400 * "Remote Display" 907174-012 899380 *BMTC 907174-001 899530 CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB063 Pg002 * Pertains also to the "old" style display ------------------------------------------------------------------------------- *** NIMLC SELF TEST INSTRUCTIONS *** Required Item: Diagnostic Display Kit (Y Bus Display) BFISD P/N 907072-001, MM899000 PROCEDURE: 1. Turn power OFF and remove IMLC. Connect Diagnostic Display, using 20 conductor ribbon cable supplied, to 20 pin socket at location 7U on IMLC (See system 810 Service Manual). 2. Re-install IMLC, then turn power ON. Display should go to 'FFFF'. 3. Self test may be initiated in one of two ways. By performing a normal load the IMLC is forced into self test for one pass. By use of a jumper, the IMLC may be forced into an endless self test of one two, three, etc. passes. System Initiated Self Test 1. With sense switches set to load the 'normal' O.S. (Boot directories 0 or 1). depress the load button. 2. After the system initializes you will get the load menu with options 1, 2 and 3. Immediately after you select option 1, "normal Operation", and set the date and time, the IMLC will enter self test. RESULTS: 1. Successful completion of the self test takes approximately 15 seconds, at the end of this time the display goes to '0000' and the green Led on the IMLC will light. B. An IMLC failing self test will display a status of 'FFNN', where 'FF' denotes that pass number '00' was not completed and 'NN' is an error code (See Table 1). Additionally, a 'failed' IMLC will not light the green Led. Forced Endless Self Test 1. To place IMLC into endless self test, remove a spare jumper from the "Jumper Holder" at top front of PCB (location 9B). Place this jumper on "JMP C" (approximate location 7B). NOTE: If you are unable to reach "JMP C", turn OFF power to CPU, remove IMLC and install jumper. Re-install IMLC and turn power ON. 2. Set all sense switches (on AUX board) up, and depress ALTLOAD. This will prevent the system from entering the boot sequence and interfering with the IMLC by doing the memory test. RESULTS: 1. When ALTLOAD is depressed, the display will go to 'FFFF' (if not already there). In a short time the display will go to '00FF', then '01FF', etc.; the upper byte representing the number of passes through the self test. 2. If an IMLC fails self test in any pass, an error code will be displayed by the lower byte. This error number will remain latched until ALTLOAD is again depressed. The pass number, however, will continue to increment. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB063 Pg003 NOTE: Do not forget to remove jumper when attempting to run IMLC on-line. TABLE 1 IMLC ERROR CODES Lower Byte of Display Meaning 01 ROM checksum error 02 Memory read/write error 03 CTC channel is bad 04 Some DMA channel can't do block move 05 Some DMA channel can't read memory 06 Some DMA channel can't write memory 07 A PIO channel is bad 08 ICOM channel has problems 09 XCOM channel has problems 0A Error in decoding I/O ports 0B Error in test RAM used for ROM 0B Error in ICOM S10-DMA test 0C Error in XCOM S10-DMA test 0D Error in shared memory interface NOTE: When filling out a DMT, include the error code if board failed self test. ------------------------------------------------------------------------------- *** USING THE MCS SELF-TEST PROM WITH THE Y-BUS DISPLAY *** REQUIRED EQUIPMENT: 1. Diagnostic display - either old or new style. 2. MCS self-test prom (MM899430). 3. MCS loopback cables (MM899460), two sets. PROCEDURE: 1. Remove all CPU via rear circuit breakers. 2. Remove MCS PCBA. 3. CAREFULLY, remove the "normal" monitor prom using a small screwdriver. A. Location 8C on MCS PCBA P/N 903374. Note how the prom is installed, as it is a 24 pin prom plugged into a 28 pin socket. B. Location 5A on MCS PCBA P/N 903363. 4. Install self-test prom into the socket vacated in step 3 above. 5. Install diagnostic display cable (P/N 30300-001). The end with a "dip-plug" the socket at location: A. 9E of MCS PCBA P/N 903379 B. 11J of MCS PCBA P/N 903363 6. Install self-test prom. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB063 Pg004 7. Connect the other end of the diagnostic cable to: A. Connector P2 of the old style diagnostic display P/N MM899000 B. Connector J5 of the new style diagnostic display P/N MM899340 8. Power for the display unit may be obtained from the +5 volt test point on a terminator. 9. Insure that the diagnostic display is set up for "8 bit" mode. 10. Restore power to the CPU. 11. Install the MCS loopback cables such that one pair connects port 0 to port 1 and the othe pair connects port 2 to port 3. 12. Set all sense switches to the up position and press altload. 13. The Z80 on the MCS board will now progress through the self-test as follows: .............................................. . a) displays 0000 Test (1) display board b) displays 1111 Test (2) Z80 address and data lines c) displays 2222 : : Any display wher all four digits are not the same is an error (i.e. 2212) : : d) displays FFFF .............................................. e) displays 1000 Memory test If a failure occurs, display will alternately flash the same two 2-byte number (address on one pass, expected data and actual data on next pass; expecte data displayed as upper byte). .............................................. . f) displays 2000 CTC test, failure is latched 2002 .............................................. . g) displays 3000 UART tests for ports 0 and 1 Fails and displays of 3003 if loopback cable not connected between port 0 and port 1. 3003 is also the display when this test fails. .............................................. . h) displays 4000 UART tests for ports 2 and 3 Fails and displays of 4004 if loopback cable not connected between port 2 and port 1. 4004 is also the display when this test fails. .............................................. . i) displays 900D This is interpreted as "good" (GOOD), indicating succesful completion of the test. 14. When testing is complete, turn off all power, remove MCS, replace monitor prom, re-install MCS and restore power. Note: In the event tha the MCS failed the self-test prom, be sure to indicate the display information on the DMT. LOOPBACK CABLE FOR MCS 4-WAY TESTING (TWO SETS ARE REQUIRED ______________ : : ________:12 : CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB063 Pg005 :_______:13 : : : ____________________:7 : : ____________:3 : : : :____________: : : : : : : : : ____________ : : : : : : ________:12 : : : :_______:13 : : : : : : :___________:7 : :___________________:3 : :____________: Pins 12 and 13 account for cable present, pins 3 and 7 cross connect send on one connector to receive on second. Cable length should be four (4) inches. ------------------------------------------------------------------------------- *** DISPLAYING MCS BOARD STATUS WITH THE DIAGNOSTIC DISPLAY *** GENERAL: MCS board status may be displayed old or new style y bus displays. PROCEDURE: 1. Set diagnostic display board for 8-bit mode (for memory mapped controllers). 2. Select the cable with a 20 pin header on one end and a 20 pin dip plug on the other end (303000-001). 3. Connect the end with the header to: P2 on old style display J5 on new style display 4. Completely power down the CPU from the rear of the mainframes. 5. Pull out the MCS board far enough to allow insertion of the remaining end of the display cable. 6. Reinstall the MCS board and power up the CPU. 7. Power for the display board may be obtained from the +5 volt terminal on a terminator board. 8. When the load button is depressed, the following sequences should be occur: 21xx - MCS in memory test 22xx - MCS in memory refresh test 23xx - MCS in interrupt test 24xx - CTC test 25xx - SE10 test NOTE In the event of an MCS failure, indicate the display contents on the DMT. RESULTS: CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB063 Pg006 Normal monitor PROM sequence: 1. Normal O.S. load: System reset (with load or altload)...display goes to 1Exx, shortly after it. should go to 62xx. Upon selection of load type the display goes to 60xx. NOTE xx indicates that the last two digits vary. 2. DEMON load: Display again starts at 1Exx, then goes to 2xxx. After DEMON loads, display . momentarily goes to 10xx, then goes and stays at 20xx (monitor section of the PROM). 3. REMIDI load: REMIDI 3.1.2 and 3.1.3, display progresses through the same sequence as for a normal load, but ends up in 62xx display. REMIDI 3.1.4 and higher, display progresses as it does through DEMON. 4. Display meanings: 0000 - Z80 processor is reset 10xx - in standby ------------------------------------------------------------------------------- *** 8-WAY SELF TEST INSTRUCTIONS *** Required Items: 1. Diagnostic Display Kit (Y Bus Display) BFISD P/N 907072-001, MM899000 2. Self Test Prom 8-way controller "A" Version, BFISD P/N 650891, MM899220 or "B" Version, BFISD P/N 650892, MM899230 NOTE: Difference between A and B versions is in the UART test, the A version takes longer to run (approx. 12 min.) as it cycles through each port at varying baud rates with varying data patterns. 3. Loop-back cable assembly, (Plug) for autodial port (ACU), BFISD P/N 907223-001, MM899190. PROCEDURE: 1. After turning power OFF and removing 8-way controller, connect Diagnostic Display to 8-way test socket (see System 810 Service Manual). Switch at lower right of display board should be in the 8-BIT position. 2. Connect loop-back plug to autodial port on 8-way NOTE: Failure to use loop-back plug will result in failing the ACU test and looping on that error, giving a display of "0001" hex. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB063 Pg007 3. Remove normal 8-way monitor prom (16 Pin) at location 3W on PCB. Insert self test prom (24 Pin) at location 3X. NOTE: These two proms cannot both be present at the same time as addresses overlay each other. 4. Re-install 8-way controller, then turn power ON. 5. Set all sense switches (on AUX board) up, depress ALTload (to prevent system from entering the boot sequence and doing the memory test). Testing and Display indications: 1. First LED (top, MSB) displays test type: 0 = ACU (autodial) test, output is looped to input 1 = Memory array test 2 = UART test, cycles through all 8 UARTs 3 = Timer test 9 = All tests passed 2. Second LED: Valid during UART tests ONLY, digit displayed represents channel number of UART currently in test. 3. Third and Fourth LEDs (two least significant hex digits): a. When these two digits are constantly changing (as in the UART test) they represent a data test pattern). b. When any hex values are latched (non changing) these represent an error number useful for chip level repair. Record these error codes on the Defective Material Tags when returning PCB's which fail self-test. General: If no errors occur, only one pass is completed and the four hex digits will display "900d" (an attempt to write 'good'). If an error does occur, the test prom will loop on the error so that it continues to be displayed. i.e. 24xx, failed UART test for channel 4, specific error is xx. *** DO NOT FORGET TO REMOVE DIAGNOSTIC PROM AND REPLACE MONITOR PROM *** REMOVE SYSTEM POWER TO CHANGE PROMS ------------------------------------------------------------------------------- *** INSTRUCTIONS FOR RUNNING THE SELF-TESTS ON THE 16-WAY CONTROLLER *** SUBJECT: Series 8000, 16-Way Controller Running Endless Self-Tests Required Equipment: 1. Diagnostic display New Style - MM899340 Old Style - MM899000 2. 16-Way Loppback plugs MM896210 (includes 2 loopback plugs) CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB063 Pg008 General: 1. Lower half of board (ports 0 thru 7). Use socket at location 6T for diagnostic display. Use positions 1, 2 and 3 of Dipswitch at location 6N to select desired tests 2. Upper half of board (ports thru 15). Use socket at location 6K for diagnostic display. Use positions 4, 5 and 6 of Dipswitch at location 6N to select desired tests Test Procedure: 1. Completely power down the 8000 (via breakers on ACDU). 2. Remove the 16WC. 3. Depending on which half of the 16WC is to be tested, select the desired self-test with the dipswitch at location 6N and install the Diagnostic Display. 4. Reinstall the 16WC. 5. Set all sense switches to the ON position (MCS boards: all switches up; New Control Panel all sense switches should be illuminated). 6. Restore power to the 8000. 7. Depress the ALTload switch. The desired tests will now be executed endlessly. Diagnostic display will output status as described below. Test Selection: Dipswitch at Location 6N POS #3 #2 #1 TEST MODULES RUN Closed Closed Closed On-Line, No Endless Selftest **MUST be set to C,C,C if used on line. Closed Closed Open 1 = PROM checksum test 2 = Read/Write Memory with 55, AA, 00, FF, Address. and /Address. 5 = Address "Ping-Pong" Closed Open Closed 6 = Memory Refresh Test NOTE: Takes about 4 minutes for each iteration. Closed Open Open 3 = Walking 0 memory test 4 = Walking 1 memory test NOTE: Each module takes approximately 5 hours, intended for repair center use. Open Closed Closed 7 = UART Test, Local Loopback Open Closed Open 8 = UART Test, Remote Loopback NOTE: Requires loopback plugs Open Open Closed 9 = Counter Test Open Open Open Combination of the following: 1, 2, 5, 7 and 9 Diagnostic (Y-Bus) Display: Dependent upon the test module(s) selected, the diagnostic display will present status as described: Test Module 1: Normal display = 1000 PROM checksum Error = E100 Test Module 2: Normal Display = 20xx, where xx is Data Pattern Memory Test Error = E200 for fixed data pattern (i.e. AA, 55) Error = E210 for address Error = E220 for /address as data CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB063 Pg009 Test Module 3: Normal Display = 30xx, where xx is 80 to FE representing address on 256 byte boundries representing the address being checked. Test Module 4: Normal Display = 40xx, where xx is 80 to FE representing address on 256 byte boundries representing the address being checked. Test Module 5: Normal Display = 5000 "Ping Pong" Test Module 6: Normal Display = 60xx, where x is 18 decrementing to 0, each count = 10 seconds. Test Module 7: Normal Display = 700x, where x is 5 incrementing to B, then displaying 4, 3, 2, 1 as indications of channel configuration See below. Test Module 8: Normal Display = 800x, where x is 5 incrementing to B, ten displaying 4, 3, 2, 1 as indications of channel configuration See below. ** REQUIRES LOOPBACK PLUGS ** UART Configurations Tables: CFG1 No RTS cntl,RSRDY int.,odd parity, 7 bit Local loop, 2 stop bits 300 baud CFG2 No RTS cntl,RSRDY omt.,odd parity, 7 bit Local loop, 2 stop bits 1200 CFG3 No RTS cntl,RSRDY int.,odd parity, 7 bit Local loop, 2 stop bits 2400baud CFG4 No RTS cntl,RSRDY int.,odd parity, 7 bit Local loop, 2 stop bits 4800baud CFG5 No RTS cntl,RXRDY int.,odd parity, 7 bit Local loop, 2 stop bits 9600baud CFG6 No RTS cntl,RXRDY int.,odd parity, 7 bit Local loop, 2 stop bits19.2Kbaud CFG7 No RTS cntl,RSRDY int.,odd parity, 5 bit Local loop, 2 stop bits 4800baud CFG8 No RTS cntl,RXRDY int.,odd parity, 6 bit Local loop, 2 stop bits 4800baud CFG9 No RTS cntl,RXRDY int.,odd parity, 8 bit Local loop, 2 stop bits 4800baud CFGA No RTS cntl,RXRDY int.,even parity, 7 bit Local loop,2 stop bits 4800baud CFGB No RTS cntl,RXRDY int.,odd parity, 7 bit Local loop, 1 stop bit 4800 baud Test Module 9: Normal Display = 9000 initially, then increments to 900F. Timer Test * Each count (0 to F) represents the equivalent bit position in the counter under test. Error Codes: E000 = Unexpected Z80-interrupt E100 = Bad PROM check-sum E200 = Bad memory data n verifying fixed data pattern E210 = Bad memory data on verifying addresses as data E220 = Bad memory data on verifying complement addresses as data E300 = Walking 0 error E400 = Walking 1 error E500 = Address ping-pong error E600 = Bad memory data in refresh test NOTE: For the UART errors (E7xxx and E8xxx) which follow, the actual error display will be flashing and will alternately display one of the errors below and the test configuration listed above as "normal display". For example; E701 and 7003 flash alternately...There was a UART #1, channel A receive buffer compare error while running configuration "CFG3" above. E700 = 2681 UART #1 channel A receive status error E701 = 2681 UART #1 channel A receive buffer compare error E702 = 2681 UART #1 channel A baud rate timing error E710 = 2681 UART #1 channel B receive status error E711 = 2681 UART #1 channel B receive buffer compare error E712 = 2681 UART #1 channel B baud rate timing error E720 = 2681 UART #2 channel A receive status error E721 = 2618 UART #2 channel A receive buffer compare error E722 = 2681 UART #2 channel A baud rate timing error E730 = 2681 UART #2 channel B receive status error CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB063 Pg010 E731 = 2681 UART #2 channel B receive buffer compare error E732 = 2681 UART #2 channel B baud rate timing error E740 = 2681 UART #3 channel A receive status error E741 = 2681 UART #3 channel A receive buffer compare error E742 = 2681 UART #3 channel A baud rate timing error E750 = 2681 UART #3 channel B receive status error E751 = 2681 UART #3 channel B receive buffer compare error E752 = 2681 UART #3 channel B baud rate timing error E760 = 2681 UART #4 channel A receive status error E761 = 2681 UART #4 channel A receive buffer compare error E762 = 2681 UART #4 channel A baud rate timing error E770 = 2681 UART #4 channel B receive status error E771 = 2681 UART #4 channel B receive buffer compare error E772 = 2681 UART #4 channel B baud rate timing error E800 = 2681 UART #1 channel A receive status error E801 = 2681 UART #1 channel A receive buffer compare error E802 = 2681 UART #1 channel A baud rate timing error E803 = Channel 0 cable (or loop back connector) not present E804 = Bad modem signals UART channel #0 E810 = 2681 UART #1 channel B receive status error E811 = 2681 UART #1 channel B receive buffer compare error E812 = 2681 UART #1 channel B baud rate timing error E813 = Channel 1 cable (or loop back connector) not present E814 = Bad modem signals UART channel #1 E820 = 2681 UART #2 channel A receive status error E821 = 2681 UART #2 channel A receive buffer compare error E822 = 2681 UART #2 channel A baud rate timing error E823 = Channel 2 cable (or loop back connector) not present E824 = Bad modem signals UART channel #2 E830 = 2681 UART #2 channel B receive status error E831 = 2681 UART #2 channel B receive buffer compare error E832 = 2681 UART #2 channel B baud rate timing error E833 = Channel 3 cable (or loop back connector) not present E834 = Bad modem signals UART channel #3 E840 = 2681 UART #3 channel Areceive status error E841 = 2681 UART #3 channel A receive buffer compare error E842 = 2681 UART #3 channel A baud rate timing error E843 = Channel 4 cable (or loop back connector) not present E844 = Bad modem signals UART channel #4 E850 = 2681 UART #3 channel B receive status error E851 = 2681 UART #3 channel B receive buffer compare error E852 = 2681 UART #3 channel B baud rate timing error E853 = Channel 5 cable (or loop back connector) not present E854 = Bad modem signals UART channel #5 E860 = 2681 UART #3 channel A receive status error E861 = 2681 UART #4 channel A receive buffer compare error E862 = 2681 UART #4 channel A baud rate timing error E863 = Channel 6 cable or loop back connector) not present E864 = Bad modem signals UART channel #6 E870 = 2681 UART #4 channel B receive status error E871 = 2681 UART #4 channel B receive buffer compare error E872 = 2681 UART #4 channel B baud rate timing error E873 = Channel 7 cable (or loop back connector) not present E874 = Bad modem signals UART channel #7 E900 = Bad 2681 counter #1, counter register not zero E901 = Bad 2681 counter #1, interrupt did not occur within specified time E910 = Bad 2681 counter #2, counter register not zero E911 = Bad 2681 counter #2, interrupt did not occur within specified time E920 = Bad 2681 counter #3, counter register not zero E921 = Bad 2681 counter #3, interrupt did not occur within specified time E930 = Bad 2681 counter #4, counter register not zero E931 = Bad 2681 counter #4, interrupt did not occur within specified time CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB063 Pg011 ------------------------------------------------------------------------------- *** USING PROMIDI ON THE 8000 SERIES *** ORIGINAL DOCUMENT NAME Mini Alert 302 SUBJECT: Using PROMIDI GENERAL: 1. Instructions for selecting the various PROMIDI modules and the corresponding . display codes (for "Y Bus Display") are available via the DOCWRITER utility. 2. PROMIDI is most useful in the following situations: a) Single processor system ("8010") when attempting to determine which CPU board is bad. Multiple CPU systems allow interchanging CPU boards to determine the faulty one. b) Repair center atmosphere.. when it is necessary to "troubleshoot" at the board level. 3. PROMIDI is a capital expense tool and must be ordered via a CEAR. REQUIRED ITEMS: 1. PROMIDI assembly (board plus PROMs) - BFISD P/N 907318-003 MM899410 2. Diagnostic Display (new style) - BFISD P/N 907451-001 MM899340 3. ACS Loopback cable - BFISD P/N 907491-001 MM89450 TESTING OPTIONS: 1. ACS Loopback Test - This test is strictly an ACS test. The "Y bus" outputs. are used as sources for the "D bus" in order to test ACS logic. In this instance, the MDI board is used only to supply the clocks for the ACS. Note that PROMIDI tests 2900 thru 2F00 are intended for loopback testing. 2. "Normal" PROMIDI Testing - This configuration allows for testing of the ACS, MDI and various controllers. In both cases, specific tests are selected by setting the 3 switches on the PROMIDI board AND the sense switches on the MCS (or new control panel). Specific details on tests and their switch sett- ings may be found by running .RXX.INST.DOCWRITER and selecting "PROMIDIB". TEST SETUP: For board level troubleshooting, the board being tested should be positioned to the right of the PROMIDI PCBA and remaining processor board. It is assumed that for board level repair all three PCBAs will be on extenders. When it is desired only to determine which board is failing, either placement may be used. Troubleshooting ACS = PROMIDI MDI ACS Troubleshooting MDI = PROMIDI ACS MDI Two 60 conductor flat cables should accompany the PROMIDI board. Regardless of which tests are to be performed, these cables should be connected as follows (See Fig.1): Shorter 60 pin cable - J1 on PROMIDI PCBA to J3 on the ACS PCBA Longer 60 pin cables - J2 on PROMIDI PCBA to J4 (the backwards one) on the ACS 1. For ACS loopback testing, the loopback cable is connected (in lieu of the "normal"ACS to MDI cables) as follows (See Fig. 2): CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB063 Pg012 PA connects to J1 n ACS board PC connects to J2 on ACS board PD connects to J2 on the MDI board (provides clock to ACS) PB is used to connect a "Y Bus Display" or logic analyzer 2. For "normal" PROMIDI testing, the standard connections between the MDI and ACS boards are retained (Fig. 3). DRAWING INFORMATION: See Mini Alert 302 hardcopy for drawings of figures 1,2 & 3 ------------------------------------------------------------------------------- *** BMTC SELF-TEST INSTRUCTIONS *** Required Equipment: 1. Loop-Back Cable, for testing the 1/2" drive interface. BFISD P/N 907546-001 MM896120. 2.. Loop-Back Plug, for testing the 1/4" drive interface. BFISD P/N 907547-001, MM896130. 3. Diagnostic Display "Y bus Display") Either the "old" (810) style or "new" (8000) style may be used. Old style: MM899000 New style: MM899340 GENERAL INFORMATION: The BMTC may be exercised through the use of system diagnostics such as REMIDI, DEMON, etc. Additionally, there are tests which are resident on the BMTC as part of its microcode. All or portions of these tests can be run under the following circumstances: 1. Controller board reset - either by hardware reset (depressing "LOAD" or "ALTLOAD") or by a software reset. 2. Certain system diagnostics are capable of commanding the BMTC to enter the resident self-tests. This ability is in addition to the "usual" tests such as those on the TDP tape port. 3. The BMTC can also be "forced" into a continuous self-test mode by setting position 9 of the dipswitch at location 2S to OPEN. Either the old style or new style diagnostic display may be used to dsplay self- test information. In either case the display should be set for the "MMC" or "SHARED MEMORY" position and the Display connector for shared memory should be used. The display board is connected to P2 (lower front of controller) via the cable with part number 907174-001 (included with the display). Reset Invoked Self-Tests: When the BMTC receives a reset it immediately turns the green LED Off and begins executing a self-test sequence testing the following: 1. Microprocessor (29116) ALU 2. Micro address sequencer (2910) 3. Test condition multiplexer 4. Memory test - Sequential write and read of each buffer (One per buffer) a. Write 55555555 b. Read and verify c. Write AAAAAAAA d. Read and verify CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB063 Pg013 At successful completion of the test sequence, the BMTC will turn the green LED on. Diagnostics Invoked Self-Tests: DEMON DEMON can command the BMTC to enter into a test sequence consisting of: 1. Memory test - Sequential write and read of each buffer (One per buffer). a. Write 55555555 b. Read and verify c. Write AAAAAAAA d. Read and verify 2. Buffer read only - Checking for time-out and parity 3. Test 1/4" tape drive data bus - Write data on the 1/4" bus, read back and compare. REMIDI: In addition to the standard shared memory test (in this case, writing & reading both buffers), REMIDI also performs the following tests when selected by the sense switches (consult the Decwriter utility for more detailed information) 1. Test as per DEMON (above) 2. Writes and reads BMTC buffers on byte boundries Forced Self-Tests: To run the resident self tests, set position 9 of the switch at 2S to open. Set all four sense switches ON (all switches UP) and depress ALTLOAD. The BMTC should begin executing self-tests. Loopback Cables: When testing 1/2" tape interface, a loop-back cable must be installed such that the PA end goes into J2 and the PB end goes into J3. The white mark indicating pin one on the connector shells will face downward. When testing 1/4" interface, a loop-back plug must be installed at connector J1 such. that pin one is on the bottom. Self Test: Self test - Off Line Usage: (Determined by position 9, switch location 2S) Dipswitch at location 9A: position 1: Closed = Run CPU tests Open = Skip position 2: Closed = Run all memory tests Open = Skip (Switch positions 4, 5, 6, 7 ignored) position 3: Closed = Run drive interface tests (loop back needed) Open = Skip position 4: Closed = Memory test, fixed data pattern Open = Skip position 5: Closed = Memory test, address as data Open = Skip position 6: NOT USED position 7: Closed = Memory test, refresh Open = Skip NOTE: This test takes approximately three minutes to complete. position 8: Closed = Loop on test indefinitely if an error occurred at least one time. If no error has occurred, the test completes. Open = Loop on test indefinitely on as long as the error is still present (when an error ceases to be detected, the test completes). position 9: NOT USED Test Status & Errors: A 4-digit hex LED display board connected to the Y-bus of BMTC is used to indicate test progress & errors. During the beginning of each test, the test number is displayed on the display board. Only the lower two digits are used. The upper two digits should be zero. Also, the on-board green LED should be on. When an error is found, the most significant digit of the display is changed from a "O" to a "E". The test number remains displayed in the lower digits. Also, the green LED is turned off. At the end of all tests, the display board shows all zeros for about two seconds. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB063 Pg014 Test Descriptions: CPU Tests * Test 0001: Tests 29116 register #31, and AUX register for shorts and opens on D-bus and Y-bus. * Test 0002: Tests 2910 JRP, jump via pipelineor register function. * Test 0003: Tests 2910 conditional CALL and RETURN functions. * Test 0004: Tests 2910 PUSH and LOOP functions. * Test 0005: Test 2910 loading of register and RPCT, loop on pipeline until register is zero functions. * Test 0006: Tests 2910 JSRP, conditional push and branch via register or pipeline function. * Test 0008: Tests 2910 POP JMP, conditional pop and jump via pipeline. * Test 0009: Tests 2910 TWB, three-way-branch function. * Test 000A: Tests 2910 JMAP, jump map (16-way-branch) function. * Test 0010: Tests 29116 RAM's 0 through 30. Incremental data patterns are written, read and verified. Each RAM has an unique data pattern. * Test 0011: Tests 29116 set and save status functions. * Test 0012: Tests 29116 all ALU logical and arithmetic operations. * Test 0013: Tests 29116 move data in byte mode. * Test 0014: Tests 29116 all shift types. * Test 0015: Tests 29116 all rotate types. * Test 0016: Tests 29116 rotate and merge function. * Test 0017: Tests 29116 rotate and compare function. * Test 0018: Test 29116 zero extend and sign extend capabilities. Memory Tests * Test 0020: Tests BMTC dynamic RAMs. Data patterns 00000000, FFFFFFFF, 55555555, AAAAAAAA, walking 0, and walking 1 are written, read, and verified. Parity error is also checked on each read. Data is written and read with addresses switching from one end to another and switching between the two buffers. * Test 0021: Tests BMTC buffer RAMs with address as data. Address as data are written into the two buffers alternatively in consecutive addresses. The upper half wordis logically ORed with the byte value in bit 14 and the buffer number in bit 15. RAM data are read back from the two buffers alternatively in consecutive addresses and verified. * Test 0022: Tests number displayed bu NO testing is done. * Test 0023: NOTE: This test takes approximately 3 minutes to run. Tests BMTC RAM refresh. Both buffers are written with FFFFFFFF pattern. BMTC then idles for 3 minutes. RAM data are then read and verified. Interface Tests * Test 0030: Tests 1/2" drive control outputs and MTR/MTS status input. 1/2" control outputs are loop-back into MTR status through a loopback cable. READY, ONLINE and OFFLINE transition signals are tested. Incremental data patterns from 0 to FFFF are used. * Test 0031: Tests 1/4" control outputs and status inputs. A loop-back cable is used to loop back data from outputs to inputs. Incremental patterns from 0 to F are sent, received, and verified. * Test 0032: Tests 1/4" data output and input, parity, overflow and ready status. 1/2" output data and parity bit are loop-backed into data and parity inputs. A loop-back cable is required for this test. Also, GCR select switch on BMTC must be closed. Incremental data patterns from 0 to FF are tested. Data overflow is tested by strobing -IRSTR twice. *** WHEN TESTING IS COMPLETE BE CERTAIN THAT POSITION 9 OF DIPSWITCH AT LOCATION 2S IS SET TO "CLOSED"*** Loop-Back Cables: CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB063 Pg015 * 1/2" Tape Drives (IWO-) J2-10 <-----------> (IRO-) J3-2 (IW1-) J2-12 <-----------> (IR1-) J3-3 (IW2-) J2-30 <-----------> (IR2-) J2-48 (IW3-) J2-26 <-----------> (IR3-) J2-50 (IW4-) J2-6 <-----------> (IR4-) J3-6 (IW5-) J2-32 <-----------> (IR5-) J3-20 (IW6-) J2-28 <-----------> (IR6-) J3-10 (IW7-) J2-24 <-----------> (IR7-) J3-8 (IWP-) J2-22 <-----------> (IRP-) J3-1 (IERASE-) J2-40 <-----------> (IRDY-) J3-28 (IEDIT- ) J2-38 <-----------> (IONL-) J3-44 (IWFM- ) J2-42 <-----------> (IFPT-) J3-32 (IWRT- ) J2-34 <-----------> (IEOT-) J3-22 (IREV- ) J2-18 <-----------> (ILDP-) J3-4 (ILWD- ) J2-4 <-----------> (IFMK-) J3-14 (IREW- ) J2-20 <-----------> (ICER-) J3-42 (IGO- ) J2-8 <-----------> (IHER-) J3-12 (ITHR1- ) J2-44 <-----------> (IFBY-) J2-2 (ITHR2- ) J2-36 <-----------> (IDBY-) J3-38 (ITAD0- ) J2-46 <-----------> (INRZ-) J3-26 (ITAD1- ) J3-46 <-----------> (IRWD-) J3-30 (IDEN- ) J2-14 <-----------> (ISPEED-) J3-40 (ILOL- ) J2-16 <-----------> (IIDENT-) J3-16 (HISP- ) J3-50 <-----------> (IWSTR-) J3-36 (IOFL- ) J3-24 <-----------> (IRSTR-) J3-34 * 1/4" Tape Drive: (ONL-) J1-28 <-----------> (ACK-) J1-36 (REQ-) J1-30 <-----------> (RDY-) J1-38 (XFR-) J1-34 <-----------> (EXC-) J1-40 (RST-) J1-32 <-----------> (DIR-) J1-42 ------------------------------------------------------------------------------- ORIGINATOR: I. LEIBOWITZ CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB063 Pg016 FIB 00064 12/09/86 *** DUMPTOFILE - CRASH INFO interpretation *** After a system dump occurs and the system is re-booted, DUMPTOFILE should be run. At completion of the DUMPTOFILE, CRASH INFO will be displayed. This can be done at any time after the system is re-booted after the dump and BEFORE another dump occurs. CRASH INFO is interpreted as follows: a. "PCB" number is the Process Control Block which called for the system dump. Each task has it's own PCB number, which is assigned by the system at log-on time. b. "NAME" displays the name of the process which caused the dump. It will be either a terminal I.D., a ghost task I.D. or a system process. This informs the user which task to look at when tracking the cause of the dump. A system process is is indicated by an "*" preceeding the the process name such as "*SHDOMGR", which is the Shadow Manager process, a part of the operating system. c. "CPU" number is the physical number of the CPU or engine that was processing the data for the PCB which called for the dump. d. "STKSEG" the Stack Segment number. This number is used to find the segment table entry. The entry gives the information needed to find data in memory for analyzing the dump. It's main value is to Basic/Four software support personel. e. "SYSTEM NUMBER ERROR" is the four-tuple of the dump. This should be the same number which was displayed on T0 while the system was processing the dump. f. "SYSDMP MSG" is the four-tuple error text, the same as that you would find on the error listing for the SYSTEM NUMBER ERROR. g. "TIME OF SYSTEM DUMP" is the time contained in the system clock when the dump occured. h. "DATE OF SYSTEM DUMP" is , of course, the date the dump occured. i. "ERRORS IN IOCBs USED FOR DISK IO" displays the information needed if the dump was caused by a disk drive problem. If the dump was the fault fo a disk drive, the IOCB number, disk address, disk status, cylinder, head and sector will be displayed. * A prompt for printing a hard copy of the CRASH INFO is provided. It is recommended that a hard copy be kept on file for future reference. ORIGINATOR: J. KANZLER CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB064 Pg001 FIB 00065 12/13/88 *** Error Log - Interpretation of the Memory Errors Summary Report *** This section describes the ERRORLOG MEMORY ERRORs output from a system on an O.S. earlier than 8.5C. Output from later O.S. releases are shown below. The following diagram is a Memory Error Summary Report generated by an Error Log utility run and an explanation of it's contents: ------------------------------------------------------------------------------- MEMORY ERRORS SUMMARY REPORT LAST 32 ERROR ADDRESSES (1) 30 28 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 . NUMBER OF ERRORS BY 256K ADDRESS INCREMENTS (2) (3) 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 . ------------------------------------------------------------------------------- (1) The first two lines of the report show a multiplier used to indicate the memory ADDRESS in which failures have occured. There are two rows and each line can display the multiplier for sixteen failures. Therefore, the address of a total of 32 memory failures can be displayed. This example report shows that two memory failures have occured with the first failure multiplier being 30 and the second failure multiplier being 20. These numbers indicate the 64K areas in error as follows: 30 X 64 X 1024 = 1,966,080 decimal or 1E0000 hex. 28 X 64 X 1024 = 1,835,008 decimal or 1D0000 hex. (2) The first four numbers on this line represent the first megabyte of memory in 256K byte increments, i.e. the first number = 0 to 256K, etc.; the next four represent the second megabyte, etc. The next line represents the fifth, sixth, seventh and eight megabytes simalarly. (3) This 2 indicates that two errors have occured in the last 256k bytes of the second megabyte of memory, as is indicated by the 30 and 28 displayed and described in (1). *** NOTE *** This format for the Memory Error Summary Report was used on all O.S. releases prior to 8.5C. =============================================================================== This section describes the MEMORY ERRORs output of a system on an O.S. level 8/9.5C or later with memory failures at addresses less than 12 meg. ------------------------------------------------------------------------------. MEMORY ERROR SUMMARY: 08/01/88-08:00:00 TO 08/31/88-23:59:59 LOG FILE: (DISK).D880801T01012432 CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB065 Pg001 ------------------------------------------------------------------------------. ADDRESSES OF 24 MOST RECENT ERRORS 100000 100000 200000 100000 100000 100000 200000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 ERROR COUNTS BY ADDRESS RANGE 000000 - 080000 - 100000 - 180000 - 200000 - 280000 - 300000 - 380000 - 400000 0 0 5 0 1 1 0 0 400000 - 480000 - 500000 - 580000 - 600000 - 680000 - 700000 - 780000 - 800000 0 0 0 0 0 0 0 0 800000 - 880000 - 900000 - 980000 - A00000 - A80000 - B00000 - B80000 - C00000 0 0 0 0 0 0 0 0 Kernel Version: 5.3.7.0 ------------------------------------------------------------------------------. ADDRESSES OF 24 MOST RECENT ERRORS: This is simply a listing of the most recent error addresses (high order byte only), with the last entry at the top left, and the oldest entry towards the bottom right. In the example above, the last two failures (100000) are somewhere in the second megabyte of memory (address range 100000 - 1FFFFF, memory addressed as 1 - 2 meg) but it is not possible to pinpoint any closer than this since only the high order byte is logged. The third from the last failure is in the third meg of memory (addressed from 2 - 3 meg). ERROR COUNTS BY ADDRESS RANGE: These are actual memory byte addresses, with the number underneath a dash (-) representing numbers of failures in the address range above. These are in .5MB increments representing 12 MB of memory addresses. In the example above, the 5 indicates five failures in the first half meg of memory addressed from 1 - 2 meg. The next two failures (both counts of 1) indicate failures in the first and second half megs of memory addresses from 2 - 3 meg. =============================================================================== If a memory failure occurs on a system with greater than 12 meg. The addresses in the ERROR COUNTS BY ADDRESS RANGE will change. The smallest address range logged will be 2 meg. Use the addresses from the following chart to decode. =============================================================================== MEMORY BYTE ADDRESSES IN 1.0 MB INCREMENTS 0000000 = meg 0 0100000 = meg 1 0200000 = meg 2 0300000 = meg 3 0400000 = meg 4 0500000 = meg 5 0600000 = meg 6 0700000 = meg 7 0800000 = meg 8 0900000 = meg 9 0A00000 = meg 10 0B00000 = meg 11 0C00000 = meg 12 0D00000 = meg 13 0E00000 = meg 14 0F00000 = meg 15 1000000 = meg 16 1100000 = meg 17 1200000 = meg 18 1300000 = meg 19 . 1400000 = meg 20 1500000 = meg 21 1600000 = meg 22 1700000 = meg 23 . 1800000 = meg 24 1900000 = meg 25 1A00000 = meg 26 1B00000 = meg 27 1C00000 = meg 28 1D00000 = meg 29 1E00000 = meg 30 1F00000 = meg 31 2000000 = meg 32 2100000 = meg 33 2200000 = meg 34 2300000 = meg 35 . 2400000 = meg 36 2500000 = meg 37 2600000 = meg 38 2700000 = meg 39 . 2800000 = meg 40 2900000 = meg 41 2A00000 = meg 42 2B00000 = meg 43 2C00000 = meg 44 2D00000 = meg 45 2E00000 = meg 46 2F00000 = meg 47 3000000 = meg 48 3100000 = meg 49 3200000 = meg 50 3300000 = meg 51 . 3400000 = meg 52 3500000 = meg 53 3600000 = meg 54 3700000 = meg 55 . 3800000 = meg 56 3900000 = meg 57 3A00000 = meg 58 3B00000 = meg 59 3C00000 = meg 60 3D00000 = meg 61 3E00000 = meg 62 3F00000 = meg 63 =============================================================================== CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB065 Pg002 NOTE: The ERRORLOG is explained in the BOSS/VS Utility User Guide - M5102. Release 8/9/10.6E has a bug logging the ADDRESSES OF 24 MOST RECENT ERRORS (addresses are incorrect and will only show one error). Use the ERROR COUNT BY ADDRESS RANGE field. ORIGINATOR: H. Mitchell N. Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB065 Pg003 FIB 00066 06/01/87 *** Do not format any but 5 1/4" disks with ECC option on DIVE *** In the 8.5/9.5 O.S. version of DIVE there is the ability to format the fixed disk drives in either ECC or CRC format. The option of ECC is for future use and IS NOT to be used at this time. Data corruption may result with ECC format. All disks MUST be formatted in the CRC format until the announcement that ECC format is supported. The above information applies all disk drive except the 5 1/4" drives installed on the MPx 7000 and 7100 systems. All 5 1/4" drives must be formatted using the. ECC format. ORIGINATOR: D. LUQUE CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB066 Pg001 FIB 00067 01/05/87 *** New style IDC PCBA allows greater than 12MB main memory on 9XXX *** There is now a new IDC PCB for the MPx 9000 Series System. This new PCB, IDC 64 ,P/N 903597, can be used in place of the current IDC PCB P/N 903550. They both can be used in the same system with multi CPU's. The new IDC 64 PCB will be required for support of more than 12MB of main memory WITH other requirements. IDC 64 P/N 903597-001 = with cache IDC 64 P/N 903597-002 = without cache STRAP SELECTION: There is only one strap that can be changed depending upon memory support. This strap is near location 2R. JUMP E6 to E7 = IN same as IDC P/N 903550 JUMP E6 to E7 = OUT for greater than 12MB Main Memory support The normal setting will be E6 to E7 IN. Support of over 12MB of main memory requires the 9.6 Operating System which is scheduled for release in spring of 1987. ORIGINATOR: D. LUQUE CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB067 Pg001 FIB 00068 01/13/87 *** System slowdowns/hangs won't load - caused by unterminated cables *** SYMPTOM: System slowdowns/hangs, failure to load, some diagnostics run slow. PROBLEM DETERMINATION: Check for any RS-232 cables connected to the CPU which are not connected to a serial device. FIX: If at all possible, disconnect all unterminated cables. See F.I.B. in the . Basic Four Cables section titled "RS-232 Peripheral cable terminator" for details on proper cable termination. ORIGINATOR: N. JONES CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB068 Pg001 FIB 00069 01/30/87 *** Power supply loading and PCBA placement restrictions/information *** This field bulletin is to address the questions of power supply loading and how to arrange PCB board placement in the system to achieve proper loading. The 810 system is defined as a three mainframe system, containing UPPS-100 power supplies. The MPx series system refers to the models 70xx, 80xx, 90xx and 95xx which may contain LS700 or UPPS-100 power supplies. An MPx system that has been converted from an 810 system will have three mainframes and those frames will contain UPPS-100 unprotected power supplies. MEMORIES: The total amount of memory/BMTC PCBAs per system in any combination is (N times 3 = Y) where "N" is the number of mainframes. The "Y" number of PCBA's CAN exist in the same mainframe. Therefore, if you have a system with two mainframes then 2 times 3 = 6. A combination of memory and BMTC PCBA's cannot exceed 6 in a two mainframe system. An 810 converted to a MPx system will have three mainframes, therefore 9 is the maximum combination of memory/BMTC PCBA's allowable. The maximum memory currently supported by the MPx 7000 system is 6 MB. The maximum memory currently supported by the MPx 8000 system is 8 MB. The maximum memory currently supported by the MPx 9000/9500 systems is 64 MB. ISDC's: The total number of 8-way and 16-way ISDC's allowed on an MPx system is 10. This total count can be any combination of 8-ways and 16-ways. The +12VDC and -12VDC is not paralled across the mainframes. A per mainframe board count MUST be adhered to for the 8-way and 16-way PCBA's. The per mainframe count is as follows: A) For the 810, up to five 8-ways per mainframe without ECN 11148 on the UPPS-100 supplies. With ECN 11148 there can be up to six 8-ways per mainframe ECN 11148 eliminates F1 in the auxiliary board of the UPPS power supply by soldering a jumper across the fuse, bringing it revision level "J". 16-ways are not supported by the 810. B) For 8000 systems that have been converted from 810 systems, (these have the UPPS-100 power supplies instead of the LS700), if ECN 11148 is not installed. on the UPPS-100's, up to five 8-ways or four 16-ways are allowed per main main frame. If ECN 11148 is installed, up to six 8-ways or seven 16-ways are allowed per mainframe. See paragraph A, above, for description of ECN 11148. C) For the MPx systems using the LS700 power supplies, up to eight 8-ways may be installed per mainframe or six 16-ways. If ECN 11145 is installed on the LS700 power suplies then there may be up to eleven 8-ways or eleven 16-ways installed per mainframe. ECN 11145 consists of changing the 4 amp fuse F3 in the LS700 to a 6 amp fuse. DO NOT change the F3 fuse from 4 to 6 amps in the machine unless the LS700 is at revision level "V". This change upgrades the revision level fron "V" to "W". It is highly recommended that all LS700 supplies be upgraded to revision level "W". NOTE: See World Product Support Bulletins #216 for additional information on ECN 11145 and ECN 11148. CONSTRAINTS WHEN UPGRADING A SYSTEM THAT WAS ORIGINALLY MANUFACTURED AS AN 810 SYSTEM TO A 9000/9500 SYSTEM: Extensive power supply analysis has determined that upgrading the original CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB069 Pg001 810 system to the MPx 9000/9500 system may not provide sufficient power for 33 printed circuit boards. This is NOT a problem when used with the MPx 8000 system's CPU set. The problem stems from the lower capacity of the UPPS-100 power supply vs. that of the LS700 supply. When upgrading an original 810 system to the MPx 9000/9500, the following restrictions must apply: 1. No more than 27 chassis slots can be used in the MPx 9000/9500 system (excluding terminator boards). This will ensure that proper power is provided to the new CPU set used in the MPx 9000/9500 Series System. 2. No more than six Intelligent Serial Device Controllers (ISDC's) may be plugged into one chassis. No more than ten 8-way/16-way PCBA's total may be in the system. 3. No more than nine Memory PCBA's total (BMTC PCBA is also to be included in this count) may be in the system. Ways in which this situation can be alleviated are to use higher capacity memory boards to bring down the total count of Memory PCBA's. Replace 8-way ISDC's with 16-way ISDC's as required to increase terminal count. To exceed these restrictions require the use of the LS700 power supplies which are acquired only through the trade-in/purchase of new frames. 4. Insure that ECN 11148 (described in paragraph A) is installed in all three of the UPPS-100 supplies. If this ECN is installed the supply will be at or above revision "J". ORIGINATOR: H. MITCHELL CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB069 Pg002 FIB 00070 02/03/87 *** System will not load from any source; no bootstrap error *** SYMPTOM: The system will not load from disk or tape. All power supply(s) voltages check out O.K. Card swapping and front panel change out does no good. No bootstrap errors occur. PROBLEM DETERMINATION: A signal called "TOD" is supplied to the front panel PCB and the MCS PCB from the LS700 in the primary frame. This signal is a 60 cycle clock which is supplied to the front panel via the cable from the LS700 J6 thru the overtemp circuit to front panel J1. The same signal is also supplied to the MCS PCB from the LS700 J13 to the MCS PCB J3. If this signal is not produced by the LS700 or does not arrive to the front panel, the system will not load. Use . an oscilloscope and check for the presence of the 60 cycle TOD signal on pin 3 of the front panel J1 and on pin 3 of the LS700 J6. FIX: Repair/replace defective cable. Replace defective LS700. ORIGINATOR: H. MITCHELL CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB070 Pg001 FIB 00071 02/09/87 *** Memory PCBAs must be at Rev J for addressing above 12MB *** To prepare for future support of main memory above 12 megabytes, ECN 11740 has been released. This ECN, along with etch cuts and jumper wires, adds two jumpers that must be in the correct position for proper memory configuration. See the Hndbook FIB section for the address switch settings that must also be set. At this time ONLY the following jumper positions are valid. JP5 location 1-E = 2 to 3 IC Pad location 1-A = 9 to 10 When future support of main memory above 12 megabytes applies, the following jumper positions will be valid. JP5 location 1-E = 1 to 2 IC Pad location 1-A = 8 to 9 (There are other hardware/software considerations required for above 12 megabyte support than just this ECN.) Possible problems that may occur are: 1) Fatal Error 1,0,0,16 and Fatal Error 1,0,0,5 along with Red LED's on PCBA,s may occur at load time. 2) CPU's going off-line. 3) All memory not to be present when system is loaded. ORIGINATOR: D. LUQUE CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB071 Pg001 FIB 00072 02/26/87 *** CPU switch settings for the new style ESTK PCBA *** The ESTK PCBA now has a new artwork PCB PN 905209. The ESTK PCBA will retain the same part number "903552", there is no change in function. A change has been made to the location of the CPU ID switch. On this new PCB artwork the CPU ID switch now resides at location "9-CC" under the ESTK CPU Online/Offline/Inhibit IO switch. 1 CLOSED / 2 CLOSED / 3 CLOSED / 4 CLOSED = CPU 0 1 CLOSED / 2 OPENED / 3 CLOSED / 4 CLOSED = CPU 1 1 OPENED / 2 CLOSED / 3 CLOSED / 4 CLOSED = CPU 2 Both ESTK artworks may reside in the same system. ORIGINATOR: D. LUQUE CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB072 Pg001 FIB 00073 02/26/87 *** 0,12,500,0 four-tuple while running ORIGIN Rel 2.0 *** A four-tuple error 0,12,500,0 may occur on the MPx Systems when CTL-I is entered to create a new relationship. To correct this problem, add statement 105 to program "ORIFRM". 105 U=UNT; OPEN(U)"ORILGF"; READ(U,KEY=FID(0),DOM=8960)U2$,*,*,U3$; CLOSE(U) This program change will be included in the next release of ORIGIN. ORIGINATOR: T. TIANGO CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB073 Pg001 FIB 00074 05/20/87 *** MPx 9xxx Series Helpful Hints *** This Field Bulletin is meant to aid the Field Engineer in troubleshooting the MPx 9xxx system. It is meant to be laid out in the same order as steps should be performed. It is assumed that a presite survey has already been done and the customer has been running on 8.5 two weeks prior. See: Field Bulletin #161A "Presite Survey For Conversion of MPx 8000 to MPx 9000 Series Systems" and Field Bulletin #216 "810 System and MPx Series Systems PCB Board Placement/Power Supply Loading", also Field Bulletin #268 "MPx 9000/9500 Upgrades vs Original 810 Systems". CAUTION: At all times when a PCBA is handled an Electro-Static- Discharge strap should be worn by the Field Engineer to reduce ESD failures. Failure to do so may result in DOA PCBA's. NOTE: See WPS Field bulletin #303 and #303 addendum for drawings PREINSTALLATION CHECK: Prior to applying AC to the chassis, insure that proper torque is maintained on the nuts of the Bus Bar against the Backplane. To aid in maintaining this torque, Spring Washers, PN 213008-002, have been added. The spring washers maintain an 18 inch-pound torque when they are in a FLAT (snug) condition. If the Backplane Bus Bar does not have these Spring Washers, a slight decrease in torque can cause large contact pressure differences between the Bus Bar and the Backplane. Overtightening these nuts can cause the Bus Bar studs to pull through the Backplane. If this happens, the Backplane will need to be replaced. The two connections at the top of the Bus Bars, where the LS-700 power supply connects, must also be secure. These two connections can withstand greater torque pressures and they must be tight. If these Bus Bar connections are not secure, the maximum PCBA support of the system may not be achieved. Dumps and hangs may also occur. Insure that the AC Programming Plug (PN 907309-001) resides within the proper position of J2. | | | | | |--1XXXV-|--| <------- For 110 VAC |---2XXXV---| <---------- For 220 VAC J2 Programming Plug Positions UPGRADE/INSTALLATION: Proper installation of the system, or PCBA's in a upgrade, is the first step in preventing problems. Check/adjust the power supply voltages for proper levels. Refer to Power Supply section. Use the MPx 9000 board address switch settings, there is a difference in the dip switch settings for the board address number's between the MPx 9xxx and the MPx 70/80xx systems. Unlike the MPx 70/80xx system, board positioning in the MPx 9xxx system is critical, PCBA placement must be followed. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB074 Pg001 Prior to turning the system over to the customer, several passes of the 9.5E OS level of REMIDI should be run. Run REMIDI with Low and then High voltage margining of the +5 volts on the LS700 PS or UPPS- 100. This will help aggrevate a marginal voltage problem. Refer to REMIDI section. DEMON should be run to verify that all shared memory controllers are addressed properly and are recognized. That all other controllers are present and have the correct number of peripherals and type connected to them and that the peripherals can be accessed and tested OK. COOK too should be run for one hour with Low and then High voltage margining. It is also recommended to run COOK overnight with the voltages set in their normal values. 810 to MPx 9xxx: If the system to be upgraded was an original 810 system which uses the UPPS-100 power supply, then the following applies: 1. No more than 27 chassis slots can be used. This will ensure that proper power is provided to the new CPU set used in the MPx 9xxx systems. 2. No more than six Intelligent Serial Device Controllers (ISDC's) may be in any one chassis. No more than ten 8-Way/16-Way PCBA's total may be in the system. 3. No more than nine Memory PCBA's total (BMTC PCBA is also to be included in this count) may be in the system. To exceed these restrictions require the use of the LS-700 power supplies which are acquired only through the trade-in or purchase of new frames. POWER SUPPLIES: Separating mainframes: (Please refer to figure 1 and cable connection list) When separating mainframes to check the power supply voltages, it is important that: 1) All load sharing cables are disconnected between the LS-700. (Item 2) 2) All DC power cables are disconnected between the protected power supplies. (Item 3) 3) Disconnect the +5VDC strap and the Ground strap between the LS-700 Bus Bars and at the bottom of the packplane. (Not shown, these straps are located between the backplanes in the back of the system) 4) Power fail detect and power sequencing cables are connected so the frames will power up. (Item 1 and 4) 5) Never apply power to a frame that does not have a minimum load of 10 amps, unless paralleled. If a minimum of 10 amps connot be applied to each frame, then disconnect the power fail detect cable to that frame and leave the circuit breakers to that frame Off. After making the checks, insure that the cables are connected and seated CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB074 Pg002 correctly. Insure that the +5VDC strap and Ground strap between the backplanes are secure. Power supply adjustments: When separating the power supplies, a minimum load of approximately 10 amps must be on the LS-700 +5 VDC before applying power to the frame. Do not power the frames on unloaded, this may cause damage to the LS-700 power supply. The LS-700 +5 VDC will track with a load of 10 amps up to 140 amps. For proper loading refer to the +5 VDC current chart. CURRENT CHART PCBA NAME CURRENT LOAD (Amps) ----------------------------------------- AMS 16.00 ESTK 16.00 IDC 15.00 DMA I 15.00 MDI 14.00 ACS 13.90 BMTC 11.40 MPC 10.40 16 WAY 9.20 LAN 8.85 VCON 8.80 IMLC 6.90 MCS W/O MEM. 5.50 8 WAY 5.00 1/2/4 MB MEM 3.60 TERMINATOR 1.90 Voltage Checks: Unparallel the power supplies if multi-frame system. Insure that the individual frame power supplies are not over loaded with to many PCBA's, this can cause the power supplies to smoke. To prevent overloading insure that there are no more than three Memory PCBA's in any one frame after they have been separated (the BMTC will be counted as a Memory PCBA) and only one (1) CPU set. After voltage checks have been made, insure that the power supplies are paralleled again. See: Mini-System Alerts #270 and #324. Measurements will be made at the terminator in the CPU. Test Point Voltage Adjustment/Location TP1 +12V R44 (LS 700/UPPS-100) TP2 -12V Not Adjustable, tracks +12V TP3 -5V/0V Not Used, May be present on 810 system TP4 +12VB/0V Not Used, May be present on 810 system TP5 GND Both Power Supplies TP6 +5V R9 (LS 700/UPPS-100) TP7 +5VB R32 (Protected Power Supply) TP8 -5VB/0V Not Used, May be present on 810 system The LS 700 +5V should be checked for ripple using an oscilloscope. The scope probe ground should be connected at the terminator on TP5. CAUTION: Some models of oscilloscopes may need to be floated. This can be accomplished by using a 2 prong plug adapter. See: Field Bulletins 38, 46 and Mini-System Alert #349. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB074 Pg003 LS 700 Margining: Margining is used to try and aggravate a potential problem in the system while running REMIDI and/or COOK. On the LS 700 PS there is a margin switch located on the upper left part of the PCBA. This dip switch is used to margin the +5VDC and +12VDC. There will be an "H" for High and an "L" for Low silkscreened near the margin switch. Voltages can be checked at the terminator in the CPU. The +5v margin is the voltage of most concern. On PCBA 904737-001--- | /--On PCBA 904789-001 | | | Margin DIP SW - 1 | 1 = closed = +5v High = 5.23v to 5.26v - 2 | 3 = closed = +5v Low = 4.73v to 4.76v - 3 | 5 = closed = +12v High = 12.57v to 12.63v - 4 | 7 = closed = +12v Low = 11.37v to 11.43v On the UPPS-100 power supply used on the 810 system there are 2 connectors with 3 pins located at the upper right of the PCBA. The connector on the left is for the +5v margin and the one on the right is for the +12v margin. The center pin is common, Center pin jumped to the Bottom is for High margin and the Center pin to the Top is for Low margin. CAUTION: ALWAYS power down the system before changing margin positions. ALWAYS margin ALL systems LS 700/UPPS-100 power supplies at the same time and in the same position, ie, all LS 700 +5v in Low margin. ALWAYS return margin switch to the normal position when done testing. FUSES: In the LS-700 power supply, if either 15 amp fuse F2 or F4 should blow, do not replace them. These fuses are to protect the PCB from further damage for a problem internal to the power supply. If these fuses are replaced the power supply may smoke prior to blowing the fuses again. The LS-700 power supply needs to be replaced if these fuses blow. The fuses are located in the upper right hand side looking from the front of the system. PROTECTED POWER SUPPLY: The Protected Power Supply provides +5 VDC backup voltage to the following PCBA's: 1) Front system control panel 2) MCS PCBA 3) Main Memory 4) BMTC PCBA 5) Backplane terminators Battery backup (indicated by a flashing amber LED on the system control panel) is valid for at least a minimum of 15 minutes, no matter what the system configuration is, with batteries at full charge. System recovery may not complete if there is a Power Fail within a Power Fail Recovery. The charge time of the battery will vary depending upon its charge state. From a complete discharge, 90% of full charge will be reached in approximately 16 hours. A 100% charge, from a complete discharge, CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB074 Pg004 will be reached in approximately 20 hours. The life time of the battery is dependent upon its Cycle Life. The Cycle Life is the number of times that the battery went from a complete charge to a full discharge. Excessive cycles cause the life time of the battery to be less. A system that constantly has power failures, will have a shorter battery life, and less than 15 minutes backup (battery not reaching full charge). A system that has been installed for more than 2 years, should have the battery checked/replaced. Depending on the protected power supply design, the battery could be in one of two locations: 1) Mounted on the back panel assembly of the new style protected power supply (PPSII) assembly of the mainframe (one for each mainframe and add-on mainframe). 2) Inside the mainframe ACDU assembly (one for each mainframe and add-on mainframe). Check the battery and battery charger output on the Protected Power Supply as follows: 1) Press and hold SW-1 (Bat Intrpt) to disengage the charger from the battery. 2) Measure the output of the battery at TP1 (Bat) and TP3 (Gnd). The reading should be +21VDC. 3) Measure the output of the battery charger TP2 (Chgr) and TP3 (Gnd). The reading should be +21VDC. Adjustment is made with R10. A lesser charge voltage will result in a lower battery level, causing the backup time to be less. Check/adjust the protected +5VB in the following manner: 1) Power down the system at the ACDU's. 2) Insure that the Protected Power Supply load does not exceed a single frame systems maximum configuration. The Protected Power Supplies are tested in a standalone condition, so in a multi frame system the load must be reduced to a single frame configuration. The Protected Power Supply under test will supply power to ALL the mainframes, the loads are common. There shall be no more than three (3) memory PCBA's (BMTC inclueded in this count) in the whole system. 3) Place all the Protected Power Supplies, except the one under test, in the shutdown condition by placing SW2 in the OFF position. This will disable the outputs of that power supply. Apply power to the system. 4) Check the protected +5VB at the terminator/interconnect PCBA at TP7 (+5VB) and TP5 (GND). Adjust R32 for +5VB on the Protected Power Supply under test. 5) Power down the system at the ADCU, place the "tested" Protected Power Supply in the OFF position. Place the next Protected Power Supply to check/adjust in the SW2 ON position. Power on the system and go to step #4. Repeat these steps for all Protected Power Supplies. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB074 Pg005 6) When the check/adjustments are done, insure that all Protected Power Supplies are in the SW2 ON position. That all PCBA's that have been taken out, to satisfy the load condition, are installed. SYSTEM DOESN'T COME UP: If the system fails to come up after the MPx 9xxx PCBA's have been installed/replaced, proceed with the following. 1. Insure that the PCBA's are located in the correct position and that the proper LARL's are met. Also check for proper MPx 9xxx switch settings, no load display on T0 HVDT after the system goes ready could be due to improper VCON setting. A diagnostic display latch ("Y" Bus Display) connected to the right most CPU bottom fore plane, will be helpful to determine load failures. Refer to MPx 9000 Service Manual 8101 and VCON PCBA in this Field Bulletin. 2. When the power is turned On each CPU that is enabled issues the following message: "BOOTSTRAP ERROR CPU x F0FF". Where "x" is the number reporting in. A missing CPU ID number may mean that one CPU has the same ID as another, it may also mean that one CPU has had a catastrophic failure. The CPU ID of 3 is NOT allowed, it will prevent the other CPU's from coming up and cause red LED's to turn on. Insure that the foreplanes on the CPU set are snug. Refer to ESTK PCBA in this Field Bulletin. 3. After pressing the load button, two CPU's go offline. These two CPU's may have the same ID number. Rock the CPU ID switches to make better contact. Refer to ESTK PCBA in this Field Bulletin. 4. After pressing the load button the system fails to load. Has one of the OS/WCS slots been updated with the MPx 9xxx level prior to taking the MPx 80xx PCB's out ? If not, go to a tape boot to update slot zero from the customers bootable OS tape. If so, look at the DMA and check if the Green Led at the top is blinking. This is an indication that the system cannot find the load disk. Verify that the disk drive is properly connected, ie., radial cable, bus cable, drive ID, proper drive type on DMA etc. Refer to DMA PCBA in this Field Bulletin. 5. After pressing the altload button the system will not load from tape. Check the tape drive to see if the tape is "moving", if so try again with only one CPU on-line with all the cache features disabled (RSTK,CODECACHE,DATACACHE). Try the other CPU's and insure that you have a MPx 9xxx bootable system tape with the "INST.OS0.ATxxx" file first on tape. If the system tape loads but cannot update the disk slots, do a diagnostic tape load of REMIDI and DEMON (a diagnostic tape can be made by following the outline in DOCWRITER). If a tape load fails check the BMTC for proper switch settings, cables and proper connections. Refer to BMTC PCBA in this Field Bulletin. 6. If nothing seems to help bring the system down to a minimum system and try again. Unparallel the frames if possible and use a different single frame. Don't start thinking that ALL the CPU sets are bad when there is a multi-CPU system. The same I/O hardware was used on the MPx 8xxx without any loading problems, that is unless you are also upgrading to different disk drives where the state is unknown. 7. The system should load with one MCS, CPU, Memory, BMTC and a bootable MPx 9xxx system tape in the following manner. The tape will move two times then the system control panel will go to a Run CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB074 Pg006 state, at this time the "Proprietary Message" and the "Loading" prompt should display on the terminal. The tape will move one more time after that and the OS/WCS update screen should be displayed. No terminal is necessary for the tape drive to go through the loading process. This is a good indication that the CPU is good and something else should be checked. When the system starts loading, install a few PCBA's at a time until the system is at full complement. REMIDI: REMIDI level AVA6A0104 and AVC6A0104 should be instlled on all MPx 9000 systems when troubleshooting, even if they are on an earlier OS release. After installation, OSINFO will display in WCS slot 2 "A 6.1.4" and display in WCS slot 3 "A 6.1.5". There was released through a patch tape to RTC's, Branches, Subsidiaries and Sorbus West an earlier version of REMIDI. When installed on the system, OSINFO will display in slot 2 WCS level"A 6.1.3" and in slot 3 WCS level "A 6.1.4". The patch version was released due to enhancements in the CPU test of the MPx 9000 system. That level should now be replaced with the released level of REMIDI. It can be obtained from the 9/8.5E OS release. The patch version will give errors 4xxx in the CPU test when run on the IDC 64 PCBA. To run REMIDI from disk, sense switch two on the front panel (or the second switch from the top on the MCS PCBA) must be set, all others OFF. A "WAITING" message will be displayed which signifies that your test selection can be entered via the sense switches. If you leave only sense switch two ON, only one set of tests will be run. All CPU PCBA's will not be tested. To run ALL tests, at the "WAITING" message reset all switches to the OFF condition. Running individual test may pass where running ALL test will show up errors or won't cycle through all the test. REMIDI must pass and cycle through the option ALL TEST. If the option to run all test is used, error codes will be displayed when REMIDI looks for the controllers to test which are not there. C001 = No HVDT controller found D101 = No BMTC controller found E101 = No ISDC controller found F101 = No IMLC controller found F301 = No LAN controller found REMIDI will loop on the test area selected, if an error occurs during the test REMIDI will continue onto the next controller, CPU, etc. If there are no other boards for REMIDI to continue, then REMIDI will start the selected tests over again. Prior to running REMIDI check the LED's on the PCBA's, note them and reset them. When REMIDI is run the RSTK disable LED, DS1 on the ESTK PCBA(s), will turn on and the Data Cache enable LED, DS4 on the IDC/IDC64-001 PCBA(s) will turn off. During REMIDI CPU test these two LED's will toggle Off and On, at the end of the CPU test the RSTK disable LED will be on and the Data Cache LED will be off. Any other error LED's that turn on may indicate a problem. There are four (4) REMIDI images, images 0, 1, and 2 are for the CPU tests. For one complete test of the CPU it must show 3 passes completed, one pass equals one image. REMIDI will not test the peripherals, this will be left up to the higher level diagnostics known as DEMON, NEWX and DCL. REMIDI should not only be run under NORMAL voltage levels but also with High and Low voltage margins of the LS700. Refer to Power Supply Section. COOK: CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB074 Pg007 COOK is an exerciser, not a diagnostic. It's use is to determin the integrity of the system after an install/upgrade. COOK is capable of starting a task for each terminal simulating a "user" at each of the running terminals. Only the disk drive (Family) that contains the ".Rxxxx.BURN." files will be exercised. In a multi-family system it is strongly recommended that each family contain the ".Rxxxx.BURN." files while exercising the system and the terminals divided equally between the families. For example, there is a 3 family system, one drive per family, and 30 terminals. Terminals T0 thru T9 would be run with the prefix of "(Family1).Rxxxx.BURN.", terminals T10 thru T19 would be run with the prefix of "(Family2).Rxxxx.BURN.", and terminals T20 thru T29 under the prefix of "(Family3).Rxxxx.BURN.". Balancing of the terminals as to the amount of drives in a family should also be taken into consideration, e.g., Family1 has one drive, Family2 has one drive and Family3 has two drives. In this case Family1 should have 1/4 of the terminals, Family2 should have 1/4 of the terminals and Family3 should have 1/2 of the terminals. COOK should be run on the lowest terminal to test, this will become the controlling terminal, with the Log-On privileges of "System.Manager" WITHOUT an Initial Command in security. To run COOK your prefix needs to be set to the ".Rxxxx.BURN." node. Then in command mode input "!COOK" and answer the following prompts: ENTER LOWEST TERMINAL TO RUN: (this should be the lowest terminal of the block of terminals to run. In all cases do not add the leading "T" for the termanial only the numeric is required, ie., T0="0") ENTER HIGHEST TERMINAL TO RUN: (this should be the highest terminal of the block of terminals to run, ie., 9) ENTER FAMILY AND PREFIX OF BURN FILES: (this should be the prefix of the .Rxxxx.BURN. files on the family being exercised, ie., "(Family1).Rxxxx.BURN.") A message of "Node Does Not Exist" will appear on the screen, ignore this message. The terminals will be automatically started within the block of terminals specified. Now the second family and block of terminals may be started with the inputs of, LOWEST="10", HIGHEST="19" and FAMILY= "(Family2).Rxxxx.BURN.". Pressing the ESCAPE key of the controlling terminal will stop the exercise and delete the "JUNKB" files created by the COOK exerciser. Upon completion of running COOK the ERRORLOG UTILITY should be checked for such things as disk errors, corrected memory errors, etc. If the system dumps, note the dump message and reboot. Check the errorlog upon rebooting for a possible cause of the dump and take necessary actions. DUMPS: The following steps should be taken in regards to dumps: 1. Using the Type 3 load insure that the Dump Area on the load disk is large enough to hold the complete dump, failure to do so will result in extended down time without any valid information. If the Dump area is insufficient DO NOT increase the size unless a complete backup of the system disk has been done. The new Dump Area will not take effect until the Initilize option of the disk CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB074 Pg008 has been performed. At this time the NEW disk parameters are invoked. Dump to Tape is not supported on the MPx 9xxx system even though you will get the Dump to Tape message. 2. After the dump completes DUMPTOFILE should be run. This routine will take the dump information from the Dump Area and put it into the ".DMP." node. This node can then be put on tape and sent to Basic Four via the responsible branch or dealer. 3. When DUMPTOFILE is run one of the prompts are "DO YOU WANT A PRINTED COPY OF THE ABOVE INFORMATION (Y/N)". This information is called "CRASHINFO" and should be printed for future reference. This printout should always be added to the "SYSTEM LOG BOOK". Check for IOCB errors, IOCB errors are an indication of a disk hardware problem. Do not submit these dumps. The hardware problems must be taken care of first. 4. After the dump completes, upon the next load of the system, dump information is put into the ERRORLOG. Reference the ERRORLOG with "Report Group = D" (D=dump) for added information, such as: A. Have previous dumps been on the same CPU ? If yes then that CPU is the most likely failing unit. If its the I/O CPU then make it non-I/O, an I/O failure may be logged against the I/O CPU. If the dumps are on random CPU's check for file corruption or voltages. Assume that there is only one failure and NOT that all the CPU sets are bad. Reference the SYSTEM LOG BOOK to check if any of the CPU PCBA's have been swapped between CPU's, by another Field Engineer, causing a dump to migrate to other CPU's. B. Is the Process Name the same ? This could either be a system process, terminal name or ghost name. If the same process causes the dump investigate it's associated functions, ie; *IDLE, this is a system process that each CPU runs when it has nothing to do. This process does not cause a system dump, if *IDLE is in the dump you most likely have a bad CPU (the CPU in the dump), or lower memory, backplane, power, grounding, etc. *MIDNITE, part of this system process is used in power fail recovery to download the ISDC's. This is an indication of power problems, do not submit these dumps. Check ALL internal power supply sequence cables, mainframe ACDU connections, AC power plug, overtemp connections, cables to the control panel and even swap the MCS PCBA (contains power fail detect). Have a line analyzer monitor the customers power. *MIDNIGHT can also be in the DOWNLOAD information in the ERRORLOG. *P0SYMB (PxRDR/PxWTR in 8.6), this is a system process for the printers, is there a corrupted .SPOOL. file (.SPL. in 8.6) or a printer I/O related problem. *FMT, this is a system process for dataword. There is one for each MDT when logged on. Is there a bad IMLC ? There are more system processes than the ones mentioned. Try to become familiar with them. They can be monitored with "!TASKS". C. Is the time about the same, always around 7AM? Dumps that happen in the morning are a good indication of power problems. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB074 Pg009 Equipment being turned On or Off in a manufacturing plant down the block can affect the system if the power condition is poor. Find out what takes place at those common times. If the system has dumped repeatedly, have the customer enable system wide WRITETHROUGH in the Type 3 load. With WRITETHROUGH disabled, when a system dumps the files can "Lack Integrity", error 65. This error will prevent the file from being opened and you must repair the file with DISKANALYZER prior to use. Data that was entered may still be in cache, if the system does not recover, that data will be lost. With WRITETHROUGH enabled, less data will be lost if the system does not recover. Another benefit of enabling WRITETHROUGH is that fewer (or no) files will "Lack Integrity". This will simplify getting the system back on-line following a system dump. One problem with enabling WRITETHROUGH is that the actual record count of files that were active at the time of the dump may be inaccurate. This may show up as a premature error 2 on those files. This may be corrected by reconstructing the file. Have the customer check their files for Lack of Integrity and File Corruption after dumps. Corrupted files can cause the system to Crash even though the hardware has been fixed. This can cause the Field Engineer to put the failing PCB back into the system under the pretense that it did not fix the problem. Verify file system integrity in the following order with Diskanalyzer: In Type 2 Load (single-user environment) STEP: 1) #5 Disk Space Usage (Space missing/overlapping) 2) #10 Reconstruct Directory File (If necessary) 3) #9 Reconstruct Available Space Files (If step 2 done) 4) #5 Disk Space Usage (If step 2 and 3 done to verify that the problems detected have been corrected. This step is frequently skipped because its time-consuming, however, it can eliminate some very puzzling problems that would show up later.) 5) #1 Find Files That Lack Integrity (Get a hard copy, the list of files that this option generates will be used in subsequent steps.) In Type 1 Load STEP: 6) !RECONSTRUCT (To repair keyed files form list in step 5, this utility vs option #2 in Diskanalyzer will keep the index values the same.) 7) #2 Validate/Reconstruct a File (To repair other files from list in step 5.) 8) #3 Validate All Files (Only if further problems occure.) When troubleshooting, ALWAYS approach the problem as if there is one and only one failure in the system. If the replacement PCB does not fix the problem, always put the original PCBA back into the system. Leaving the UNKNOWN spare in the system may cause the symptom to change, by introducing a second problem, making it harder to determine where the problem is. BOARD RESTRICTIONS FOR MPx 9xxx SYSTEM: Insure that the PCBA's are at or above their LARL. DO NOT shutdown a trouble-free system to update to these levels; however, upon replacing a faulty assembly use the LARL as a guide for the new assembly. Individuals may want to gradually bring CPU boards up to later CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB074 Pg010 revision levels over a period of time (i.e. replace one board during a PM and another on the next PM). PCBA PN MIN CURRENT AMS 903548 F L IDC 903550-001 P P (with cache) 903550-002 P P (without cache) IDC64 903597-001 E E (with cache) IDC64 903597-002 E E (without cache) ESTK 903552 G J DMA 903554 H L MCS 903374 L T 1/2/4 MB 903516 E J 1 MB 903349 V Y BMTC 903413 R U (rev U required for GCR tape) NIMLC 903381 K S 903534 D H VCON 903377 C K 8WAY 903383 A G 16WAY 903437 J M Refer to FIGURE'S 1 and 2 for proper PCBA placement. MCS PCBA: The MCS PCBA, revision "S" or above, may be switch selected for the model of system it is to be used in. SW1-4 (Open) selects either MPx 70/80xx systems or (Closed) MPx 90/95xx systems. If the MCS PCBA is below revision "S" and/or not selected for MPx 90/95xx systems then the address board number range 32 thru 47 may only be used for the IMLC, no other PCBA may use these address numbers. When replacing the MCS PCBA, insure that the system ISDC's are within the proper board addresses. See: Field Bulletin #230. CPU PCBA'S: The AMS, ESTK and IDC PCBA's make up the MPx 90/95xx system CPU, refer to figure 3. In a two cardcage system, the CPU's must be in the right most position of the first frame. In a three cardcage system, the CPU's must be in the right most position of the second frame. All CPU's must be in the same cardcage. Each CPU present must have a valid and unique ID number that is set by switch S4 on the ESTK PCBA. ESTK PCBA: There are two artwork versions of the ESTK PCBA. They both have the same part number and perform the same function. The location of the CPU ID switch S4 is in different locations. On PCB 905120 S4 is at location 5EE and on PCB 905209 S4 is at location 9CC. PCB 905120 PCB 905209 0=Closed=On ESTK PCBA CPU# S4-8|S4-7|6thru1 S4-1|S4-2|3&4 1=Open=Off 0 0 | 0 | X 0 | 0 | X X=Don't care 1 0 | 1 | X 0 | 1 | X 2 1 | 0 | X 1 | 0 | X The CPU ID switch contacts, on PCB 905120 location 5EE, may become intermittent or open due to ECN rework. This condition can cause: 1) The system to not load. 2) The system to hang. 3) The system to dump. See: Field Bulletin #251. IDC PCBA: ECX Cache errors in the errorlog are a result of cache parity errors on the IDC PCB. Cache parity errors on OS CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB074 Pg011 level 9.5C*15 will always be logged against CPU #0 even if the errors happened on CPU #1 or 2. This error in recording cache errors in the errorlog is fixed in the OS level of 9.5D*24. Cache errors will not cause the system to dump. See: Field Bulletin #207 IDC64 PCBA: This new IDC64 PCBA is required for memory support above 12Mb of main memory. This PCBA is a direct replacement of the current IDC PCBA by way of a jumper for either 16Mb or 64Mb. The 16Mb selection will be used to replace the current IDC PCBA. (16Mb = memory mapped controllers and main memory) JMP6 to JMP7 in = 16Mb JMP6 to JMP7 out = 64Mb DMA PCBA: The DMA PCBA must reside in the slots following the CPU's to the right. Two printers and four disk drives can be interfaced with one DMA controller. A total Bus cable length per DMA is 55 feet. This length is not to be exceeded. All DMA's must be contained in the same cardcage. In a multi cardcage system the DMA must be the first PCBA in the next frame to the right of the CPU. Prior to replacing a DMA PCBA, check file integrity of the family that will be connected to the DMA replacement. Some backplane lines used on the MPx 9000 were NOT used on the MPx 8000. The integrity of these lines are unknown, because they were not used, and may cause problems with the DMA on the MPx 9000 conversion. These race lines can be checked from one end of the backplane to the other with an ohm meter for continuity. Race lines at P1A 7, 11, 12, and 14 The following are valid switch settings for the DMA PCBA. DISK TYPE 6R = DISK 1 | 6R = DISK 0 0=Closed=On SW 6R AND 6S 6S = DISK 3 | 6S = DISK 2 1=Open=Off 8 7 6 5 | 4 3 2 1 ----------------------------------------------- 4510 8" P314 1 1 1 1 1 1 1 1 4501 14" P66 1 1 1 0 1 1 1 0 4504 14" T83 1 1 0 1 1 1 0 1 4501 14" P154 1 1 0 0 1 1 0 0 4502 14" T303 1 0 1 1 1 0 1 1 PRINTER TYPE SW 6J PRINTER 1 | PRINTER 2 8 7 6 5 4 3 2 1 ------------------------------------------------ 4201 MATRIX 0 1 1 1 0 1 1 1 4209/4220 BAND 1 1 1 0 1 1 1 0 4214 MVP 0 1 0 1 0 1 0 1 6J-9 Open=DMA On-Line / Closed=DMA Loop on Self-Test 6J-4 and 6J-8 invert the printer data strobe JUMPERS: JMP 1 and JMP 3 Removed JMP 2 and JMP 4 Installed Revision "G" DMA has the following fixes: 1) Potential disk off-line or hang when an ID CRC error is CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB074 Pg012 detected. 2) Insure that Bus cable presence is detected. 3) Support model 4220 600 LPM band printer. 4) Decrease disk access time in Type 3 disk to disk backup. There will be a new artwork release of the DMA that will have the above enhancements to it. Re: Field Bulletin #219A PCBA RESTRICTIONS: The following PCBA's may be carried over from the MPx 80xx system. Insure that the MPx 9xxx board addressing is used. The board address 16 thru 31 are not used in the MPx 9xxx system. MEMORIES: Insure that the memory PCBA's are at the required revision level when memory is replaced. The MPx 9000 system requires these revisions which enhances the memory read cycle access time. The memories must be placed to the right of the DMA PCBA. Higher density memory boards must be addressed as the first memory with the lower density memory boards last. Re: Field Bulletin #154. On PCBA 903516, 1/2/4 Mb PCBA's, at revision "J" or above insure that jumper JMP-5, location 1-E, is connected 2 to 3 and jumper at location 1A is connected to IC pads 9 to 10. These jumpers are for future support of greater than 12Mb of main memory. VCON: The VCON controllers must be readdressed to the MPx 9xxx scheme. If the VCON's are not readdressed there will be no load display on the screen. The new addressing can be achieved by switching switch 2C-5 from closed to open. The VCON PCBA may be placed on either the left or right of the CPU's. BMTC: One BMTC PCBA is required for tape support on the MPx 90/9500 Series systems. For GCR 6250 1/2 tape support the BMTC must be at Revision "U". The GCR uses the same switch settings as the MTS tape drive. The BMTC PCBA must reside to the right of the CPU's after the memories and must be addressed on even boundries. IMLC: IMLC boards must be addressed as shared-memory controllers 32 thru 47. No other controllers should use these addresses. If the system has a MCS PCBA at or above revision "S" and switch selected for the MPx 90/9500 system, then any address may be used. The new style IMLC PN 903534 may be placed either to the left or right of the CPU. The old style IMLC PN 903381 must be located to the right of the CPU only. 8 and 16-Way: The 8-Way and 16-Way PCBA's may reside either to the far left or right of the CPU's. In a upgrade the PCBA board addressing above address 15 (16 through 31 not used) must be readdressed for the MPx 90/9500 scheme. The 16-Way PCB must be addressed on even boundries. Refer to the MPx 9000 and 9500 Series Service Manual, M8101A, section 4 for more information on troubleshooting. ORIGINATOR: D. LUQUE CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB074 Pg013 FIB 00075 02/27/87 *** Switch setting clarification for IMLC P/N 903534-001 *** On the latest style IMLC PCBA's P/N 903534-001, the dip switch (SW6) controlling the CPU mode of the board displays conflicting settings for the 160 nanosecond position. The silkscreen of the PCBA indicates the 160 nanosecond position to be in the top or up position of the rocker switch. The true 160 nanosecond position for all 7000/8000/9000 systems is in the down position only. The top position is actually the 200 nanosecond mode for compatibility with the older 810 systems. Refer to the FIB Handbook section Mini-Systems Alert no. 461A for all correct information. Disregard the information found regarding switch 6 in the manual M8101A, "MPx 9000 and 9500 Series - Service Manual" and manual M8098, "MPx Series IMLC Service Manual". Please make a note of the conflict to prevent system malfunction. ======================= || 4 3 2 1 || 810 || +-+ +-+ +-+ +-+ || || | | | | | | | | || MPx || |=| |=| |=| |=| || || +-+ +-+ +-+ +-+ || || CLOSED || ======================= Location 4C The above switch is set for 160 nanoseconds. ORIGINATOR: R. HINOJOSA CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB075 Pg001 FIB 00076 03/10/87 *** Line Conditioner Notes *** The high current demands of the switching power supplies used in the MPX series systems may cause problems when some types of line conditioners are used. The current is non sinusoidual therefore the measurements made with an ammeter will not show the true current drawn by the system. Therefore any devices used for power conditioning should be rated at the AC lines capacity (i.e. 20 AMPS/frame). This may be modified slightly for a very lightly loaded system (small 7000) but in general any conditioning device should be rated at 2.5 KVA (20 AMPS) for each mainframe. The high peak currents will also cause problems for ferro-resonant transformers if they are not properly rated and of good quality. If a ferro-resonant device is used on an MPx series system it MUST be rated at 2.5 KVA for each frame and the output should be monitored with the system under a good load. ORIGINATOR: N. JONES CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB076 Pg001 FIB 00077 03/11/87 *** Cautions on LS700 P/S - Intermittent CPU problems *** Prior to installation of a spare LS700 power supply, remove the Main Logic PCB and thoroughly check all Power Transistors for loose retaining nuts. These nuts not only secure the transistors to the board but are the electrical connections for the Collector of each transistor. If you are experiencing intermittent problems with an LS700 power supply, prior to replacement of the supply, remove it and perform the checks mentioned above. This may prevent the needless replacement of it. Also if you are experiencing intermittent problems with an MPx CPU (Dumps, Hangs, Red lights on PCBs, CPU Run light going off, etc.), it is highly recommended that you perform the same procedure on ALL LS700 supplies in the CPU. ORIGINATOR: S. SCHWARTZ CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB077 Pg001 FIB 00078 03/30/87 *** +12 Volts crowbars in the LS700 with modems/multiplexors attached *** There is a known overload condition, which can cause overloading and subsequent crowbaring of the unprotected +12 volts. This condition appears to occur only when two or more 16-way controllers are installed in the same chassis AND the 16-way ports are connected to either multiplexers or modems. The cause of the overload is that in the multiplexers and modem equipment all signal lines are terminated with a low resistance. This causes excessive current to be drawn from the associated +12 volt supply. **** NOTE **** Basic Four's latest Revision Level on the LS700 Power Supply Assembly (Rev. AB) does not correct this condition. There are two workarounds for this problem: 1. Move 16-ways until there is only one installed per chassis. 2. Use 16-way to multiplexer/modem cables that have wires connecting ONLY transmit, receive and signal ground. ORIGINATOR: STAN BENT CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB078 Pg001 FIB 00079 03/30/87 *** REMIDI may show false errors on 9500 Systems *** False errors when running REMIDI on 9500 CPUs have surfaced in a number of locations. These failures show up in test numbers 4xxx, 41xx and 92xx and may lead one to think the ESTK PCB is defective. You may also experience errors or hangs in the Main Memory test. The IDC 64 PCB may also cause false errors in the ESTK tests. The problem is that the current level of REMIDI on Release 9.5 and a recent patch tape sent to the field DO NOT correctly test the IDC 64 PCB or the ESTK PCB (at Rev. J or above). Both of thes PCBs have circuitry for the capability of supporting GREATER than 12 Megabytes. The current REMIDI level in the field will not support over 12 Megabytes and will give false errors with the above mentioned PCBs. The supported REMIDI level which will eliminate the above problems is on the recently released O/S level 8.5/9.5E. This level should be installed on all 9000/9500.syatems and a copy of all REMIDI files should be obtained through your local Basic Four Branch or Distributor. The Release 8.5/9.5E O/S is not a mandantory requirement for the customer, however with Sorbus West currently shipping both of the above PCBs for spares, it is recommended that the correct REMIDI level be installed at 9000/9500 sites as soon as possible or on a next call basis. With OSINFO the correct REMIDI level will display A6.1.4 in slot 2 and A6.1.5 in slot 3. ORIGINATOR: D. LOISELLE CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB079 Pg001 FIB 00080 04/14/87 *** AC wiring problem in the 7100/9100 ACDU - ECN instructions *** The AC Distribution unit in the MPx 7100/9100 Systems (B/4 part no. 916064-002) may smoke if the service switch is turned off without turning the breaker off. Prior to initial power up of a newly installed 7100/9100 System, be certain that ECN 12052 has been installed in the AC Distribution Unit. ECN 12052 Instructions: 1. Disconnect all AC input to the CPU. 2. Remove the wire from XF1-1 to SW1-1 3. Remove the wire from XF2-1 to SW1-2 4. Install the wire removed in step 2 on XF2-1 to SW1-2 5. Install the wire removed in step 3 on XF1-1 to SW1-2 When completed there should be one wire connected to SW1-1 which goes to CB1-2 and three wires connected to SW1-2 as follows: One wire going to XF1-1 One wire going to XF2-1 One wire going to P2 This modification should be done immediately. ORIGINATOR: J. BUSCAGLIA CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB080 Pg001 FIB 00081 04/22/87 *** DEMON DMA/Disk test may give false errors on 9xxx Series *** DEMON testing of disk drives and the DMA PCBA may give erroneous error messages in the following test selections. 1) Unit Selection #1. Disk Drive. Problem: Head/Cylinder ID errors are induced when vigorous sequential reads (Read tracks) are performed on all the drives at the same time with two or more DMA's. This type of operation is not performed in a customer environment. In case it is performed it will log an error to the ERRORLOG and continue the operation. Workaround: Concurrent testing of disk drives with sequential reads should be limited to drives on the same DMA PCBA to avoid these erroneous errors. Resolution: This problem will be fixed via an ECN to the DMA PCBA. 2) Unit Selection #9. DMA's. Problem: Running the DMA test, option #9, can cause the system to lock-up in a multiple CPU/DMA system after pressing the escape key to exit the test. In the DMA selection menu, the option "Test #1 on all boards" will default to the value of "0" if there is only one DMA in the system. This test can only be selected if there is more than one DMA in the system, the default value will be "1". Once this test is started it fires off the same Back to Back (BTB) DMA sequence as test #1 except that it starts it on all DMA boards in the system. Workaround: With this value set to "1" only one DMA should be tested at a time. If multiple DMA testing is to be done concurrently, this option should be set to "0". Resolution: The DMA testing problem has been duplicated in DEMON versions 5.4.0.0 (9.5E) and 6.1.27.7 (9.6A). The fix to this problem is to be determined. ORIGINATOR: D. LUQUE CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB081 Pg001 FIB 00082 04/22/87 *** IDC-64 PCBAs must be at Rev E to prevent data corruption *** If all CPU sets contain the IDC 64 PCBA P/N 903597, in a multiple DMA configuration, the likelihood of data corruption may result. This rare and unlikely condition might be noticed on systems with high activity. System performance may also decrease due to unnecessary memory cycles. A missing ground etch on the PCB causes "Race A" line to float. This condition may cause possible corruption of user files on multiple DMA systems. The Race A line is "ORed" on the backplane. If there is an original IDC PCBA P/N 903550 in the system, the missing ground on the IDC 64 will be satisified via the original IDC. (The IDC PCBA 903550 will ground this line on the backplane) ECN #11917A has been released against the IDC 64 PCBA. This ECN should be put on all IDC 64 PCBA's at the first available time. Rework is simple and can be done in the field, this way unknown PCBA's won't be put into the system. This ECN should be installed as-soon-as-possible. The LARL of the IDC 64 PCBA is now revision "E". Some IDC 64 PCBA's have been shipped marked revision "C". They are in fact at revision "D". First shipment of the IDC 64 PCBA was in the January 87 time frame. There have been NO IDC 64 PCBA's below revision "D" shipped from MAI Basic Four Inc. Refer to the attached ECN #11917A for rework instructions. Advance the revision level to "E". DRAWING INFORMATION: See Worldwide Product Support Field Bulletin hardcopy for ECN #11917A rework instructions. ORIGINATOR: D. LUQUE CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB082 Pg001 FIB 00083 04/22/87 *** REMIDI VERSION 6.01.04 is available for 2,10,x,x fourtuples *** Around the October 86 time frame there was a REMIDI patch tape sent out to all RTC's, Branches, Subsidiaries, and Sorbus West. The REMIDI patch tape was sent out because of enhancements added to it that the 8/9.5D OS version did not have for the MPx 9000 CPU PCBA's. With the 8/9.5E OS release, a more current level of REMIDI has been released. The REMIDI version 6.01.04 is now the supported level of REMIDI. The REMIDI patch version 6.01.03 is not to be used at this time and needs to be replaced with the 8/9.5E OS version. In OSINFO the REMIDI patch version 6.01.03 will display in slot 2 "A6.1.3" and in slot 3 "A6.1.4". All Branches and Subsidiaries should have already ordered the 8/9.5E OS release. The REMIDI files ".R5E25.INST.REMIDI.AVA6A0104" and ".R5E25.INST.REMIDI.AVC6A0104" can be saved to tape and installed on MPx 9000 systems on earlier OS releases. Also back-up the ".R5E25.INST.DOC. REMIDIA" file to be used in DOCWRITER. You will have to re-name "R5E25" to the level of OS that is on the system. This level must be used when troubleshooting the MPx 9000 system. If a system is dumping with the four-tuple of 2,10,x,x then REMIDI version 6.01.04 should be run. REMIDI should be run with high and low margining of the +5VDC of the LS-700/UPPS-100 power supplies. The ALL TEST selection should be used. This can be achieved by depressing sense switch 2 on the system control panel a second time when the "Waiting" message is displayed (all sense switches off). If the MCS switches are used to load REMIDI then all switches must be reset to the "Down" position, when the "Waiting" message is displayed. Corrupted files too can cause dumps of 2,10,x,x. Have the operator check their files and correct any bad files. With the preparation of supporting greater then 12 megabytes of main memory, the new IDC 64 PCBA P/N 903597 was added. This new IDC 64 PCBA will error in the CPU test (errors 4xxx) and also in the memory test when using the earlier REMIDI patch tape. To ensure PCB reliability and to prevent unnecessary board replacement version 6.01.04 must be used. In OSINFO slot 2 will display "A6.1.4" and slot 3 will display "A6.1.5". ORIGINATOR: D. LUQUE CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB083 Pg001 FIB 00084 05/20/87 *** Important information on DC grounding/ground loops *** The MPx series is just as susceptable (if not more so) to ground loops and improper cable shielding connection as the BBIII/BBIV series. If careful attention is not given to these important aspects of an MPx system, various difficult (if not impossible) to diagnose problems may solidly or intermittantly occur. For complete instructions for detecting and correcting problems of this nature, obtain a copy of the Sorbus handbook "Computer Room Environment Problems", S-HDBK-027. This is available from the Sorbus Technical Library in Frazer. The information referred to in this F.I.B. will be found on page 3-6 of the handbook. Also note that the handbook contains considerable information other than that mentioned above. The application of the information contained in this handbook may well solve many intermittant problems on any computer system. ORIGINATOR: H. MITCHELL CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB084 Pg001 FIB 00085 06/04/87 *** Potential cut cable on 71X0/91X0 Systems *** SYMPTOM/TEXT: Due to the closeness of the LS700 P/S to the backplane of these systems, the cable that plugs into J14 of the backplane will come in contact with a sheetmetal screw on the P/S which can cut into the cable and cause various systems problems (depending on which wire gets shorted). FIX: Insulate the cable area that touches the P/S with electrical tape. ORIGINATOR: John Tank CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB085 Pg001 FIB 00086 06/04/87 *** Top panel interferes with control panel cable on 71X0/91X0 *** SYMPTOM/TEXT: The above problem occurs if the cable from the front panel is not dressed in a way to avoid snagging on the top cover latch. Unfortuately, it cannot be seen when the top cover is on and the damage is done as the cover is removed. FIX: Be aware of this possibility and feel for this cable clearance before removing the cover. Re-position and tie the cable as necessary to eliminate this problem. ORIGINATOR: JOHN TANK CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB086 Pg001 FIB 00087 07/01/87 *** MPx 9000 series systems failing to recognize IMLC Controller *** There have been some cases where the IMLC has not been recognized by the operating system. (It does not show when running DEVICES). It may or may not be recognized by DEMON. Temporary solution: Set MCS PCBA switch SW1-4 to Open. (MPx 8000 setting). Address the IMLC board within the range of 32 through 47. MAI Basic Four Engineering is working on a permanent solution to this problem. ORIGINATOR: Jaime Buscaglia CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB087 Pg001 FIB 00088 08/05/87 *** Priam 14" disk drives will not spin-up *** SYMPTOM: Priam 14" disk drives would not spin up after power failure. Upon checking all breakers and fuses, it was determined that the P-Disk AC Distribution Unit was . not supplying AC to the disk drives. PROBLEM DETERMINATION: There is a hidden fuse inside the P-Disk AC Distribution Unit. This fuse is mounted on the P-Disk Controller PCBA, P/N 903303, which is located within the case of the P-Disk ACDU. The purpose of this fuse is to protect the AC control relay circuitry mounted on the P-Disk Controller PCBA. If this fuse opens for for any reason (such as a AC power surge), then AC power will not be supplied to the Priam 14" disk drives. FIX: If you experience the above symptom, disassemble the P-Disk ACDU and check this fuse and replace it if defective. Replace with a glass, fast blow, .5 amp fuse only. If the fuse is not blown, the circuitry on the P-Disk Controller PCBA may. be causing the problem. ORIGINATOR: John Bloxton CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB088 Pg001 FIB 00089 08/11/87 *** Three different ACS PCBAs - difference details *** With the release of the MPx 7100 Series system, a new ACS PCBA was released. ACS PCBA PN 903379-003 is required in the MPx 7100 system for support of the new 4406 MTCS. At this time there are three (3) different ACS PCBA's and part numbers. 903379-001 - MM 896020 used in 1 to 2 CPU systems 903379-002 - MM 896025 used in 1, 2 or 3 CPU systems 903379-003 - MM 896026 used in 1, 2 or 3 CPU systems * * Mandatory for 7100 systems The 903379-003 ACS PCBA, revision "AD", can be used as a replacement for the -001 and -002 ACS PCBA's but the -003 is the ONLY ACS PCBA to be used in the MPx 7100 system. An upgrade kit, PN 916127, is available to upgrade the -002 ACS PCBA to the -003 ACS PCBA. The -002 ACS PCBA must be at revision level "U" or later before installing the upgrade kit. The upgrade kit consists of eight (8) proms numbered -085 thru -092 that will replace the proms at location 8H thru 8A respectively. After installing the kit the revision level of the PCBA will need to be changed. The ECN's between revision "U" and "AC" are part list changes, removing IC sockets and replacing Boot proms (Boot proms which are going to be replaced again with the upgrade kit). Depending on the revision level of the -002 ACS PCBA, the number (n) to indicate the number of ECN's missing will vary. Revision = (n)AD (after installing upgrade kit) Was | Is --------------- U = 7AD V = 6AD W = 5AD Y = 4AD Z = 3AD AA = 2AD AB = 1AD AC = AD For example: -002 PCBA is at revision level "Y" after installing the upgrade kit. PCBA will now be re-marked as a -003 at revision "4AD". "4" is the number of ECN's missing; ECN's for revisions Z, AA, AB and AC. Refer to ECN 11890 which can be obtained through your normal channels. ORIGINATOR: D. Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB089 Pg001 FIB 00090 08/11/87 *** MCS and Terminator PCBAs must be updated for 16MB memory PCBAs *** For the future support of a 16MB PCBA on the MPx 9xxx system, other PCB's must be updated. New part numbers are assigned to the MCS PCBA and the Terminator PCBA. WAS IS MCS PCBA PN 903374-001 903374-002 (rev. V) TERMINATOR PCBA PN 903199-001 903199-004 (rev. H) These new PCBA's are required to meet the refresh requirements of the 16MB PCBA which will be available in late 1987. The updated assemblies are backward compatible across the MPx product line with all memory module assemblies and will begin being used in new MPx system builds. It is suggested that all MCS and Terminator PCBA's be upgraded to these new levels for ease of stocking. Refer to ECN's 12123A and 12124A which can be obtained through your normal channels. ORIGINATOR: D. Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB090 Pg001 FIB 00091 07/12/88 *** SMDII defect may cause load failure, disk offline and read errors *** INCORRECT TERMINATOR PACK INSTALLATION: Possible "Disk Offline" and "Normal Read" errors may be caused by improper terminator installation. The Bus terminator packs (R56, R57, R58) on some SMDII PCBAs were installed incorrectly. Pin #1 on the terminator packs should be to the right towards pin #1 of the Bus cable (see attached diagrams). Refer to ECN #12260, #12366 and Field Bulletin #367. ESD IMMUNITY: Possible "Disk Offline" errors may occur from a Electro Static Discharge (ESD) condition. ECN #12284 has been released to increase immunity to ESD's from 1KV to 20KV. Please refer to the attached ECN. This ECN is required only on SMDII assemblies. It adds two .1uf capacitors (IC 5D pin 13 to pin 7 & IC 5B pin 1 to pin 7) and bumps the board to REV. D. LOADING PROBLEM: The SMDII PCBA, P/N 903633, may exhibit the symptom of being able to load DEMON and REMIDI but not able to load the OS. Motorola IC MC3453, with the date code 8648 is a bad lot. Though the problem appears to be with these IC's at location 1A and 2A, locations 1B, 1C, 1D, 1G, 2B, 2C and 2D should be replaced too. Manufacturing has purged these IC's with that date code from stock. All spares in stock and locations that are experiencing this problem should check for this date code. DRAWING INFORMATION: See WPS Bulletin #358A for referenced information. ORIGINATOR: D. Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB091 Pg001 FIB 00092 08/11/87 *** MPx 7100 Series Hardware Announcement *** MAI Basic Four, Inc. is pleased to announce the addition of new MPx 7110 and 7120 System to the MPx family. This new series uses the more contemporary, low profile cabinetry. Using the same CPU set as the MPx 7000 Series, the MPx 7100 Series differs in the following manner: o A new, low profile cabinetry. o A new 120MB 1/4" Magnetic Cartridge Streamer tape (MCS). o A new 169MB 5 1/4" disk drive. o No support for 14" fixed disk drives. TABLE OF CONTENTS 1.0 System Capacities 2.0 System Installation 3.0 Central Cabinet Assembly 4.0 Disk Drives 5.0 Tape Drives 6.0 Operating System 1.0 SYSTEM CAPACITIES MPx 7110 MPx 7120 * MPx 7130 Min/Max Min/Max Min/Max Chassis 1/2 1/3 2/3 Memory 2.0MB/4.0MB 2.0MB/6.0MB 4.0MB/8.0MB Disk Capacity 169MB/2.27GB 169MB/2.7GB 169MB/2.7GB Disk Drives 1/8 1/8 1/8 Tape Drives 1/2 1/2 1/2 Serial I/O Devices 1/20 1/52 1/116 MDT's 0/8 0/8 0/8 Display Terminals 1/20 1/52 1/116 HVDT's 0/16 0/24 0/24 Serial Printers 0/19 0/24 0/99 Parallel Printers 0/4 0/4 0/4 Total System Printers 1/23 1/48 1/99 * The ability to add a third CPU to form an MPx 7130 is available as an upgrade only from an MPx 7110 or MPx 7120. 2.0 SYSTEM INSTALLATION The MPx 7100 system has the same installation requirements as the MPx 7000 system. A 20amp twist lock (L5-20P) receptacle is required for the central cabinet assembly (CCA). If the system has only one (1) disk drive and only one (1) MTCS tape, the power CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB092 Pg001 will be supplied by the systems LS-700 power supply and no other power receptacle is needed. If there are two (2) disk drives or more (up to a max of 4 per frame) in the CCA, a 15amp twist lock (L5-15P) will be required for the disk cabinet of the CCA. 3.0 CENTRAL CABINET ASSEMBLY A new ACS PCBA PN 903379-003 is required to support the new MTCS 1/4" tape drive. This PCBA can also be used in the MPx 7000/8000 Series Systems. The narrow LS-700 power supply, PN 907295-002, is required to fit into the new low profile cabinetry. The narrow LS-700 power supply can also be used in the MPx 7xxx/8xxx/9xxx Series Systems. Height: 29.5" Width: 25.2" Depth: 32.5" Weight: 180 lbs. approximately Heat output: 4000 BTU/hour for 1 chassis (approx) 8000 BTU/hour for 2 chassis (approx) 12000 BTU/hour for 3 chassis (apporx) 4.0 DISK DRIVES At no time can you mix unlike drive types in the same disk frame (8" fixed drives cannot reside in the same frame with 5 1/4" fixed drives). The MPx 7100 system comes with a 169MB (formatted capacity) 5 1/4" fixed disk as the first drive. Four 5 1/4" disk drives can occupy one disk frame. They are supported by the MPC controller. One MPC controller can support four 5 1/4" disk drives. If there is more than one disk drive in the CCA, an additional 15amp (L5-15P) twist lock receptacle will be required along with the 20amp (L5- 20P) twist lock for the CPU. The existing 126MB 5 1/4" disk drive used in the MPx 7000 Series System will continue to be offered as an add-on drive. Up to four 126MB 5 1/4" disk drive can occupy one disk frame supported by the MPC controller. This will require an additional 15amp (L5-15P) twist lock receptacle for the frame. The 314MB 8" disk drive will be offered as an add-on drive in a separate disk frame. This will require the use of a TDP controller. The TDP controller can support two disk drives via an SMDI PCBA. Only two 8" disk drives can occupy one disk frame and requires an additional 15amp (L5-15P) twist lock receptacle for the frame. The 75MB T83 (carry over) and the 285MB T303 are also supported as standalone removable disk drives. They require a TDP controller. The TDP controller can support two disk drives. The T83 requires one 15amp (L5-15P) twist lock receptacle. The T303 requires one 220v straight blade (6-15P) receptacle. There is no support for the 14" fixed disk drives. 5.0 TAPE DRIVES The MPx 7100 Series systems come with one 120MB 1/4" MTCS tape drive. A maximum of two are supported but the second one will be CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB092 Pg002 an external unit. This tape drive requires the use of a 600-foot tape cartridge. The supported tape cartridge for the 120MB MTCS is 600A from 3M. The use of the 600A tape will require the tape heads to be cleaned after four hours of operation. Tapes created on the 120MB MTCS can only be read on the 120MB MTCS. Other tapes created on the 45MB and 60MB MTCS tape drives (which use a 450-foot tape cartridges) can be read, but not written to, on the 120MB MTCS. A 60MB MTCS tape unit is available as an external add-on unit only. The 60MB MTCS tape unit has a feature that allows it to function as a 45MB tape drive. It does this by sensing which tape cartridge is inserted. If a 450-foot MTCS cartridge tape is used (will only hold 43MB of data) it will be able to be read on the 45MB and 120MB tape units. If the 600-foot MTCS cartridge is used, tape exchange will be between the 60MB and 120MB units only. Lower density tape cartridges can be read on higher density MTCS tape drives but high density tape cartridges cannot be read on lower density MTCS tape drives. To create tapes to be read by other MPx systems use the following guidelines: Tape Drive Read Write ______________________________ | MDL 4403 | Yes | Yes | | 45MB | | | |___________|_________|________| 450-foot | MDL 4406 | * Yes | * Yes | Tape | 45/60MB | | | |___________|_________|________| | MDL 4406 | * Yes | No | | 120MB | | | |___________|_________|________| (*) 45MB only Tape Drive Read Write ______________________________ | MDL 4403 | No | No | | 45MB | | | |___________|_________|________| 600-foot | MDL 4406 | * Yes | * Yes | Tape | 45/60MB | | | |___________|_________|________| | MDL 4406 | Yes | Yes | | 120MB | | | |___________|_________|________| (*) 60MB only If data is written on: MDL 4403 MDL 4406 MDL 4406 45MB 45/60MB 120MB _______________________________ Data can MDL 4403 | Yes | * Yes | No | be read on: 45MB | | | | |___________|__________|________| MDL 4406 | Yes | Yes | No | 45/60MB | | | | CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB092 Pg003 |___________|__________|________| MDL 4406 | Yes | Yes | Yes | 120MB | | | | |___________|__________|________| (*) 450-foot only The MTR and MTS are also supported with the use of a BMTC controller. 6.0 OPERATING SYSTEM The supported Operating System for the MPx 7100 system is 8.6A. All system software (including the BOSS/VS operating system, MAI OFFICE, etc.) will be distributed on the 45MB (450-foot) cartridge tape. This tape media can be read by ALL MPx systems, regardless of MTCS tape drive. ORIGINATOR: D. Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB092 Pg004 FIB 00093 08/11/87 *** MPx 9100 Series Hardware Announcement *** MAI Basic Four, Inc. is pleased to announce the addition of new MPx 9110 and 9120 System to the MPx family. This new series uses the more contemporary, low profile cabinetry. Using the same CPU set as the MPx 9000 Series, the MPx 9100 Series differs in the following manner: o New low profile cabinetry. o New SMD II 8" disk interface board. o No Code or Data Cache, Rstack only. o No 14" fixed disk drive support. TABLE OF CONTENTS 1.0 System Capacities 2.0 System Installation 3.0 Central Cabinet Assembly 4.0 Disk Drives 5.0 Tape Drives 6.0 Operating System 1.0 SYSTEM CAPACITIES MPx 9110 MPx 9120 Min/Max Min/Max -------- -------- Chassis 1/2 2/3 Memory 4.0MB/12.0MB 4.0MB/12.0MB Disk Capacity 300MB/3.6GB 300MB/3.6GB Disk Drives 1/12 1/12 Tape Drives 1/2 1/2 Serial I/O Devices 1/68 1/116 MDT's 0/8 0/8 Display Terminals 1/68 1/116 HVDT's 0/24 0/24 Serial Printers 0/67 0/99 Parallel Printers 0/8 0/8 Total System Printers 1/75 1/99 2.0 SYSTEM INSTALLATION The MPx 9100 system has the same installation requirements as the MPx 8000/9000 systems. A 20amp twist lock (L5-20P) receptacle is required for the central cabinet assembly (CCA). A 15amp twist lock (L5-15P) will be required for the disk cabinet of the CCA. 3.0 CENTRAL CABINET ASSEMBLY CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB093 Pg001 In an MPx 9110 system (single chassis) with a minimum configuration (1-MCS, 1-AMS, 1-ESTK, 1-IDC-64, 1-DMA, 1-BMTC, 1- 4MB) there will be four empty slots. A single chassis can only support three (3) memory PCBA's and this count includes the BMTC. If more than 8MB of main memory is required, you must have another chassis. The narrow LS-700 power supply, PN 907295-002, is required to fit into the new low profile cabinetry. The narrow LS-700 power supply also can be used in the MPx 7xxx/8xxx/9xxx Series Systems. The CPU set uses the IDC-64, PN 903597-002, without cache. Height: 29.5" Width: 25.2" Depth: 32.5" Weight: 180 lbs. approximately Heat output: 4000 BTU/hour for 1 chassis 8000 BTU/hour for 2 chassis 4.0 DISK DRIVES Two 8" 314MB disk drives can occupy one disk frame. This will require a 15amp (L5-15P) twist lock receptacle for the disk frame. The 8" disk drives are interfaced to the DMA controller with the SMD II PCBA, PN 903633-001. This assembly supports two disk drives, each disk must be addressed as drive number 0. Additionally, there is a separate bus cable, with its associated radial cable, to each drive (not daisy chained) from the SMD II PCBA. This bus cable must be terminated at the drive end. The SMDII PCBA is backward compatible with the SMDI PCBA P/N 903531 or 903591. The SMDII PCBA is required in the Mpx 71xx system to interface to the disk indicator panel. Two groups of jumper posts (JP2 and JP3) control disk sequencing time delay. A delay jumper must be installed on one pair of posts in each group. The posts are numbered as shown below and the corsponding delay is indicated. These delays are accurate to +/- 20%. TIME DELAY JP2 = Drive 0 0 = No time delay (as shipped) JP3 = Drive 1 30 = 30 seconds 60 = 60 seconds Jumper JP1 is drive address select for the drives that will be connected to the SMDII PCBA. JP1 has three (3) posts of which two (2) will be jumpered to indicate which set of drive numbers will be used on that SMDII PCBA. Selections are Drives 0-1 or Drives 2-3. Drives 0-1 ____ \ \ JP1 | | | \_\_____ Drives 2-3 The 75MB (T83) and 285MB (T303) are also supported as standalone removable disk drives. The T83 requires one 15amp (L5-15P) twist lock receptacle. The T303 requires one 220v straight blade (6- CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB093 Pg002 15P) receptacle. There is no support for the 14" fixed disk drives. 5.0 TAPE DRIVES The MTR, MTS, GCR and MTCS tape units are supported with the use of a BMTC controller. Dump-to-tape is not supported on the MPx 9xxx Series systems. 6.0 OPERATING SYSTEM The supported software for the MPx 9100 Series system is 9.5E or later. ORIGINATOR: D. Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB093 Pg003 FIB 00094 08/11/87 *** Configuration record compatibility and display information *** I. Configuration Record Compatibility The format of system configuration records is set up so that the following release levels are all mutually compatible (by line): #1: 8.2A, 8.2B, 8.2C, 8.4A #2: 8.4B, 8.4C, 8.4D, 8.4E #3: 8.5A, 8.5B, 8.5C, 8.5D, 8.5E #4: 8.6A The same logic applies to 9.x levels: #5: 9.5C, 9.5D, 9.5E #6: 9.6A A configuration record created for a certain release may be used with any other release on the same line. For example, a configuration record created for release 8.4C can be used on releases 8.4B, 8.4C, 8.4D, and 8.4E. II. Configuration Record Display The utility CONFIG.MGR, which replaces the INSTALL.CONFIG utility on release levels 9/8.5D and above, offers options to display ("D") and install ("I") configuration records. It should be noted that the display option will only display the contents of the configuration record file in the .SYSTEM.CONFIG. node. To view the configuration record that is actually installed, the install option must be selected. The install option displays the installed configuration record under the column heading "CURRENT" and the configuration record file under the column heading "NEW". ORIGINATOR: N. Prentiss CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB094 Pg001 FIB 00095 08/11/87 *** System halts, hangs, other intermittant problems *** SYMPTOM: System halts, hangs, other intermittant problems PROBLEM DETERMINATION: Empty backplane slots between ANY PCBAs. (With the exception of Memory PCBAs on 7XXX and 8XXX systems) FIX: Reposition all controller PCBAs so NO empty slots are between the controllers and other system PCBAs (excluding memory on 7XXX and 8XXX). See MPx Handbook FIB #6 for proper PCBA placement. ORIGINATOR: H. Mitchell CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB095 Pg001 FIB 00096 11/16/88 *** Caution for adding disk(s) to 7xxx systems *** SYMPTOM: Added disk power supply has no output. PROBLEM DETERMINATION: Check for missing sequence cable from LS700 power supply FIX: The first disk on a 7xxx system is supplied DC power from the LS700 power supply in the mainframe. All additional disk drives are supplied DC power from added power supply(s) P/N MM550140. Each added disk drive must have its own aditional power supply. In order for the new power supply to work, a sequence cable (907039-001) must be connected within the sequence loop originating at J10 of the LS700 power supply. ORIGINATOR: T. Morgan & S. Schwartz CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB096 Pg001 FIB 00097 08/31/87 *** System dumps with Four-tuples 1,0,X,5 or 1,0,X,6 *** See MPx Handbook, FIB #37 on this symptom. ORIGINATOR: H. Mitchell CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB097 Pg001 FIB 00098 09/22/87 *** Voltage Program Connector (110 or 220 Volts) for MM893000 UPPS *** The Unprotected Power Supply Assembly ( MM893000 - Sorbus Part # / 906419 B4 Part # ) is the only power supply for both domestic and international use. The only difference would be, what type of Voltage Program Connector is pluged into the power supply assembly. Following is a description and part number for both types of connectors that are used : 906624-001 (85/132 Volts AC) 906624-002 (170/264 Volts AC) Pin # To Pin # Pin # To Pin # 1 ------------- 12 1 ------------- 4 2 ------------- 4 3 ------------- 7 5 ------------- 8 6 ------------- 10 9 ------------- 11 ORIGINATOR: J. O'brien CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB098 Pg001 FIB 00099 10/12/87 *** Step-by-step 8xxx to 9xxx upgrade procedure *** The intent of this Field Bulletin is to outline the proper steps when converting the hardware of the MPx 8xxx Series System to the MPx 9xxx Series System. AT NO TIME SHOULD THESE PROCEDURES BE DEVIATED FROM. IT IS MEANT TO INSURE A SMOOTH UPGRADE AND TO PREVENT EXCESSIVE DOWNTIME TO THE CUSTOMER. AT NO TIME SHALL THE OS LEVEL, ADD-ON HARDWARE AND RECONFIGURATION OF SYSTEM MODEL TYPES BE UPGRADED CONCURRENTLY. When a system is being upgraded to a different model type, ie., MPx 8xxx to the MPx 9xxx, the goal is for only the CPU's and DMA's to be installed in the final stage. A Presite Survey must be done prior to any conversion to insure proper PCBA LARL's (Lowest Acceptable Revision Levels) (Reference MPx FIB #54 and MPx HANDBOOK FIB #7) NOTE: The term "Add-On Hardware" refers to hardware other than the MPx 9xxx CPU(s) and DMA(s) Upgrade Kit, such as; BMTC, Memory, ISDC's, Disk drives, etc. The term "Upgrade Kit" refers to the MPx 9xxx CPU(s) and DMA(s). If the OS level is being upgraded between major OS releases, ie., 8.4, 8.5 (including 8.4E), or 8/9.6, along with Add-On hardware and the Upgrade Kit, it should be installed, along with the new System Config- uration Record (SCR), prior to the addition of the Add-On hardware. There are a few cases where the Add-On hardware is dependent on the software such as the 8" 314MB disk drives. These drives require the 8.5C OS level. If the system is going to be upgraded to the MPx 9xxx system with the 9.6 OS level, the 8.6 OS must be installed on the existing system first and run for at least one (1) week. When Add-On hardware, is being added to the system, it will be installed to the existing system prior to installing the Upgrade Kit. When add-on equipment is ordered, two (2) new SCR sheets must be submitted, (SCR's are N/C with add-on hardware). This hardware is to be installed with the New SCR and run for at least one (1) week to insure correct hardware operation. When the system is ready to be converted from its existing MPx config- uration to the MPx 9xxx system, only two (2) to three (3) steps will be required. 1. Put down on disk the MPx 9xxx OS/WCS images from the 9.6 OS tape while the system is still an MPx 8xxx system. Update the OS/WCS slot Zero using the MPx 9xxx images. (Refer to the 8/9.6 Software Announcement #148) This will provide a bootable MPx 9xxx slot. An altload from the 9.6 OS tape will perform an update to the OS/WCS image with the MPx 9xxx CPU installed. The aforementioned update to the image is preferred. Always leave slot one with the MPx 8xxx OS/WCS image for at least one (1) week incase there is a need to go back to the 8xxx system. 2. Install the MPx 9xxx Upgrade Kit. 3. After running for at least one (1) week, install the remaining CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB099 Pg001 Add-On hardware. (Hardware that could not be installed on the MPx 8xxx system due to OS dependencies or maximum configuration limitations.) To follow these procedures may require five (5) different tapes to bring an MPx 8xxx system to the MPx 9xxx system. The set may contain: Two (2) SCR's; one for the existing system if there is any Add-On hardware and one for the MPx 9xxx system. Two OS tapes; one for the existing MPx system (8.6) and one for the MPx 9xxx system (9.6). Also, if ordered, the MAI Origin Data Decision Software (DDS). PRESITE SURVEY The first step is to do a presite survey. The survey should be done far enough in advance so things are in place prior to installing the Upgrade Kit. Refer to the "MPx Installation Planning Guide" M5146F, Field Bulletin #161B "Presite Survey for Conversion of MPx 8000 to MPx 9000 Series Systems". Other related Field Bulletins #216, #268, #303, and #303 Addendum will also help. The survey will accurately establish the current status of the system and determine what items are needed for the upgrade. A Field Service Engineer should participate in the site survey. HARDWARE UPGRADE STEPS When all the correct paper work has been done and the hardware starts coming in, the following steps will be taken to insure a smooth upgrade. 1. Upgrade the system PCBA's to current LARL for support of the add-on equipment and the MPx 9xxx Upgrade Kit. (Use the procedures that are in effect in your location) Insure that the PCBA's that will be carried over meet the MPx 9000 LARL. The other PCBA's need to meet the requirements for the add-on equipment (the P314MB 8" drives require revision "AA" ACS PCBA's even though the ACS PCBA's will not go to the MPx 9000 system) and also the OS level (8.6). If any PCBA's are going to be replaced, ie., 1-16way for 2-8ways, have them installed too. We do not want to replace everything at once along with the add-on equipment. These changes can and should be done as soon as possible. Remember, the Add-On hardware WILL be installed on the existing MPx system (except for the Upgrade Kit) and tested if possible. 2. After the ordered software arrives, install the new OS and SCR. Go through the normal file conversion process if applicable and let the customer run for at least one (1) week on the new OS level. Do not upgrade the software and hardware at the same time. 3. After the customer has run without any software problems, install the supported Add-On hardware. There may be instances that the existing MPx system model will not support all the Add-On hardware. For example, the MPx 8010 system will only support up to 4MB of main memory and the MPx 9530 will support up to 12MB of main menory. Other differences will be the number of terminals and disk support. The voltages in each frame must be checked prior to installing the MPx 9000 Upgrade Kit. Refer to Field Bulletin #303 and #303 Addendum. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB099 Pg002 If due to the limitations of the existing system, all the Add-On hardware (excluding the Upgrade Kit) cannot be installed, check for duplicate PCBA's. The new PCBA's can be rotated in for the original one(s) that have already been tested. Example: replace four (4) 1MB memory PCBA's with one (1) 4MB memory PCBA. Take out existing 16-way PCBA and install new 16-way PCBA. 4. After the system has run in this configuration for at least one (1) week, install the MPx 9xxx Upgrade Kit. Again, wait at least one (1) week before installing any remaining hardware. 5. Install remaining Add-On hardware that could not be installed in step 3 due to system limitations. REMEMBER: Dump-to-Tape is not supported on the MPx 9xxx Series Systems. Insure that the Dump Area on disk is the correct size. Update the "CAUTION" label on the ACDU's of the system. Two boxes [] on the label are provided to indicate the number of AC power cards that need to be disconnected before servicing to avoid shock. ORIGINATOR: D. Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB099 Pg003 FIB 00100 10/12/87 *** IMLC set-up information *** IMLC vs MPx 9xxx System: There have been a few instances when an MPx 8xxx system has been upgraded to an MPx 9xxx system and the IMLC is no longer recognized. The RED LED (Parity Error) on the IMLC PCBA comes during load. If the same IMLC is put back into an MPx 8xxx system it passes DEMON and is recognized on-line. This may happen with the old style IMLC (P/N 903381) or the current IMLC (PN 903534) PCBA. ECN #12231 has been released to install a push-on jumper to the "JMP C" pins. "JMP C" is the endless selftest strap. The IMLC memory is initialized by the memory test when the system is loaded clearing any unknown condition. Leaving this jumper in does not affect on-line operation. The location of "JMP C" is: 903381 = 8C / 903534 = 4N If the self-test jumper does not resolve the IMLC problem, check for proper MPx 9xxx switch settings and that proper physical board locations are correct. IMLC vs TYPE II/III LOAD When the "JMP C" option is used on the MPx 9xxx system and "T0" is a serial terminal, the system will hang in TYPE II/III load. If "T0" is a Hi-Speed terminal (HVDT) this problem will not happen. The problem only occurs with the 9.6A OS level and will be fixed in the released version of 9.6B. IMLC vs MPx 8xxx System The IMLC in an MPx 7xxx/8xxx system will not go on-line if "JMP C" is in. "JMP C" is to be used in the MPx 9xxx series systems only. Prior to installing the PCBA into the MPx 7xxx/8xxx system, insure that the jumper in the "JMP C" location is off-set (on only one pin) so no connection is made. (This way the jumper will always be with the PCBA if its to be installed into the MPx 9xxx system). IMLC vs OS FILES If the IMLC PCBA does not display in DEVICES and the GREEN LED is ON, insure that all of the IMLC files are on disk. The practice to use the node ".R----." in SAVERESTORE, then abort the restore when the first file did not match the mask entries should not be used. Other system files that reside futher down on the tape are not restored and can result in the IMLC does not displaying in DEVICES. When the IMLC is added to the system or if a new Comm/DWII feature is configured in the TERM.CONFIG file (eg., X.25), the IMLC will not go on-line if the supported files of that option are not on disk at the next system load. This is because the system is looking for certain files to download into the IMLC. For example; if a port on the IMLC is not configured, the system looks for the files ".R----.SYS.NOA or .R----SYS.NOB" depending on the port. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB100 Pg001 These files are used when there is no A (NOA) or no B (NOB) port configured. If the file is not there, the IMLC will not display in DEVICES. Other files that may be required are ICMOS, TBCA, TBCB, WPAPA, etc. depending on the port configuration. ORIGINATOR: D. Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB100 Pg002 FIB 00101 11/30/87 *** 9xxx system getting FD20 or F4xx error during boot *** A selftest error of "FD20" may occur at load after installing an IDC64 PCBA (-001 or -002). If this problem occurs check the AMS PCBA. With the -001 AMS PCBA the IDC64 PCBA must have the "E6 to E7" jumper IN near location "2-R". If the system has the -002 AMS PCBA this problem should not occur with the jumper IN or OUT provided that the requirements for greater than 12MB of main memory is met (ie., proper revision levels, switch setings, oprating system, etc.) If the system is not configured to support greater than 12MB of main memory the jumper should be IN regardless if the AMS PCBA is a -001 or -002. The IDC64 PCBA has the option of supporting up to or greater than 12MB of main memory. The option (along with other hardware/software dependencies) is selectable by jumpering of E6 and E7 on the IDC64 PCBA. See MPx Handbook for IDC64 jumpering. ORIGINATOR: D. Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB101 Pg001 FIB 00102 10/30/87 *** Requirements for support of greater than 12 MB main memory (9xxx) *** The following hardware must be at or above the listed revision levels. o MCS PCBA 903374-001 revision "T" or later. (Note 1) o MCS PCBA 903374-002 is revision "V" or later. (Note 1) o AMS PCBA 903548-001 DOES NOT SUPPORT greater than 12MB of main memory! o AMS PCBA 903548-002 is revision "N" or later. o ESTK PCBA 903552 revision "J" or later. o IDC64 PCBA 903597-001, -002 revision "E" or later. (Note 2) o DMA I PCBA 903554 revision "G" or later. o Memory PCBA 903516-001 (2MB), -002 (4MB) revision "J" or later. (Note 3) Note 1 - Set switch SW1-4 to CLOSED for MPx 9xxx addressing scheme. Note 2 - Strap E6 to E7 OUT. Note 3 - All memories must have JP5 at location 1E = 1 to 2 and IC Pad location 1A = 8 to 9. 1MB versions and the 903349 memory PCBA are not to be used. Addressing boundries of 12MB to 16MB, 28MB to 32MB, 44MB to 48MB and 60MB and above are not to be used. Higher density memories will be addressed first down to the lesser density PCBA's. The required OS level for greater than 12MB of main memory is 9.6A and above. Also note that this FIB does not include the requirements for support of the 16 meg memory PCB (also available in 1/4 & 1/2 populated versions), for the requirements for supporting the 16 meg memory PCB refer to FIB 105. ORIGINATOR: D. Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB102 Pg001 FIB 00103 10/30/87 *** Caution for creating system dump tapes on the GCR tape drive *** Please make sure the BPI is set at 1600 when using the GCR tape drive, Model 4405, to back-up dumps and send to Product Support for analysis. If the BPI is set at 6250 the tape cannot be read on other tape drives. ORIGINATOR: M. Bell CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB103 Pg001 FIB 00104 10/30/87 *** Information for sending dump tapes to Basic Four *** To provide the turnaround our customers require and to provide MBF with the information to return the dump analysis results to the proper systems person, please include a sheet with the tape which contains the following information: A. What processes were running on the system when it crashed or dumped? 1. type of programs running 2. number of users on the system 3. was a print job(s) running B. Did the system crash or was the dump forced. 1. if forced, why? a. system slow b. one terminal hung - if so, which one c. some terminals hung - if so which ones d. all terminals hung 2. if not forced (crash), then write down all information from the terminal screen. C. Type and release of Operating System (i.e., BOSS/VS, boss/ix, Lbossix, Bbossix, etc., 8.5B*20, 9.6C*12, 7.1A, 7.1B, 7.2A, 7.2B, etc.) D. Person to contact with dump analysis results. This must be a BASIC FOUR systems person - NOT the customer. To enable us to track and return the customer's tape,please put a label on the. dump tape that includes the following informtion: A. Customer's Name B. System person contact C. Address to send the dump tape back to Send dump tapes to: MAI Basic Four, Inc. 14101 Myford Road Tustin, CA 92680 Attn: Marisa Bell Maildrop 267 Please send dumps ONLY to the address above. Do not send directly to the analyst you've been working with, but please include the Worldwide Product Support analyst name in a note with the other information you are sending. Send- ing a dump to an analyst can cause needless delays in getting the dump results back. ORIGINATOR: W. MOORE CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB104 Pg001 FIB 00105 08/31/88 *** Requirements for support of 16 meg memory PCB P/N 903261 *** To achieve higher memory capacities and reduce the number of card slots needed,. the 16MB PCBA P/N 903621-001 has been released. This PCBA will ONLY be supported on MPx 9xxx Series Systems. It will be depopulated to lesser memory densities of 8 MB (-003) and 4 MB (-004) capacities. To support the memory refresh requirements of the 16MB PCBA on the MPx 9xxx system, other PCBA's must be updated. New part numbers are assigned to the MCS PCBA and the Terminator PCBA which provide these requirements. WAS IS MCS PCBA P/N 903374-001 903374-002 (rev. V) TERMINATOR PCBA P/N 903199-001 903199-004 (rev. H) The updated assemblies are backward compatible across the MPx product line, with all memory module assemblies, and are being shipped in the current MPx system builds. It is suggested that all MCS and Terminator PCBA's be upgraded to these new levels for ease of stocking. Refer to ECN's 12123A and 12124A. PRESITE SURVEY: Perform a Presite Survey to insure correct hardware/software levels needed for the support of the 16MB PCBA. These requirements are as follows: For Greater Than 12MB Main Memory: o OS level of 9.6A or later. o MCS PCBA 903374-002 is revision "V" or later. o AMS PCBA 903548-002 is revision "N" or later. (AMS PCBA 903548-001 DOES NOT support main memory greater than 12 MB) o ESTK PCBA 903552 revision "J" or later. o IDC64 PCBA 903597-001,-002 revision "E" or later. o DMA I PCBA 903554 revision "G" or later. o Memory PCBA 903516 revision "J" or later. o Extender/Terminator PCBA 903199-004 is revision "H" or later. NOTE: With this configuration NO Old Style 1MB PCBA's P/N 903349 can be used in the system. Set the MCS PCBA to the MPx 9xxx addressing scheme (SW1-4 = closed). For 12MB or Less of Main Memory: (using 4MB/8MB depopulated versions) o OS level of 9.5 or later. o MCS PCBA 903374-002 revision "V" or later. o Extender/Terminator PCBA 903199-004 revision "H" or later. The highest density memory PCBA will be the first memory located to the right of the last DMA and it will have the starting address of Zero. Less density memory PCBA's will follow down to the lowest density PCBA's. Different memory size capacities are achieved by selectively populating four banks of 4MB each. Each bank will have a switch selectable starting location. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB105 Pg001 Jumpers: Address lines 22 and 23 may be used or ignored according to the settings of the configuration jumpers JMP1 and JMP2. Location of the JMP1 and JMP2 is "7D". For greater than 12MB main memory support JMP1 will be jumped to pins 1 and 2; JMP2 will be jumped to pins 1 and 2 and address lines 22 and 23 will be used. For 12MB or less of main memory JMP1 will be jumped to pins 2 and 3; JMP2 will be jumped to pins 2 and 3 and address lines 22 and 23 will be ignored. NOTE: Pin 1 is identified by a square pad on the solder side of the PCBA toward the edge connector. Switches: Starting Memory Address Switches "S2" and "S3" determine the starting location of each bank on the PCBA and whether or not the bank is enabled (locations "11D" and "11E"). Each 4MB bank MUST have its own starting address location. (Think of the 16MB PCBA as if it were four (4) separate 4MB PCBA's) USE THIS ADRESS CHART IF JP 1 & 2 SET FOR GREATER THAN 12 MEG BANK 3 S2-1 S2-2 S2-3 S2-4 S2-5 BANK BANK 2 S2-6 S2-7 S2-8 S2-9 S2-10 STARTING BANK 1 S3-1 S3-2 S3-3 S3-4 S3-5 ADDRESS BANK 0 S3-6 S3-7 S3-8 S3-9 S3-10 (MBYTES) 0 = Closed/On 1 1 1 1 0 0 1 = Open/Off 0 1 1 1 0 4 1 0 1 1 0 8 -----------DO NOT USE--------------12 * 1 1 0 1 0 16 0 1 0 1 0 20 1 0 0 1 0 24 -----------DO NOT USE--------------28 * 1 1 1 0 0 32 0 1 1 0 0 36 1 0 1 0 0 40 -----------DO NOT USE--------------44 * 1 1 0 0 0 48 0 1 0 0 0 52 1 0 0 0 0 56 -----------DO NOT USE--------------60 * X X X X 1 DESELECT ** USE THIS ADDRESS CHART IF JP 1 & 2 SET FOR EQUAL TO OR LESS THAN 12 MEG MEMORY BANK | ADDRESS SWITCH NO. - POSITION | MEMORY | | BANK BANK 0 | S3-6 | S3-7 | S3-8 | S3-9 | S3-10 | STARTING BANK 1 | S3-1 | S3-2 | S3-3 | S3-4 | S3-5 | ADDRESS BANK 2 | S2-6 | S2-7 | S2-8 | S2-9 | S2-10 | IN BANK 3 | S2-1 | S2-2 | S2-3 | S2-4 | S2-5 | MEGABYTES ________________|______|______|______|______|_______|__________ | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 4 | 1 | 0 | 0 | 0 | 0 | 8 | X | X | X | X | O | DESELECT THIS BANK |___________________________________| CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB105 Pg002 * NOTE: Do not use memory starting locations designated by an asterisk (*). Overlapping of shared memory controllers will occur and cause improper system operation. ** NOTE: DESELECT setting is used to disable a 4MB bank of memory on the PCBA, ie., BANK 0, BANK 1, etc. EXAMPLE: If a bank of memory should have errors, DESELECT the bank in question until the PCBA can be replaced. Data Display/Memory Cycle Switch "S4" (location "2GG") selects Y-Bus display and Cycle Length/Cycle Select signals internal to the PCBA. SWITCH POSITION 4 3 2 1 FUNCTION * X X 0 - Display Syndrome Bit Data (Y-Bus) X X 1 - Display Parity Error Data (Y-Bus Not supported for future use) X X - 0 System Selects Memory Cycle (Not supported for future use) * X X - 1 Three Microcycle Memory Cycle * NOTE: Normal setting. OPERATIONAL CHECKS: The following checks should be done to verify proper installation and configuration of the 16MB PCBA. 1) Load the operating system and verify that the Load Screen displays the correct amount of memory. DEVICES too should display the correct amount of. memory. BOOTSTRAP ERROR "F4xx" indicates that a requirement for greater than 12MB main memory has not been met. Re-check LARL's, switch settings, old style memories, etc. 2) Run NEWX to display the main memory bit map. Verify that each 4MB bank of 10 24K segments are mapped contiguously (1's are side-by-side) without any gaps (0's) between. The "DO NOT USE" starting addresses will indicate a 4MB bank of 0's. Using one 16MB PCBA will indicate three (3) 4MB banks of 1's, one (1) 4MB bank of 0's, then one (1) 4MB bank of 1's. 3) Run REMIDI to exercise the memory for any failures. REMIDI will display contiguous 1's without the bank of 0's that are not used. ORIGINATOR: Don Luque Norm Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB105 Pg003 FIB 00106 12/02/87 *** Dumps 2,10,1,65 & 2,10,1,25 due to AMS, REMIDI revised to catch *** System dumps 2,10,1,65 and 2,10,1,25 (both indicate "Instruction Fault in Kernel Module") may be caused by erratic IC's on the AMS PCBA. National IC's (29705) used on the AMS PCBA may cause the system to dump. To catch this possible problem, the 9.6C OS release of REMIDI has been enhanced to test for this failure. The failure is detected mainly in the High-Margin voltage setting during the CPU test. Error codes of "3601" through "3609" are . an indication of this failure. The current releases of REMIDI, 9.6B and below, will not find this problem. A patch tape with the 9.6C version is being sent to all RTM's Branches, Subsidiaries and Sorbus West. A copy of this patch tape will be supplied upon request. This level of REMIDI will install and run on OS levels from 9.5 to the current release. To install REMIDI, use the UPDATE.WCS procedures as before. (Refer to MPx Software Announcements for UPDATE.WCS procedures). After the update, OSINFO screen will display the REMIDI WCS LEVEL as "A 6.3.1" in slot 2 and "A 6.3.2" in slot 3. To obtain the REMIDI listing for this release, submit the DOC.REMIDIA file to a printer. This file is also on the patch tape. The error of "BAOF", in the controller tests, indicates that there are no DMA II PCBA's in the system. (The DOC.REMIDIA listing has "BACF", it should be "BAOF"). Refer to Field Bulletin #303 for other error codes that indicate that. a PCBA controller was not found. The REMIDI listing will also give the meanings of the codes displayed. ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB106 Pg001 FIB 00107 12/11/87 *** 8/9.6 system dump problem due to operator changing prefix *** SYMPTOM: If the user's prefix is exactly the same as the System Prefix when the prefix command is entered from a ! prompt, the System Prefix will be tacked onto the end of the user's prefix list. EXAMPLE: The System Prefix is (DISK).R6A49.SYS.,.R6A49.INST. my personal prefix is (DISK).R6A49.SYS.,.R6A49.INST.,.PEPPER. when I enter !PREFIX this is what is displayed: (DISK).R6A49.SYS.,.R6A49.INST.,.PEPPER.,(DISK).R6A49.SYS.,.R6A49.INST. If you do a 'PPUSH' or a 'PPOP' the System Prefix will get tacked on the end of the user prefix list again until the prefix list exceeds 256 characters. When this occurs the system will dump or if you try to log off and your prefix is very close to 256 characters the system will dump. FIX: If you want the System Prefix in your prefix list, swap the SYS and INST. EXAMPLE: The System Prefix is (DISK).R6A49.SYS.,.R6A49.INST. your prefix should be (DISK).R6A49.INST.,.R6A49.SYS. ORIGINATOR: Michael C. Pepper CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB107 Pg001 FIB 00108 12/11/87 *** 8/9.6 operating system problem running NEWX *** SYMPTOM: When running maximum cylinder seeks in newx the drive becomes I/O bound, the terminal running NEWX becomes hung and cannot be released, and the system can dump depending if other users are using the hung disk. EXAMPLE: The user enters NEWX into the disk portion, 'Z' is entered to clear all the selections, '2' is entered to select 'SEEK', where it says 'ALTERNATE'.Enter the highest cylinder number to do seeks between 0 and the highest cylinder, enter 'E' to change the continous loop question to 'Y', enter 'CR', and 'R' to . run. After approx. 150 seeks the drive will stop seeking, the terminal will be hung, and if other tasks are running on the drive the system may dump. I've proved this failure on both 8000's and 9000's with both T-83's and T-303'S running on 8/9.6, the failure didn't occur on a 9520 running under 8.5D. I would imagine the failure would happen on all drives but I've only tested it on Tridents. The failure doesn't occur running DEMON. FIX: Unknown ORIGINATOR: Michael C. Pepper CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB108 Pg001 FIB 00109 03/23/88 *** Problem with DEMON on 9.6B O.S. *** SYMPTOM: When running ISDC tests on any 16 way, DEMON will report DATA MISCOMPARES during "shared memory " test. This same test runs OK for 4 way and 8 ways. FIX: This is a known and duplicated problem on DEMON level 06.01.39.011. engineering says they have it corrected on 9.6C O.S. (which has not been released as of this date. DEMON that is carried on 9.5x O.S. will work OK. ORIGINATOR: John Tank CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB109 Pg001 FIB 00110 03/24/88 *** Method to prevent VDT's from logging on *** Releases 9.6x OS have the ability to prevent VDT's from logging on when the system is booted under a TYPE 1 load. By entering !GROUPS, a menu will display which will allow you to disable "TERMINALS". The following rules will pertain: 1. Those VDT's already logged on can still process until they log off. 2. If you release yourself before going back into the "GROUPS" menu to enable "TERMINALS", you are also locked out & must reboot the system.. ORIGINATOR: John Tank CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB110 Pg001 FIB 00111 03/28/88 *** ERROR 2 file full problems [ WPSF 431 ] *** During a recent USERS GROUP meeting the following suggestions were made: QUESTIONS & SUGGESTIONS 1. Many times files get full without anyone realizing it until an error 2 condition is reach. Can a utility be written where an operator is able to input a percent and the system will search for all files that are over that percent and print them out? 2. If during processing an error 2 is about to happen, can a utility somehow flag this and let the operator know that they can not add more records to that file? ANSWERS 1. There is no utility to do this but the following BASIC programs will do this for you. There are two examples for doing this. o Using FID (all BOSS/VS levels) o Using ATTR (8/9.6 and up) First create a FILELIST using the utility !DIR with no attributes and data only. A. PROGRAM TO FIND PERCENT FULL USING FID. 10 BEGIN 20 PRINT 'CS' 30 REM "ENTER PERCENT WITH DECIMAL POINT EG: .50" 40 INPUT "PERCENT ",D 50 REM "CREATE FILELIST USING !DIR WITH NO ATTRIBUTES AND DATA ONLY" 60 OPEN(1)"filelist" 70 READ(1,END=9999)A$ 80 OPEN(2)A$ 90 B$=FID(2) 100 REM "LOOK FOR INDEXED OR DIRECT FILES" 110 IF DEC(B$(10,1))=2 OR DEC(B$(10,1))=0 GOTO 120 ELSE CLOSE(2);GOTO 70 120 A=DEC (B$(25,4)),B=DEC(B$(12,3)) 130 REM "A=RECORDS USED,B=RECORDS DEFINED" 140 IF A/B => D PRINT A$ 150 CLOSE(2);GOTO 70 9999 END B. PROGRAM TO FIND PERCENT FULL USING ATTR. 10 BEGIN 20 PRINT 'CS' 30 REM "ENTER PERCENT WITH DECIMAL POINT EG: .50" 40 INPUT "ENTER PERCENT ",D 50 REM "FILELIST CREATE BY !DIR WITH NO ATTRIBUTES AND DATA ONLY" 60 OPEN(1)"filelist" CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB111 Pg001 65 READ(1,END=9999)A$ 70 OPEN(2) A$ 80 B1$=ATTR(2,"ORGANIZATION") 90 REM "LOOK FOR ONLY INDEXED AND DIRECT FILES" 100 IF B1$="DIR" OR B1$="IND" GOTO 110 ELSE CLOSE(2);GOTO 65 110 B$=ATTR(2,"RECORDS_USED");C1$=ATTR(2,"RECORDS_ALLOWED") 120 A=NUM(B$),B=NUM(C1$) 130 REM "A=RECORDS USED,B=RECORDS DEFINED" 140 IF A/B => D PRINT A$ 150 GOTO 65 9999 END NOTES: A. For more information on how to use FID refer to the BB86 reference manual (M6262A) pages 10-16, 10-17. B. For more information on how to use ATTR refer to the BB86 reference manual (M6262A) pages 5-7 to 5-10. C. This example will only work for indexed and direct files, for any other files please see note A and B. 2. How to prevent an ERROR 2 during process? In your applications you will have to use the FID or ATTR to find out how many records are left in the file. (see examples above) We apreciate the suggestions from this USERS GROUP and if your next USERS GROUP has any questions or suggestions please let us know. ORIGINATOR: Joe Melendez CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB111 Pg002 FIB 00112 03/28/88 *** Updated rule of thumb for memory sizing [ WPSF 433 ] *** The rule of thumb formula for memory sizing on the MPx series systems now includes an additional rule for more optimum system performance. The MPx rule of thumb for memory sizing has not changed. It is not dependent upon any version of BOSS/VS, but rather, the site's system load. MINIMUM: 750K OS plus 100K per task for the first 20 tasks and 70K per task above 20 plus 1MB additional for MAGNET. This is a minimum baseline rule of thumb that ensures the system will run. For most sites, this has proven to be sufficient, but depending on the application, the performance may or may not be acceptable to the user. If system performance is an issue, the performance monitor tools should be run to determine if lack of memory, CPU power or disk I/O is the problem. If the system is found to need additional memory, this is empirical evidence that the site's particular load or the specific application being run requires more than the minimum amount for optimal performance. In these cases, a general rule of thumb for memory sizing would be: OPTIMUM: 2MB for the OS plus 100K per task for the first 20 tasks and 70K per task above 20 plus 1MB additional for MAGNET. This formula estimates the additional amount of memory which may be allocated for workspace segments for the system basis and for general system buffers. This formula is based on field information collected from sites that were experiencing performance problems. ORIGINATOR: Dale Jensen CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB112 Pg001 FIB 00113 03/28/88 *** ACS problem may cause Hangs/Dumps or load failure [ WPSF 438 ] *** The ACS PCBA, P/N 903379-001/-002/-003, used in the MPx 7xxx/8xxx series systems, has a part change. The part affected is MBF P/N 161008-002, IC 2901 4-bit CPU manufactured by National Semiconductor, IC Date Code '8712' or '8636'. (The date code numbers are on the IC). These IC's are located at positions 7U, 7W, 7X and 7Z. National Semiconductor is no longer a qualified source for this part. Parts must be replaced with AMD (or National with date codes other than '8712' or 8636' for National IC's still in stock, but Do Not buy more). Problems that can occur are System Hangs, System Dumps, or System not loading. Do Not replace the IC's on a running system but check stocks and systems that are experiencing these problems. (Low voltage margins may help aggravate these failures). MBF locations that have these IC's can have them replaced through your normal procedures. While checking stock PCBA's (spares), also take time to check the MDI PCBA, PN 903361-001 / 903408-001, for IC's at location "3N" (PN 163000-001) and "4N" (PN 163001-001) for the letters 'PDS'. The letters 'PDS' on these IC's indicate the approved IC for these locations. IC's in these locations without 'PDS' can cause the system to dump with "Invalid Operation" four-tuples. Refer to Field Bulletin #37A. ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB113 Pg001 FIB 00114 04/20/89 *** MPx 9400/9600 Systems Hardware Announcement [ WPSH 19 ] *** The MPx 9400/9600 systems utilize the Low-Boy cabinet, same as the MPx 7100 and MPx 9100 systems. Both models will include a minimum of 4MB main memory and 4 serial I/O ports. The MPx 9400 system consists of 1 to 2 CPU's without cache (MPx 9410 and MPx 9420) and a 5-1/4" 250MB fixed disk with the DMA-II controller. Other drive types may be used via the optional DMA-I controller but the system will always contain a DMA-II controller with the SCSI 5-1/4" disk as drive 0. The tape unit will be the new SCSI 1/4" MTCS via the existing DMA-II controller. You can optionally add a BMTC controller to support the GCR or MTS tape unit. The MPx 9600 system consists of 1 to 3 CPU's with cache (MPx 9610, MPx 9620 and MPx 9630) and an 8" 314MB fixed disk with the DMA-I controller. A BMTC controller will be included in the base system for support of the GCR or MTCS tape unit. Copyright 1988 MAI Basic Four, Inc. All rights reserved TABLE OF CONTENTS 1.0 DMA-II PCBA 1.1 PRINTER DEVICE ADDRESS SETTINGS 1.2 DISK DRIVE 1.2.1 5 1/4" SCSI DRIVE ADDRESS SETTINGS 1.3 TAPE DRIVES 1.3.1 SCSI 1/4" TAPE ADDRESSING 2.0 OPERATING SYSTEM 3.0 SYSTEM INSTALLATION 3.1 SPECIFICATIONS 3.1.1 PHYSICAL 3.1.2 ELECTRICAL 3.1.3 ENVIRONMENTAL 4.0 SPARING 1.0 DMA-II PCBA The DMA-II PCBA will support: o Four SCSI (Small Computer System Interface) 250MB disk drives. o One SCSI 120MB 1/4" tape cartridge unit (MTCS). o Two standard MBF parallel printers. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB114 Pg001 The DMA-I MUST be at revision "P" or later to reside in the same system with a DMA-II. The DMA-II SCSI Controller PCBA has four LED's, one pushbutton switch, one 8-position DIP switch, one 9-Position DIP switch, one jumper, one 50-pin cable connector, and two 26-pin cable connectors. o LED DS1 - A Red LED, when ON, indicates that the DMA-II detected a parity error while accessing main memory. o LED DS2 - A Yellow LED, when ON, indicates a main memory timeout error, memory did not respond or the DMA-II accessed a nonexistent location. o LED DS3 - A Green LED, when ON, indicates that the DMA-II has sucessfully passed its self-test after a system reset. Failure of this LED to turn on may indicate that the controller should be replaced. o LED DS4 - A Red LED, when ON, indicates a memory address or controller parity error (for future use). o Switch SW1 - A pushbutton switch, which resets LED's DS1, DS2, and DS4. o DIP Switch SW3 - An 8-position DIP switch used for diagnostics. On-line setting is all positions OPEN. o DIP Switch SW4 - A 9-position DIP switch that selects the printer device for PRINTER 0 (J6) and PRINTER 1 (J7) relative to the PCBA. 1.1 PRINTER DEVICE ADDRESS SETTINGS - SW4 ______________________________________________________________________________. |. | | CLOCK PRINTER 0 / PRINTER 1 | | 9 8 7 6 5 4 3 2 1 | | PRINTER VARIANTS ------------------------------- | | Model 4201 Matrix - 0 1 1 1 0 1 1 1 0=ON/CLOSED | | Model 4209/4220/4221 Band - 1 1 1 0 1 1 1 0 1=OFF/OPEN | | Model 4214 Matrix (MVP/DMP) - 0 1 0 1 0 1 0 1 | | Undefined - 1 1 0 0 1 1 0 0 | | 6.25 MHz Diagnostic Clock 1 | | 8.0 MHz On-line Clock 0 (normal setting) | | (SW4-8 / SW4-4 = strobe) | |______________________________________________________________________________ 1.1 (Cont.) o Jumper JMP1 - A 3-pin jumper connector. Pins 3 and 2 are jumpered for use on MPx AND ADVANCED SERIES systems. If jumper is missing it will default to the correct mode. ************ DO NOT JUMPER 1 AND 2 ****** YOU WILL GET RED LEDS OR BOOTSTRAP ERROR F017. o Connector J5 - A 50-pin SCSI Bus cable connector. The SCSI disks and SCSI tape unit are attached via this connector. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB114 Pg002 o Connectors J6 and J7 - Two 26-pin cable connectors for MBF parallel printers (non-SCSI). NOTE: There are no DMA-II switch settings for selection of SCSI device type or variants. Instead, the DMA-II interrogates the SCSI device at power up and creates a device type and variants table in RAM. Also, there are no switch settings for the DMA-II board address. (The printer ports are not SCSI, hence the need to set the device type) 2.2 DISK DRIVES A new embedded SCSI 5-1/4" Winchester disk is standard with all MPx 9400 systems. The capacity of this disk is 280MB unformatted and approximately 250MB formatted. This disk drive requires the DMA II (SCSI) controller for support. The average access time for this drive is 28 milliseconds and the transfer rate is 1.5MB/second. NOTE: Only the MBF marketed SCSI disk drives meet the specifications required for system operation. Other SCSI drive types will render the system inoperative. 1.2.1 5-1/4" SCSI DRIVE ADDRESS SETTING _____________________________________________________________________ | | | JUMPERS JP85 JP84 JP83 BINARY VALUE DEVICE ADDRESS | | | | IN IN IN 1 1 1 07 * | | IN IN OUT 1 1 0 06 | | IN OUT IN 1 0 1 05 | | IN OUT OUT 1 0 0 04 (D3) | | OUT IN IN 0 1 1 03 (D2) | | OUT IN OUT 0 1 0 02 (D1) | | OUT OUT IN 0 0 1 01 (D0) | | OUT OUT OUT 0 0 0 00 ** | |_____________________________________________________________________| * Device Address 07 is the SCSI ID of the DMA-II Controller, Do Not Use. ** Device Address 00 is the SCSI ID of the 1/4" MTCS tape unit. NOTE: Duplicate Device Addresses will allow neither device to go on-line. 1.2.1 (Cont.) The P314, 8" 300MB disk drive, used on current MPx systems will be supported via the DMA I PCBA used in the MPx 9xxx series systems. Both the DMA I (must be revision "P" or later) and DMA II PCBA may reside in the same system. Up to eight drives total are available on the MPx 9400 system and up to 12 on the MPx 9600 system. Formatting of the SCSI disk drives will be done with the DIVE program as before. The inputs to the DIVE program for the SCSI drives are different from the traditional drive types. Instead of the Head/ Cylinder/Sector nomenclature used on the traditional CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB114 Pg003 drives, a Cylinder/Head/Byte From Index term is used. There are two modes of format for the SCSI drives, Standard and Non-Standard. The Standard format option should always be used. 1.3 TAPE DRIVES The existing 120MB 1/4" MTCS, (used on the MPx 7100 system and as external MTCS units) also comes with the embedded SCSI interface. The embedded SCSI interface 1/4" MTCS known as the "Half Height" is standard on the MPx 9400 system and is not available with the MPx 9600 system. The current external MTCS can be used with the MPx 9600 system via the BMTC PCBA. The tape cartridge (600A) used in this tape unit is the same used for the 120MB MTCS unit in the MPx 7100 system. 1.3.1 SCSI 1/4" TAPE ADDRESSING ___________________________________________________________________ | | | ------------------------------- | | JUMPERS ---> | | | | | | | | | | | (Located next to J1) ---------------+---+---+---+--- | | | | | ---SEL 0 | | PARITY --- | ---SEL 1 | | ---SEL 2 | | | | SEL 2 1 0 || SEL 2 1 0 | | * TAPE 0 OUT OUT OUT || TAPE 4 IN OUT OUT | | TAPE 1 OUT OUT IN || TAPE 5 IN OUT IN | | TAPE 2 OUT IN OUT || TAPE 6 IN IN OUT | | TAPE 3 OUT IN IN || TAPE 7 IN IN IN ** | | | | PARITY = IN (Normal setting) | |___________________________________________________________________| * Device Address 00 is the SCSI ID of the 1/4" MTCS tape unit. ** Device Address 07 is the SCSI ID of the DMA-II Controller, Do Not Use. 2.0 OPERATING SYSTEM The supported OS level is 9.6C or later. This OS level is mandatory for the support of the DMA II PCBA. The MPx 9400 system requires new filenames for the tape load images; the file names for other images not required for tape loading will have the same prefix as before. The new tape load images are identified by "AC" as follows: INST.OSN.ACnnnnnnnnn (Required as first file to make a bootable OS tape) INST.OS3.ACnnnnnnnnn (Required as first file to make a bootable DEMON tape) INST.REMIDI.ACAnnnnnn (Each image required as first file on .ACBnnnnnn tape to make that module bootable, each .ACCnnnnnn image requires a different tape) .ACDnnnnnn Due to the different disk partitioning of the WCS and OS image area in the 9.6C OS, earlier levels of WCS and OS cannot reside on the same disk. Earlier levels of WCS and OS images cannot be installed on these systems. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB114 Pg004 3.0 SYSTEM INSTALLATION The MPx 9400/9600 system requirements are the same as the MPx product line. Refer to the MPx Installation Planning Guide M5146F. The CCA will require one 20 amp L5-20P twist lock for the mainframe. One L5-15P twist lock for the disk frame ACDU will be required for the MPx 96xx system CCA or if 2 or more SCSI 5-1/4" fixed disk drives are installed in the MPx 94xx system CCA. Up to 4 SCSI 5-1/4" disk drives can reside in the CCA. The first 5-1/4" SCSI disk drive and the SCSI 1/4" MTCS tape unit will be powered from the LS-700 power supply as in the MPx 7xxx series systems. As with the other MPx 9xxx systems, when main AC power is applied, each CPU(s) that is enabled issues the following message: "BOOTSTRAP ERROR CPU x FOFF". Where "x" is the CPU number checking in. 3.1 SPECIFICATIONS Specifications for the MPx 9400/9600 Series are listed. 3.1.1 PHYSICAL Primary Mainframe Module (4113/4116) Height: 29.5 inches (75 cm) Width: 25.2 inches (64 cm) Depth: 32.6 inches (83 cm) Weight: TBD Secondary Mainframe Module (9415) Height: 29.5 inches (75 cm) Width: 12.6 inches (32 cm) Depth: 32.6 inches (83 cm) Weight: TBD Fixed Disk Module (4511/4513) Height: 29.5 inches (75 cm) Width: 12.6 inches (32 cm) Depth: 32.6 inches (83 cm) Weight: TBD 3.1.2 ELECTRICAL Primary Mainframe Module (4113/4116) Voltages: 100 VAC @ 50/60Hz 120 VAC @ 60Hz 220 VAC @ 50/60Hz 230/240 VAC @ 50/60Hz Currents, ACDU: 16.0A @ 100/120 VAC 8.0A @ 220-240 VAC 2.0 KVA CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB114 Pg005 Currents, Disk ACDU (w/two 5-14 or 8-inch disks): 6.0A @ 100-120 VAC 3.0A @ 220-240 VAC 1.2 KVA (4113) 0.72 KVA (4116) 3.1.2 (cont) Secondary Mainframe Module (4115) Voltages: 100 VAC @ 50/60Hz 120/240 VAC @ 60Hz 220/240 VAC @ 50Hz Currents, ACDU: 16.0A @100/120 VAC 8.5A @ 220-240 VAC 2.0 KVA Fixed Disk Module (4511/4513) Voltages: 115 VAC @ 50/60Hz 220 VAC @ 50Hz Currents, ACDU (w/two disks): 6.0A @ 100/120 VAC 3.0A @ 220 VAC 1.2 KVA (4511) 0.72 KVA (4513) LS700 Power Supply Input Line Current: 9.6A @ 115 VAC 4.8A @ 230 VAC Output Voltages: +5 VDC + 5% +12 VDC + 5% -12 VDC + 5% Output Currents: 14-140A (+5 VDC) 10.1A (+12 VDC) 4.4A (-12 VDC) Protected Power Supply II Input Voltages: 21-34 VDC (normal) 15-21 VDC (battery- backed operation) Input Currents: 6.0A @ 21 VDC (normal) 7.5A @ 15 VDC (battery- backed operation) Output Voltages: +5 VDC +5% +12 VDC +5% 21 VDC +5% (backup battery charging) Output Currents: 9.0A (+5 VDC) 2.5A (+12 VDC) 200mA (+21 VDC) CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB114 Pg006 3.1.3 ENVIRONMENTAL Operating Temperature (system): 50oF to 100oF Relative Humidity (system): 20% to 80% (non-condensing) 4.0 SPARING Sparing for the MPx 9400/9600 systems will consist of the same parts as the MPx 9000/9100/9500 series systems with the following additions. DMA II PCBA...............P/N 903599-001 MM894035 250MB 5-1/4" SCSI DISK....P/N 400715-005 MM896275 120MB 1/4" SCSI TAPE UNIT P/N 400716-005 MM896280 AMS PCBA..................P/N 903548-003 MM894017 NOTE: THE AMS P/N 903548-003 is required for SCSI controller support (9400) systems) but may be used as replacements for either the -001 or -002 AMS PCBAs in other 9xxx systems. ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB114 Pg007 FIB 00115 04/19/88 *** System hangs while running DOWN.LOAD on 9.6A/B [ WPSF 443 ] *** A problem has been discovered which may cause an MPx system to hang when running the DOWN.LOAD utility. This problem has only been seen on the MPx 9000 and 9500 series systems with Operating System levels 9.6A and 9.6B. This problem is fixed in 9.6C. There are two things that may be tried as a workaround if running DOWN.LOAD has been required and system hangs have resulted. The first thing to try is to set the priority of the task running DOWN.LOAD to high (6) by using !JOB.MODIFY. Another workaround is to keep track of how long the down load is in progress. If the down load is taking more than 30 seconds, then abort the process by depressing the escape key several times. A second attempt to down load the controller should complete successfully. Note: Frequent down loads to the same controller may indicate a "hardware problem" with that controller or a device connected to it. ORIGINATOR: Dale Jensen CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB115 Pg001 FIB 00116 04/20/88 *** IMLC 903534-001/REV L won't work in an 810 System [ WPS 444 ] *** SW6 on the IMLC is now hardwired to eliminate confusion of the CPU type setting. SW6 determined the CPU type that the PCBA would be used in. If used in the 810 system, then SW6 would be set to 200ns. If used in the MPx series systems, then SW6 would be set to the 160ns setting. ECN 12617 hardwired the setting for 160ns (MPx), omitted SW6 and brought the IMLC PCBA to revision "L". The 810 system is no longer supported, use the 903251 or the 903381 PCBA's (810 system use only) or the 903534 PCBA at or below revision "K". Confusion with the setting of SW6 was due to the silkscreen on the PCBA being incorrect. The 200ns (810) setting should be at the TOP of the switch (SW6- 1, 2, 3, 4-UP) and the 160ns (MPx) should be at the BOTTOM of the switch (SW6-1, 2, 3, 4-DOWN). Some service manuals too, did not have the correct information. NOTE: There are also other silkscreen errors on the IMLC. For switches 1, 3, 4 and 5 use the "ON" position on the switch, NOT THE SILKSCREEN (1=OFF/ OPEN - 0=ON/CLOSED). SW7/SW8, I=ICOM (TOP), X=XCOM (BOTTOM). Please refer to Field Bulletins 342 and 375 for other IMLC information. A copy of this ECN can be obtained through your normal channels. ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB116 Pg001 FIB 00117 04/20/88 *** DMA Rev P released for DISK OFFLINE problems [ WPS 447 ] *** ECN 12490 has been released against the DMA-I PCBA PN 903554. This ECN addresses two items: 1) Possible controller hangs (Drive Offline). 2) Prevent the 8" disk fault LED from turning on when power is applied to the system. Though revision "P" is now LARL, DO NOT bring a running system up to this level unless they are having "DISK OFFLINE" problems. There are other circumstances that can cause this error. Other possible causes of this problem are: 1) Disk drive dropping ready. 2) Excessive Bus cable length (55 feet is max total per DMA). 3) Mis-alignment of disk drive (data seperator/servo PCBA's). 4) SMD-I/II PCBA. 5) Power. 6) Intermittent sequence/power cable connection or LS-700 (that sequence cable is connected to J10). 7) AC power cable to drive power supply and drive indicator panel cable on top of each other; seperate them. NOTE: Revision "R" DMA-I should be used if 16MB PCBA (903621) is in the system to prevent possible power fail recovery problems. Please refer to Field Bulletins 219A, 274, 315, 358A and 367. See attached ECN 12490. DRAWING INFORMATION: See WPS Field Bulletin 447 for ECN information ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB117 Pg001 FIB 00118 06/01/88 *** Spare Keyswitch Miswired - Causes Failure to Load [ WPS 463 ] *** Some key switch assemblies (907631-902) were found to be miswired. These are used for tall cabinets, 91xx and 71xx systems, and will most likely be a spare rather than in a new system. The wires at the connector end were reversed. Using this miswired key switch can cause the system to fail to load. The key switch assembly should be wired as follows: _____________ | WIRE LIST | |FROM TO | |S1-1 P1-2 | |S1-2 P1-4 | |S1-3 P1-3 | |S1-4 S1-2 | |S1-5 P1-1 | -------------- ORIGINATOR: L. Sanders CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB118 Pg001 FIB 00119 09/18/91 *** Memory Dump Decoding Information [ WPS 465 ] *** NOTE: There are decoding charts for memory parity and timeout dumps in the MPx and ASx Systems Handbook, FIB 37 covers 7xxx, 8xxx, and 9xxx systems, FIB 47 covers the ASx systems. The purpose of this Field Bulletin is to make everyone aware of the different memory dumps and what can be done about them. Memory dumps are not restricted to memory, but can be caused by the CPU or shared memory controllers such as 8-ways, 16-ways, high speed video controllers, BMTCs, etc. Memory definitions: Memory timeout - An attempt was made to access a memory address that does not exist or did not respond. Memory parity - Memory data that has lost integrity. The following table will list memory errors and corrective action. __________________________________________________________________________ | MEMORY ERROR| DEFINITION |CORRECTIVE ACTION | | | | | | ALL | |Check for any lights on | | | |CPUs, memory boards, and | | | |shared memory controllers.| | | |Reset when possible,if the| | | |same LED reappears,replace| | | |the board. | | | | | | | | | | 1,0,X,5 | Memory timeout error |Refer to HANDBOOKS-BASIC | | 1,64,X,5 | (7xxx, 8xxx, 9xxx CPUs) |FOUR-MPX Systems FIB 37 | | 1,128,X,5 | |for decoding charts. | | 1,255,X,5 | | | | 28,105,1,X | | | | | | | | | | | | 1,0,X,6 | Memory parity error | SAME AS ABOVE | | 1,64,X,6 | (7xxx, 8xxx, 9xxx CPUs) | | | 1,128,X,6 | | | | 1,255,X,6 | | | | 28,106,1,X | | | | | |Most of these errors | | 1,255,255,5| Memory timeout error (9xxx) |appeared to be a bad ESTK | | 1,255,255,6| Memory parity error (9xxx) |board. Normally the RSTACK| | | |parity error LED is lit. | |.............|.................................|..........................| | 1,x,y,5 | Memory timeout error (ASxx) |Refer to Handbook FIB 47 | | | | | | 1,x,y,6 | Memory parity error (ASxx) |Refer to Handbook FIB 47 | ---------------------------------------------------------------------------- ORIGINATOR: L. Sanders MODIFIED by: Morm Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB119 Pg001 FIB 00120 06/01/88 *** Excessive ID/Data CRC errors [ WPS 467 ] *** Excessive Disk ID CRC or Data CRC errors may be logged to the Event Log (AKA Errorlog). This problem may be caused by the CRC Generator/Checker IC, MBF P/N 168020-001 (74F401) related to IC's with the Date Code '8646'. The IC is used on the TDP (903217-001) and the DMA I (903554-001) controllers. Fairchild or National IC's with date codes other than '8646' will not experience this problem. It will fail by giving false Data CRC and ID CRC errors on disks formatted by controllers using this IC. This condition is more prevalent if the disk was formatted under High Voltage Margin conditions. If you should have this condition, check for this IC at location '6E' on the TDP or location '6DD' on the DMA-I PCBA's. ORIGINATOR: D. Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB120 Pg001 FIB 00121 02/08/89 *** CACHE Errors Logged During the Load Process [ WPSF 481A ] *** PROBLEM: It has been noticed on the 9.6 Levels of OS, that cache errors will log in the ERRORLOG during system load. These cache errors will show up on the non-I/O CPUs only. The IDC amber cache parity LED, DS3, will blink ON and OFF during this time. The AMS PCBA, P/N 903548-003 does not experience this problem on the 9.6C OS or above but will on the 9.6A or B levels. The AMS PCBA, P/N 903548-001/-002 does not experience this problem on the 9.6A or B OS but will on the 9.6C and above levels. CAUSE: The state of the Code Cache at load time is unknown and so a bit is set to indicate that it is invalid, thus the Code Cache data is not used until the invalid bit is reset again after the load. This does not cause any online operating problems. The only inconvenience is not knowing if the cache errors are valid or occurred during the load sequence. One way to find out if the cache errors occurred during the load process is to display the Boot Load Summary in the Errorlog. Use the Boot Load Date and the Load Time as the Start Date and Start Time for the memory errors list in the ECC option (this option displays the Cache errors and Main Memory Parity errors). Use the Boot Load Date for the End Date and the Load Time plus (+) 5 minutes for the End Time. Cache errors during this period occurred at system load time. Cache errors that occur after this time up to the next Boot Load Time are valid cache errors. SOLUTION: ECN #13276 has been released to fix this problem. This ECN calls out a PAL change and a jumper to the IDC PCBA's P/N 903550-001, -002 that brings these PCBA's to revision 'S'. The same applies to the IDC64 PCBA's P/N 903597-001, -002 that brings these PCBA's to revision 'J'. ORIGINATOR: D. Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB121 Pg001 FIB 00122 12/22/88 *** Excessive ECC Errors - BMTC Wiring Error [ WPSF 503 ] *** PROBLEM: Excessive ECC errors are being logged into the ERRORLOG. None of the memory PCBAs have any error LEDs ON indicating a multi-bit (CR1,RED) or single-bit (CR2,AMBER) error. Replacing the memory that the errors are logged against does not stop the errors from being reported. CAUSE: Some BMTC PCBAs (P/N 903413) may have been mis-wired during implementation of ECN 11953 that brought this controller to revision "Y". SOLUTION: Check the wire jumper from the IC at location 1T pin 3. It should go to P1A-110 (DC3COM) but was mis-wired to P1A-112 (SBERR). If the wire does go to P1A-112, correct it by relocating it to P1A-110. ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB122 Pg001 FIB 00123 09/14/88 *** Dumps/Hangs and Strange System Problems due to Incorrect Jumpers *** SYMPTOM/TEXT: At two new system installations of 9400 systems, after approximately 1 to 2 weeks the systems showed the following symptoms: Hangs and/or dumps w/numerous red leds lighted (usually some combination of memory, IDC, and DMAII PCBA'S). FIX: Both systems contained less than 12MB of memory, but came from the factory With the jumpers on the IDC's and memory PCBA's set for greater than 12MB. Also the jumper on the DMAII PCBA which selects between MPX or AS series systems was missing (neither option selected). For correct jumpering details reference the MPX HANDBOOK section of these field bulletins. NOTE: There have been several more instances of strange system problems soon after installation (affecting all MPx systems) including SAVERESTORE failures, hard errors on backup, errors during the backup of a large file, etc, in each case the resolution was to correct memory system jumpering/switch setting (MCS, IDC64, DMA , MEMORY). It appears that ALL RECENTLY INSTALLED MPx SYSTEMS ARE PROBABLY STRAPPED INCORRECTLY and should be checked at the earliest possible opportunity. The correct settings are in the MPx and Asxx HANDBOOK FIBs. ORIGINATOR: Barry Matthews Norm Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB123 Pg001 FIB 00124 08/16/88 *** Things a Customer should do after every Dump *** SYMPTOM/TEXT: When an MPX system dumps, the validity of files that were in use is questionable. If the following procedure is not done, you may have fixed the system, but not the files. The end result is more dumps after the system is repaired because of invalid files. If the customer gets a dump of 2,10,x,x or 1,x,x,16 it is possibly due to invalid files. PROCEDURE TO FOLLOW: Get into the DISKANALYZER utility and do the following procedures in the order specified: 1) Find files that lack integrity 2) Validate files (output to printer) 3) Reconstruct available space files - TYPE II LOAD 4) Reconstruct directory file - TYPE II LOAD 5) Validate/reconstruct a file (for all files that show invalid in (2)). NOTES: 1) Under a TYPE I LOAD, you can do all drives at once from different terminals. Be sure to keep everyone else off (may stop them because of locked files). 2) Under a TYPE II LOAD - can do only one drive at a time, but guarantees no one else on system. 3) Time required - anywhere from 2 to 10 hours, depending on file sizes. It is also not a bad idea to have customer do a step 3 once a week or so, after backup. It only takes a min. or two. ORIGINATOR: Ed Schmedes & Pete Dobrow CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB124 Pg001 FIB 00125 08/16/88 *** Code Cache Disabled [ WPSF 476 ] *** When displaying DEVICES, the status of the CPU cache indicates that the CODE CACHE is disabled, (RDc), after changing a PCBA. This problem may be encountered after replacing a CPU PCBA or when upgrading a system to greater than 12MB. As the MPx 9xxx system has grown to support greater amounts of Main Memory, different PCBA versions and switch/jumper settings were introduced. Certain combinations of these settings can cause the Code Cache to become disabled. When this problem occurs, check the following: 1) If the system is configured for greater than 12 meg: All memory PCBAs are strapped the same, if the system is configured for greater than 12MB, ALL MEMORY (not just the memory above 12MB) must be strapped to greater than 12MB settings. All memories must have JP5 at location 1E = 1 to 2 and IC Pad location 1A = 8 to 9. The IDC64 PCBA(s) also must be set for greater than 12MB. IDC64 PCBA's must have strap E6 to E7 out. 2) If the system is configured for 12 meg or less: All memory PCBAs must be strapped for 12 meg or less (JP 5 at location 1E = 2 - 3 and IC pad at 1A = 9 - 10). The IDC64 PCBAs also must be set for 12 meg or less (jumper E6 to E7). The state of the CPU cache is displayed in either upper case, 'RDC', lower case, 'rdc', or any combination there of. RDC is the acronym for RSTACK (R), DATA CACHE (D) and CODE CACHE (C). The DEVICE screen displays this status in the following format: CPU 0: RDC CPU 1: RDC CPU 2: RDC When these characters are displayed in lower case, it indicates that feature as being disabled. They can be disabled via a switch on the CPU PCBA's for diagnostic purposes or due to cache failure or System Configuration Record constraints. The RSTACK is a feature common to all MPx 9xxx series systems. This feature should always be enabled and displayed in upper case. Data and Code cache are a feature that is dependent upon the system model type. MPx 90xx, 91xx and 94xx systems have no Data or Code cache and are displayed as 'Rdc'. MPx 95xx and 96xx system have Data and Code cache and is displayed as 'RDC'. For added information on configuring hardware for greater than 12MB, please reference Field Bulletins #291, #384 and #385. ORIGINATOR: Don Luque Norm Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB125 Pg001 FIB 00126 10/12/88 *** DMAIII Requires New -5 Volt Power Supply *** When installing the new DMAIII controller in existing MPX systems, an add-on piggy back power supply must be added to the ACDU of the frame that will contain the DMAIII. This piggy back supply ( part number MM892538 ) supplies the necessary -5 volts required by the DMAIII. Reference MPX handbook F.I.B. #46 for DMAIII switch settings. Reference DMAIII installation manual (M0132) for installation instructions on the add-on power supply. ORIGINATOR: Barry Matthews LOGON: 05DPS4 CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB126 Pg001 FIB 00127 03/22/90 *** Non-MBF SCSI Disks will not Work on 94xx Systems [ WPSF 492A1 ] *** MAI Basic Four Inc. (MBF) drives have been evaluated to meet the MBF specifications for use on the MPx series systems. Disk drives which do not meet MBF specifications will prompt the following message: ______________________________________________________________ | | | "Stop, you are attempting to use the proprietary software | | of MAI BASIC FOUR, INC. in violation of the license related | | thereto or otherwise in violation of the rights of the | | licensor. Please contact the Director of Worldwide Product | | Support at the licensor's corporate headquarters in Tustin, | | California, USA, (714) 731-5100." | |______________________________________________________________| There is the slight likelihood that an MBF SCSI drive may give this same message. The only reason for this to happen would be a HARD ERROR WITH THE DRIVE. The drive will need to be replaced as would any other drive with an HDA error. If this message appears with a known MBF drive, there is NO REASON to call the listed phone number. ADDENDUM: MAI Basic Four Inc. (MBF) disk drives have been procurred to specific MBF performances, quality and reliability specifications for use on the MPx/Advanced Series Systems. There are several reasons not to buy an off the shelf disk drive, as opposed to an MBF disk drive. Two main reasons are: 1. MBF guarantees a low number of alternate tracks (or sectors). Too many alternate tracks (or sectors) assigned could present a performance issue. In addition, if there are only a few spare tracks remaining, due to excessive alternates, the disk drive will need to be replaced sooner due to the lack of spare alternates to replace defective tracks (or sectors). 2. MBF has an extended warranty agreement on its disk drives with the manufacturer. This allows maintenance prices to be at a fixed rate. An off the shelf disk drive may only have a 90 day warranty and obviously that would have to be justified in a special (higher) MBF maintenance contract with the customer. This is a protection and a quarantee that the disk drive has met MBF standards. Disk drives which cannot be recognized in an MBF system, and therefore, do not meet MBF specifications, will prompt with the following message: ______________________________________________________________ | | | "Stop, you are attempting to use the proprietary software | | of MAI BASIC FOUR, INC. in violation of the license related | | thereto or otherwise in violation of the rights of the | | licensor. Please contact the Director of Worldwide Product | | Support at the licensor's corporate headquarters in Tustin, | | California, USA, (714) 731-5100." | |______________________________________________________________| There is a slight possibility that an MBF drive may give this same CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB127 Pg001 message. The only reason for this to happen would be a HARD ERROR WITH THE DRIVE. The drive will need to be replaced as would any other drive with an HDA error. If this message appears with a known MBF drive, there is NO REASON to call the listed phone number. ORIGINATOR: D. Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB127 Pg002 FIB 00128 01/25/95 *** Dump Report Form [ WPSF 496C ] *** Refer to GENERAL-BASIC FOUR-ADMINISTRATIVE FIB 12 for the current dump report form. ORIGINATOR: Norm Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB128 Pg001 FIB 00129 11/01/88 *** Do Not overlook Drive Terminators when troubleshooting disk failures. *** SYMPTOM/TEXT: A 9500 system with a fixed disk as drive 0 and two T-83's as drives 1 and 2 attached to the first DMA began exhibiting read and write failures when attempting to restore the operating system and customer data. Drive #2(T-83) was moved to the last . drive of this chain immediately prior to the failures, the terminator was moved from drive #1 to drive #2. The failures showed up as corrupted sectors on both drives 0 and 2. Some of the damaged sectors had the same numbers on . both drives. FIX: The errors were increasing until the terminator was replaced. Most of the corrupted sectors were repairable through the track relocation routine ( rewrote the data without relocating the tracks). After repairing all sectors the disks ran clean. Many of the errors encountered were alternate cylinder errors, not ready errors and CRC errors. ORIGINATOR: Barry Matthews LOGON: 05DPS4 CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB129 Pg001 FIB 00130 MAI COMPANY CONFIDENTIAL 10/15/93 *** Updated Procedure for Adjusting LS700 Power Supplies [WPSF 303-2] *** NOTE: This procedure now requires the use of an oscilloscope. This addendum to Field Bulletin #303 is to provide the NEW procedures for adjusting the LS700 power supply. This section will apply to all MPx and Advanced Series Systems. Systems using the UPS 100 power supply (810 power system) should still be adjusted according to the "old" procedure detailed in FIB 62. PRE-INSTALLATION CHECK: Prior to applying AC to the chassis, insure that proper torque is maintained on the nuts of the Bus Bar against the Backplane. To aid in maintaining this torque, Spring Washers, P/N 213008-002, have been added. The spring washers maintain an 18 inch-pound torque when they are in a FLAT (snug) condition. If the Backplane Bus Bar does not have these Spring Washers, a slight decrease in torque can cause large contact pressure differences between the Bus Bar and the Backplane. Over-tightening these nuts can cause the Bus Bar studs to pull through the Backplane. If this happens, the Backplane will need to be replaced. The two connections at the top of the Bus Bars, where the LS-700 power supply connects, must also be secure. These two connections can withstand greater torque pressures (25 lb-in), they must be tight. In multi-mainframe systems, insure the interconnect Bus Bars at the top and bottom of the backplanes are secure and that all load sharing cables, DC power cables, power fail detect and power sequencing cables are connected. If these connections are not secure, the maximum PCBA support of the system may not be achieved. Dumps and hangs may also occur. Insure that the AC Programming Plug (P/N 907309-001) resides within the proper position of J2. | | | | | |--1XXXV-|--| <------- For 110 VAC |---2XXXV---| <---------- For 220 VAC J2 Programming Plug Positions LS700 POWER SUPPLY ADJUSTMENT PRELIMINARY INFORMATION: The following point should be kept in mind: A. The load sharing feature affects the +5 volt outputs only. B. When load sharing is functioning, the power supply with the lowest output voltage is the reference for the other supply(ies) which will attempt to match the output voltage of the lowest supply. The lowest supply may be considered the "MASTER" and the remaining supplies are the "SLAVES". CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB130 Pg001 C. The AC line current to the LS700 from the ACDU is made up of the following: (NOTE: "losses" are not being considered) current representing the +5 volt Unprotected (LS700) + current representing the +/-12 volt Unprotected (LS700) --------------------------------------------------------- = LS700 AC Input Current D. The AC line current representing the +5 volts for a "SLAVE" LS700 will be approximately 1.6 times the AC line current representing the +5 volts of the "MASTER" LS700. This is true regardless of whether there is one or two "SLAVES". E. In regard to clamp-on AC ampmeters, this type of device is not needed for the procedure below. However, a quick check with a clamp-on AC ampmeter can provide a good indication as to whether load sharing is functioning properly or not. Do not use the clamp-on AC ampmeter to "tweek" the supplies trying to get the AC input currents to all LS700s to show the same amount of total line current. The only conditions under which all AC inputs would indicate the same total line current are: 1. The amount of current representing the +/-12 volts load in the "MASTER" added to the amount of current representing the +5 volt load happens to equal the total input current of one or more "SLAVES". 2. Two or more LS700s are so close in output voltage that they are competing for "MASTER". The clamp-on AC ampmeter will show what appears to be equal AC input currents. LS700 POWER SUPPLY ADJUSTMENT PROCEDURE: Do not disconnect any cables or remove any PCBAs; the power system will be balanced as is. The system to be adjusted should NOT be running any customer jobs or writing to disk. It is suggested that an insulated device be used when adjusting the power supply voltages. NOTES: 1) Typical range of adjustment for +5 volts is +3.9 to 5.8 volts (will OVP around +5.8 volts). 2) All margin switches should be set to OFF (Open). 3) On MPx 7000 systems, it is NOT necessary to disconnect 5-1/4" peripherals from the power adapter on the LS700. A. Where to monitor voltage: Connect a DVM and an oscilloscope to the mainframe which contains the greatest load. This generally will be the mainframe containing the CPU. Use +5 volts and Ground test points on the terminator/extender PCBA (903199-XXX) or, for the Advanced Series, the MBA PCBA. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB130 Pg002 Set the scope to AC, 50 mv/div, .2 us/div to check for noise. B. Determining who will be the "MASTER": Determine which frame contains the greatest number of ISDCs (8 Ways and 16 Ways). The LS700 in this frame (the greatest number of ISDCs) will be the "MASTER". Why: As the "SLAVE" power supply(ies) will be carrying a greater amount of the +5 volt load, better overall balance is achieved by having the "MASTER" carry the greatest +/-12 volt load. C. On the "MASTER" LS700, adjust the +5 volts all the way down. This is done by turning R7 completely CLOCKWISE. D. On the "SLAVE" LS700(s), adjust the +5 volts all the way up. This done by turning R7 completely COUNTER-CLOCKWISE. The DVM should still be indicating that the +5 volts is low. If this is not the case, there may be a problem present. Shut off the system power at the ACDUs and check power supply cabling, etc. E. Slowly adjust R7 on the "MASTER" COUNTER-CLOCKWISE until the DVM reads +5.25 volts. F. Now, slowly adjust R7 on the first "SLAVE" CLOCKWISE until the DVM drops just below +5.25 volts (may "bobble" at 5.25 to 5.26 or 5.27 volts). Back R7 off slightly (COUNTER-CLOCKWISE) to just obtain the +5.25 volt reading. G. If a second "SLAVE" (third LS700) is present, repeat "step F" above. H. Return to R7 on the "MASTER" supply and slowly turn CLOCKWISE until the DVM indicates +5.00 volts. I. Verify that NONE of the RED "OVP" LEDs are illuminated and that all GREEN LEDs are ON. J. Check the scope for < 100 mv of noise, if > 100mv of noise exists repeat steps E, F, G, and H using .05V less than previously used (may have to step down several times to eleminate noise as step H is performed ex. 5.20, 5.15, 5.10, 5.05). The power system balancing procedure is complete. AC AMPMETER USE: As mentioned previously, a clamp-on AC ampmeter may be used as a quick check of proper load sharing operation. AC input current can be measured by removing the mounting screws from the ACDU(s) and sliding the ACDU(s) back slightly. Three heavy wires run from the ACDU to the AC input on the LS700. One of these is ground and should measure "0.0" amps (any current flow in the wire indicates that a ground problem exits). The remaining wires are "hot" and "neutral", a valid reading may be taken from one of these. Programming plugs P/N 916385-001 have a long wire loop which extends up to the top of the LS700 just behind the power supply. This "loop" eliminates the need to remove the ACDU to do this check. The AC ampmeter can use this loop for current readings. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB130 Pg003 NOTE: Some of the AC programming plugs have the extended wire loop in the wrong connectors (the two loops are reversed) and will read 0 AMP with the LS700 operating correctly. If you read 0 AMP on this loop verify the reading by pulling the ACDU before replacing a good P/S. The wiring in the AC programming plug can easily be corrected by switching the two wire loops. The long loop should be between pins 3 & 4 (the numbers are VERY SMALL and located on the wire side of the connector). To remove a connector: 1) push in on the wire end of the connector pin 2) press down on the END of the connector pin to unlatch _________ latch <__________ connector pin 3) pull wire to extract connector pin from connector __ __ __ __ _|1 |_|2 |_|3 |_|4 |_ Connector as viewed from pin side | -- -- -- -- | |_____________________| It is difficult to give "typical" readings due to great variations in system configurations. A three frame Advanced Series Model 63 with no serial devices connected to 16 Ways (+/-12 volt current is relatively low without serial devices being actually connected) may yield 3.6 amps on the "MASTER" and close to 4.8 amps on each "SLAVE". Measurements of 9 amps, 3 amps and 3 amps would indicate a problem. The same would be true of 6 amps, 6 amps and 2 amps. Experience will be the most useful in these situations. CURRENT CHART: PCBA NAME CURRENT LOAD (Amps) ----------------------------------------- NEP II 18.20 AMS 16.00 ESTK 16.00 IDC 15.00 ** DMA I 15.00 ** DMA III 15.00 MDI 14.00 ACS 13.90 STACHE 12.60 * BMTC 11.40 ** DMA II 10.50 MPC 10.40 TDP 9.25 16 WAY 9.20 LAN 8.85 VCON 8.80 * MCS/M 8.10 IMLC 6.90 ** MBA 6.50 * MCS W/O MEM. 5.50 8 WAY 5.00 * 16MB 3.90 * 1/2/4 MB MEM 3.60 CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB130 Pg004 * TERMINATOR 1.90 * Also uses battery backup voltages. ** Also uses a small amount of battery backup voltages. FUSES: In the LS-700 power supply, if either 15 amp fuse F2 or F4 should blow, do not replace them. These fuses are to protect the PCB from further damage for a problem internal to the power supply. If these fuses are replaced the power supply may smoke prior to blowing the fuses again. The LS-700 power supply needs to be replaced if these fuses blow. The fuses are located in the upper right hand side looking from the front of the system. ORIGINATOR: Ira Leibowitz/D. Luque MODIFIED by: Norm Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB130 Pg005 FIB 00131 11/18/88 *** IMLCs not recognized at Boot with two IMLCs present on 9xxx Systems *** There is a problem with the 9xxx systems booting with two IMLCs. The system will not always recognize both. The average failure rate on a boot was both IMLCs being recognized approximately three out of every four boots. On the fourth or fifth boot only one out of the two would be recognized. The problem is on both the MM896030 and MM896031 IMLC PCBs. The problem is not affected by PCB layout or board addressing. To recognize both 100% of the time the I/O engine's AMS PCB needs a boot prom level of at least 3.2.0.2. Most failures observed in the field had levels of 3.1.0.4 on the boot proms of the AMS PCB. The boot level is found on the boot screen at load time, on the OSINFO utility and on the boot screen for DEMON. This is the sure way to find out what the level of the boot proms on the AMS of the AMS PCB so that a 9XXX system will recognize two IMLCs on every boot. With a MM894017 (part #903548-003) AMS PCB at Rev level "S" it's boot prom level is at 3.2.0.2. This is the recommended PCB and Rev level to en- sure that two IMLCs will be recognized on a boot every time on the 9XXX sys- tem. ORIGINATOR: Kim Yaworsky LOGON: 09FPS1 CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB131 Pg001 FIB 00132 11/30/88 *** Parts list for adding on a second 5 1/4" Disk drive to a 7xxx *** When adding a second 5 1/4" Disk Drive to a 7xxx system a DPDU will be required to provide AC power to the 5 1/4" Disk power supply. The service manual does not show the proper DPDU part no. for the 5 1/4" Disk Frame. The DPDU is MM894010 and a Mfr. No. S907740-001. In addition to this you will need the 5 1/4" Disk drive, Disk power supply 400446-002, Radial cable 907174-028, AC power cable from DPDU to Disk power supply 907747-001, DPDU sequence power cable from J10 LS700 to PC connector on the DPDU 907140-006, and a new Configuration record. The neccesity for this information is due to numerous sales of used B/4 equipment.not properly sold. By no means are these parts to be supplied by NACS, the above information is for determining what parts the Vendor should supply as part of the sale. ORIGINATOR: Allan Mollyhorn CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB132 Pg001 FIB 00133 12/09/88 *** Information on the LS700 Power Supply *** The intent of this document is twofold : (1) to reiterate what should be standard procedure when working with LS700 power supplies and (2) emphasize the usefulness of a relatively inexpensive tool . I. As a reminder , when installing LS700 power supplies , systems or add-on frames verify the following PRIOR to applying AC power . Note that a "discussion" of each point follows in a paragraph . * Mainframe control panel key switch is set to OFF . Turning on AC power with the control panel switch set to ON may damage a supply , particulary as the supplies are being turned on one at a time . * +5 Volts sense is properly connected on each LS700 +5 Volt sense lead is properly connected between J3 on the LS700 and J16 on the backplane (J23 and J24 on the double wide backplane to be released in the future on the Advanced Series) . This applies to EACH power supply present . Sometimes the supply which has it senses line disconnected may OVP and puts the load on the remaining supply(ies) . * Load sharing cables are properly connected on each LS700 . Verify that they are not misaligned or offset one row . The standard method of installation is such that the closest of J16/J17 on one supply connects to the closest of J16/J17 on the adjacent supply . When load sharing connections are off a row , one of the following may happen : 1. One power supply goes into current limit with the remaining supply(ies) carrying a large load . Note that there is the potential for damage to one of the "remaining" supplies . 2. The +5 volt bus goes to some voltage other than +5 volts (i.e. 5.4 v) . * Disk sequence cables are properly connected . Ensure that the disk sequence cables are keyed... they can however be installed offset by one pin or forced on backwards . Incorrect installation of the sequence cable typically results in damage to the sequence logic of the disk module or the LS700 . II. Clamp-on AC Current Meter : We highly recommend that persons working on systems with multiple power supplies have a clamp-on AC current meter or "Amprobe" (which is a brand name) . This type of device is extremely useful in determining the status of multipower supply installations WITHOUT UNPARALLELING THE POWER SUPPLIES . With paralleled power systems the clamp-on ampmeter is the fastest , most convenient method of differentiating between the power supplies . We have found it to be extremely useful in the folling areas: CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB133 Pg001 1. The clamp-on is the only way (without changing the conditions) of determining which supply is in current limit . 2. The clamp-on is an easy way to determine which power supply has no output at all (of course , a blown fuse at F2 or F4 will also indicate which supply is not functioning) . 3. As discussed in the update balancing procedure , the clamp-on is the only way of determining that each LS700 is carrying its share of the load . NOTE: A recent ECN (#13417) has added a "current loop" to the AC input "programming" plug for the LS700 . This loop is mounted at the top/rear of the power supply as a convenient location to attach a clamp-on meter . A new part number has been assigned for the "programming" plug , the new part number is 916385 (Rev. "A") . Thhere are several clamp-on meters that have been found suitable . They are the Beckman model AC20 , the Amprobe model RS-3 or the Soar model 611 . Generally desirable features in a clamp-on meter should include a "data hold" feature and relatively small size . Add-on units for standard DVMs should be avoided . III.Some Typical Current Readings: 1. LS700 AC input with control panel in off position , input current tends to be about 0.1 amp. . 2. An LS700 in current limit tends to draw around 1 to 2 amps . An example for a three-frame system might be 9 amps , 8.8 amps and 1.2 amps: the first two supplies handling the load and the last supply in current limit . The 9 amps and 8.8 amps being drawn by the first two supplies is pretty high , the supplies are most likely running hot . NOTE: That it is very common for the +5 volt DC bus to drop to 2 or 3 volts when one supply is in current limit . 3. It is difficult to give "typical" readings due to great variations in system configurations (hence various amounts of power supply load) . A three frame Advanced Series 63 with eight 16 Ways may yield 3.6 amps on the "master" and close to 4.8 amps on each "slave" after balancing . Measurements of 9 amps , 3 amps and 3 amps would indicate a problem . The same would be true of 6 amps and 2 amps . Experience will be most useful. in these situations . ORIGINATOR: I . Leibowitz CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB133 Pg002 FIB 00134 12/28/88 *** MPx 94xx Systems Hardware Status Word Definitions [ WPS 504 ] *** Error codes are different for SCSI (Small Computer System Interface) devices supported by the DMA-II PCBA (P/N 903599 or 903714) used in the MPx 9400 system. The SCSI disk and tape units have different error meanings than those displayed in the Hardware Status table on OS level 9.6C and are corrected in 9.6E and above. The Hardware Status Word is a 32 bit word represented be eight (8) hex values in the form 80000000. This word is sometimes displayed with the Four-Tuple in dump messages when caused by a hardware problem. It is also in the ERRORLOG to give a description of the error logged. To display the various meanings of the Hardware Status Word, input at your terminal !ERR 128,0,0,0. (See Field Bulletin #107) For SCSI devices, bits 31 through 16 are interpreted the same as displayed in the hardware status table. Bits 15 through 8 are called 'Sense Keys' and have a value in the range of 00 to 0F hex. Bits 7 through 0 are called 'Sense Codes' and in the range of 00 to FF hex. The Sense Keys are common for ALL SCSI devices and are defined in the SCSI system standards. The Sense Codes are not standardized and vary from manufacturer to manufacturer and from Sense Key to Sense Key. (Because there is no standard for the Sense Codes, and they can change, there will be no definition given.) The DMA-II does not return all these Sense Keys and not all are logged as many are informational messages. The Sense Key definitions are as follows: SENSE SENSE KEY MEANING KEY MEANING _____ _______________________ _____ _______________________ 00 No error 08 Blank check (end of media) 01 Recoverable (soft) error 09 Undefined 02 Device not ready 0A Copy aborted (unused) 03 Media (hard) error 0B Aborted Command (information) 04 Hardware non-recoverable error 0C Undefined 05 Illegal request 0D Volume overflow 06 Unit attention (information) 0E Miscompare 07 Data protect (write protect) 0F Undefined EXAMPLE: 80000204; '8000' are bits 31 through 16 and are the same as defined in the Hardware Status Table. '02' are bits 15 through 08 known as the Sense Keys. '04' are bits 07 through 00 which are the Sense Codes (ignore). If.an error occurs on the SCSI tape unit with a status of 80000204, the Hardware Status table would indicate ABORT/MEMORY PARITY/UNUSED. The true meaning with the Sense Key is ABORT/DEVICE NOT READY. ORIGINATOR: D. Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB134 Pg001 FIB 00135 12/30/88 *** Potential DATA DESTRUCTION when Disk Controllers are replaced *** There have been numerous cases of data destruction due to defective spares when a disk controller (or interface) PCBA was changed. This applies to DMAs, TDPs, MPCs, SMDIs, etc. and to any future disk controllers. Before replacing any of these PCBAs the data should be completely backed-up. After replacing one of these PCBAs and BEFORE PERFORMING A SYSTEM LOAD, load DEMON and verify that: 1. the system sees all disk drives 2. the drive types are correct 3. the affected drives will read 4. the affected drives will write/verify sectors If there is a problem with any of the above DO NOT PERFORM A SYSTEM LOAD UNTIL CORRECTED! It is entirely possible to lose the data on all attached drives during a system load before you are aware of a problem if the above measures are not taken! ORIGINATOR: N. Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB135 Pg001 FIB 00136 10/25/89 *** Drive Seq. & Status Cabling Errs in DMA-III Manual [ WPSF 541 ] *** There have been several problems found with the DMA-III/SMD Controller and 8-inch Disk Drive Installation Guide M0132. PROBLEM: The first problem is regarding the sequence cable routing in a Low Profile (desk height)cabinet. On pages 2-35, 2-37, 2-55, and 2-70, the diagram shows the SEQUENCE IN (PFD) signal cable going into J4 on the disk indicator PCBA. This drawing is incorrect. ANSWER: The SEQUENCE IN cable should go to J5 and SEQUENCE OUT at J4. The disk drives installed after the first drive will not sequence up properly without making these corrections. PROBLEM: The second problem is with the STATUS signal cable drawings on pages 2-37, 2-50, 2-55, and 2-68. The cable 916369-001 is shown going from the PB connector to J12 of DMA number 2 and then PC to J11 of DMA number 1. This is incorrect. ANSWER: The correct drawing should show the cable (916369-001) going from the PB connector to J11 of DMA number 2 and then PC to J11 of DMA number 1. This problem will prevent the disk drives from sequencing up properly if not corrected. PROBLEM: Page 2-68 shows two incorrect cable numbers. ANSWER: Cable number 916389-001 should be 916369-001. Cable number 99016200-001 should be 916200-001. PROBLEM: Page 2-55 shows PB going to J12 of DMA board number 4 which is incorrect. ANSWER: Cable from PA to PB of DMA board number 4 should go to J11. PROBLEM: Page 2-50 shows PB going to J12 of DMA board number 4 which is incorrect. ANSWER: Cable from PA to PB of DMA board number 4 should go to J11. PROBLEM: Page 2-75 shows cable number 916199-001 pointing to the wrong cable. ANSWER: The cable 916199-001 is the F621 disk power cable and the arrow should be pointing to the cable just left of where it is currently pointing. Cable from CN9 and CN10 of the F621 disk drive to the IPCA J2 and J1 is the correct cable for this part number. PROBLEM: Page 2-37 shows both drives addressed as 0. ANSWER: Disk 1 should be addressed as 1. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB136 Pg001 PROBLEM: Page 2-50 shows all drives addressed as 0. ANSWER: Disk 1 should be addressed as 1 . " 2 " " " " 0 . " 3 " " " " 1 PROBLEM: Page 2-55 shows all drives addressed as 0. ANSWER: Disk 0 should be addressed as 0 " 1 " " " " 1 " 2 " " " " 0 " 3 " " " " 1 PROBLEM: Page 2-68 shows both drives addressed as 0. ANSWER: Disk 1 should de addressed as 1 PROBLEM: Page 2-70, Cable shown in Disk Cabinet #1 running from P1 of the IPCA Bd to J4 on the Control Panel (tall cab.) is listed as P/N 916281-001. ANSWER: This should be P/N 916261-001 FUTURE: These corrections have been given to the documentation department so they can be included in a future revision of this manual. NOTE: These errors are in M0132C. ORIGINATOR: D. Luque/John Tank CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB136 Pg002 FIB 00137 05/12/89 *** System Cooling - LowBoy Cabinets [ WPSF 533 ] *** To insure adequate air flow for system cooling, the filters have been relocated and airflow direction changed. This change only applies to the LoyBoy Desk Height mainframes used with the MPx 91xx/94xx/96xx and the Advanced Series Systems. General Information Airflow through the system has been reversed so ALL mainframe fans (CPU and Power Supply) will be blowing from bottom to top. The CPU filters will be relocated to the bottom of the mainframe chassis and an internal filter bracket will need to be installed. CAUTION: Internal CPU I/O cables will need to be routed in such a way so they will not cross over the top of the fan filters re- stricting airflow. Airfilter Upgrade Kit ECN# 13419 releases an "Airfilter Upgrade Kit", P/N 916387, that can be installed in the Desk Height chassis. No tools are required for mounting the filter brackets. It will be installed in the mainframe under the CPU cardcage. There are three parts to the kit: 1) Filter Bracket, P/N 916368-001: Mounts to the bottom back of the system. The bracket will "slip" between the wire mesh screen on the bottom of the system frame and the frame itself, from the inside. Insert pressure from front to back. 2) Filter Clip, P/N 916376-001: Mounts to the bottom front of the system. The clip will "slip" between the wire mesh screen on the bottom of the system frame and the frame itself, from the inside. Insert pressure, back to the front. 3) Filter, P/N 907281-001: New filter size that will position between the bracket (#1) and the clip (#2). Insert the back of the filter (wire mesh of filter down) into the back bracket, use downward pressure to latch the filter into the front clip. Advanced Series 40/60 The Advanced Series systems uses 5 inch, 130 CFM fans in the Desk Height chassis. Four fans (which require a different plenum than the plenum used with the 4-1/2 inch 105 CFM fans) are used in the 11 slot backplane chassis and six fans are used in the double-wide 22 slot backplane. Airflow direction will be from the bottom to top of the system. MPx upgrades to Advanced Series systems will require these parts when housed in the Desk Height system frame. They will be supplied in the upgrade kit if the Presite Survey was completed and indicates the system is the Desk Height style. Existing Advanced Series systems (field upgrades) in the Desk Height chassis should have this new Plenum and fans installed. The part numbers are as follows: 1) Plenum 5", P/N 916352-001. 2) 130 CFM fan, P/N 345014-001 for 1xxVAC (4 required). CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB137 Pg001 130 CFM fan, P/N 345014-002 for 2xxVAC (4 required). WARNING: With the airflow now going from bottom to top, the TOP of the PCB will now be at a slightly higher temperature than before. ECN# 13272 has been released to add a 'heatsink' to the microsequencer IC (location 3A) on the NEP PCBA to prevent possible heat damage to the IC. This ECN brings the NEP PCBA to revision G. This revision is mandatory with this modification. After changing the direction of airflow, an "Airfilter upgrade kit" will also need to be installed. If the airfilter upgrade kit is not available, remove the existing filters at the TOP of the fans and place them under the cardcage inside the system. Install the airfilter upgrade kit at the next PM. MPx 9000 Series Systems The MPx 9x00 series systems must have the 105 CFM fans for the mainframe. Airflow direction will be from bottom to top of the system. Some Desk Height 9x00 have been shipped with 65 CFM fans instead of the 105 CFM fans. The fans should be checked for proper CFM. If correct, turn the fans over so the airflow will be from bottom to top. There are no PCBA heat concerns after this modification has been made. Power Supplies The Fan(s) over the LS-700 Power Supply and the Protected Power Supply are 105 CFM too. Airflow will be from botton to top. Some systems may have two fans and some may have only one located over the power supplies. If there is only one fan, it MUST be mounted at the location towards the front, over the LS-700 power supply. This is true for Tall framed systems too. Fan Identification Fans identified with a "*" is the manufacturer you are most likely to see. Some 130 CFM fans were also used with the 13xx system. They are 5 inches wide whereas other CFM rating fans are 4 1/2 inches wide. 1xxv FANS MBF P/N Manufacturer CFM MFR P/N 345018-001 * ETRI 68 141LT-2282 HOWARD IND 68 3-15-2523 IMC MAGNETICS CORP 68 WS2107FL-1072 TORIN-NIDEC CORP 68 A30390-10 1xxv FANS MBF P/N Manufacturer CFM MFR P/N 345001-000 ETRI 105 141LS-2282 * HOWARD IND 105 3-15-3450 HOWARD IND 105 3-15-3471 TORIN-NIDEC CORP 105 A30108-10 345014-001 * TORIN-NIDEC CORP 130 A30200-10 2xxv FANS CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB137 Pg002 MBF P/N Manufacturer CFM MFR P/N 345018-002 * ETRI 68 141LT-2281 HOWARD IND 68 3-15-2524 IMC MAGNETICS CORP 68 WS2107FL-1672 TORIN-NIDEC CORP 68 A30426-10 345011-001 ETRI 105 141LS-2281 * HOWARD IND 105 3-15-3451 * HOWARD IND 105 3-15-3472 TORIN-NIDEC CORP 105 A28678-10 345014-002 * TORIN-NIDEC CORP 130 A30324-10 ORIGINATOR: D. Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB137 Pg003 FIB 00138 01/30/89 *** 1/4" Streamer Tape Boot only Supported on 71xx & 94xx Systems *** SYMPTOM/TEXT: The 1/4" cartridge streamer tape drives (Cipher & Tandberg) will not support a tape boot when connected to a BMTC. SAVERESTORE and diagnostics work as with the 1/2" streamer but a tape boot cannot be performed (E01B bootstrap failure). Tape boot from a 1/4" tape streamer is supported only on the 71xx systems (MPC) and the 94xx systems (DMAII). FIX: A 1/2" tape drive must be used for OS or diagnostic tape booting on a 95xx system. ORIGINATOR: N. Jones LOGON: JONESN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB138 Pg001 FIB 00139 01/30/89 *** System Hangs & Pow. Fail Recovery Fails - Lowboy Cabinet MPX'S. *** SYMPTOM/TEXT: System hangs due to LS700 P.S. dropping out, in some cases LS700 will not power up. Also one customer reported that on brown outs system was getting E082 error and system would not recover until it was rebooted. FIX: Heat sensor connections are coming loose from vibration on CPU cabinet right end. Fix is to remove four screws that hold fan assy. in place lift assy. straight up 6" and tie wrap connectors in place, using small tie wraps. Reinstall fan assy. being careful not to pinch cables to heat sensors. This should be done on all cabinets. ORIGINATOR: Gil Mc Gee CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB139 Pg001 FIB 00140 01/30/89 *** System Dumps on Print Jobs *** SYMPTOM/TEXT: System dumps while tring to print to 'LP' - 7010 system. Dumps = 8,138,54,12 - 8,45,11,60. 8,140,54,1 8,240,4,39 - 8,0,11,60. T.S. found out that the data in sector 149 is corrupted, but CRC is ok diskread and ERRORLOG show no errors. This area contains spooler files. (.SPOOL.DATA.LP.A419163 etc. Spooler utility says that these files are corrupted. If you delete these files the replacement files are are corrupted at sector 149. DISK ANALYZER says that the AVAILABLE SPACE and DIRECTORY are corrupted. FIX: 8.6 and above have customer do a file by file backup. Type two load DISK ANALYZER OPT.# 9 RECONSTRUCT AVAIL. SPACE FILES. OPT.#10 RECONSTRUCT DIRECTOY OPT.#7 LIST FILES SECTOR RANGE OPT.# 5 DISK SPACE USAGE After this was done MPC was replaced due to history of machine, no problems since. Level 8.5 and below zero directory and reload files. ORIGINATOR: Gil Mc Gee/D. Hall CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB140 Pg001 FIB 00141 02/24/89 *** Upgrade Advanced Series to Wide Backplane (22 SLOT) *** This document describes the procedure for upgrading the cpu bus of an Advanced Series system to a 22 slot (wide ) backplane. The wide backplane is used in those cases where the customer's needs take him beyond the typical Advanced Series 62/63 configuration. The wide backplane resides in what is a standard doublewide MPX frame This frame is capable of supporting two MPX power systems.This mainframe willbe referred to here as a "wide backplane module". APPLICABLE DOCUMENTS _____________________ M0132 DMAIII installation guide M8101 9000/9500 series service manual M8207 9400/9600 series service manual M8210 Advanced Series service manual GUIDE LINES ____________ Valid backplane configurations The following guide lines must be adhered to when adding a wide backplane to any system: 1. A wide backplane module may be added to a single mainframe system. 2.A wide backplane module may be added to a two (2) mainframe system. 3.A wide backplane module may NOT be added to a three(3) mainframe system. A three mainframe system must loose one add-on mainframe before a widwe backplane module may be added. PCBAS The following indicates the current maximum number of specific types of PCBAs which may be installed in the wide backplane. NEPII PCBAs (903705) maximum = 3 STACHE II PCBAs.(903707) maximum = 3 4/6/8/Memory (903621-xxx) maximum = 3 ** up to a limit of 24 meg total** DMA I (903544) and/or maximum = 4 DMA III(903679) MCS/M(903718) maximum = 1 MBA (903617) maximum = 1 POWER SYSTEMS THe following guidelines shall be used in regard to the power systems when installing a wide backplane module. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB141 Pg001 A. The LS700s in a wide backplane module will NOT be tied to the ls700(s) in the controller frame(s). The LS700s in the wide backplane module will be bussed (and load shared in PAIRS only.The one or two supplies supporting the controller(shared memory) bus will be tied together. NOTE: the two interconnect bus bars for ground will be connected. B. All protected power supplies (whether there are 3 or 4 ) are to be tied together. C. A system with four(4) power systems may have only three(3) protected power supplies,this is acceptable. The PCBAs which use the protected +5 volts are listed below. 1. Memory PCBA 2. Mcs/M PCBA 3. Mainframe control panel 4. BMTC PCBA 5. DMA III PCBA (very little protected power used here) 6. MBA PCBA ( " " " " " " ) PRE INSTALLATION CHECK ______________________ 1. Adding the wide backplane module to a single or double mainframe system means that two (2) additional outlets be available which meet the same requirement as the original outlets. Adding the wide backplane module to a three (3) frame system means that one (1) additional outlet will be required. 2. Adding the wide backplane module to a single or double mainframe system means that any power conditioning or ups units must handle the additional load of two power systems. Adding the wide backplane to a three mainframe system means that one additional power system will be added to the load. 3. If the system receiving the wide backplane module is currently a single chassis split backplane ensure that the backplane interconnects can be located(they should have been received with the split backplane originally.) If these interconnects cannot be located new ones must be ordered. interconnect A PCBA 903647-001 interconnect B PCBA 903649-001 PROCEDURE __________ IT is assumed that some expansion (i.e. increased number of CPUs or DMAs) precipitates the use of the wide backplane. It is recommended that if the expansion is extensive (i.e. more than one CPU or DMA) at least one week be allowed between the backplane upgrade and the installation of additional PCBAs to verify system stability. ***** CAUTION ************ ** ALWAYS INSURE THAT THE CUSTOMER IS FULLY BACKED UP ******* ** ALWAYS USE PROPER ANTI-STATIC MEASURES ********* CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB141 Pg002 NOTE: There are new bus bar interconnects for use with the wide backplane,they are as follows: +5 volt interconnect ,top of backplane tall cabinet = 916270-001, short =916270-002 Ground interconnect, top of backplane tall cabinet = 916271-001, short =916271-002 Ground interconnect,bottom of backplane tall cabinet =907316-004, short =907316-005 NOTE: There are new longer MBA interconnect cables for use with the wide backplane.There is also a new depopulated version of the MBA for terminating the wide backplane.These part numbers are: MBA/hi speed terminator 903769-001 Cables,MBA to interconnect(7") 916260-002 ADDING TO A THREE MAINFRAME SYSTEM _____________________________________ If there are currently three mainframes on the system the rightmost mainframe MUST BE REMOVED. 1. Remove the MBA PCBA and cables from the right hand mainframe.Remove the cables from the MBA PCBA, they will not be used.Install the long cables(916260-002) on the MBA and place the MBA in the left most slot of the wide backplane module. 2. Disconnect the following. A. Disk sequence cable which may be connected to J10 on the right most LS 700. B. Power supply sequence connecting to J5 and or J6 of the right most LS700. C. Temperature sensor cables to the temperature sensor of the right most frame. D. load sharing cable from J 17 or J16 of the right most LS700. E. Remove the +5 volt bus bar and the two (2) ground bus bars which connect the right most backplane to the adjacent (center ) backplane. F. cable connecting the protected power supply in the center frame. G. Remove the cable connecting J1 on the MCS/M to J 13 on the right most LS700. this cable will be used later. 3. If a DMA III is already present the -5 volt supply must be moved. This is best done by swapping the ACDUs between the mainframe module currently containing the -5 volt supply (in most cases this is the frame that is going to be removed). and the right half ofthe wide backplane module and the frame containing the -5 volt supply. 4. Remove the control panel PCBA (control panel + indicator panel PCBAs if on a short cabinet) from its current location. Reinstall the control panel PCBA on the left side of the wide backpanel module. If separate control and indicator PCBAs; the control panel should be mounted on the right side, ( on the actual side of the frame) of the wide backplane module. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB141 Pg003 5. Remove the four(4) 10-32 x 1 1/2" screws which fasten the right most frame to the system. Slowly pull this frame away until satisfied that no connections exist between this frame and the adjacent frame. As a temporary measure , locate this frame near the wide backplane module and transfer the PCBAs to the wide backplane such as they are in the same order. The terminator from this single frame will NOT be used. The frame which has been removed should be placed in a safe location as it will not be used on this system. 6. Install the wide backplane module as you would install any normal MPX add-on frame.But "DO NOT INSTALL "the load sharing cable or the +5 volt interconnect bus bar between the wide backplane module and the two single mainframes. The two single mainframes will remain bussed as a pair. NOTE: ***When completed , the two LS700s in the wide backplane module will be separate from the other frames. A.Remove the MBA PCBA and the cables from what is now the "center" frame and install at the left of the wide backplane. In place of the MBA which was in the center frame,install a 903199-003 terminator board and cables from the add-on kit. B.Remove the terminator from the right "center" frame and in its place install a 903199-002 0r -005 terminator /extender card from the kit. C. reconnect the MBA using the log cables 916260-002 received in the kit. 7. move the remaining boards which reside on the CPU bus into the wide backplane module. 8. Install the additional CPU ,DMA boards. 9. Reposition the shared memory controllers such that they start at the right most slot of the controller mainframe(s). 10.The LS700s should be balanced at this point. Remember that there are now two sets of LS700s .In regard to the LS700s supporting the wide backplane, The LS700 which on the MCS/M side of the card cage should be set up as the master. 11.Load DEMON. Verify that}i all devices are present and can be acessed . 12.Boot the O.S. and install the new configuration record. Reboot once it is installed. 13.load REMIDI and run two passes of REMIDI at high and low margins. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB141 Pg004 14. If possible arrange to run " COOK" over night. USEFUL PART NUMBERS ___________________ Bus bar Assembly, wide backplane Tall cabinet == 916414-001 Short cabinet == 916251-001 Bus Bar interconnect wide backplane,+5 volts Tall cabinet = 916270-001 Short cabinet = 916270-021 Bus Bar interconnect wide backplane,ground top (connects wide backplane to single backplane) Tall cabinet = 916271-001 Short cabinet= 916271-002 Bus Bar interconnect wide backplane bottom,ground Tall cabinet = 907316-004 Short cabinet = 907316-005 Hi Speed Terminator PCBA 903769-001 (This is a depopulated MBA used for terminating the right hand side of the wide backplane) Cable , MBA to extender PCBA (6 used) 916260-002 these are the longer 7" cables. Interconnect A PCBA 903647-001 Interconnect B PCBA 903649-001 Terminator PCBA 903199-004 * Terminator/extender PCBA 903199-003 * Terminator/extender PCBA 903199-002 or -005 * Flat cable (6 needed) 907174-037 The * items are part of "interconnect kit" 906686-001 Screw 10-32x1 1/2 202015-007 washer #10 2020012-002 keep nut 10-32 214019-008 ADDING TO A SINGLE MAINFRAME SYSTEM CURRENTLY USING SPLIT BACKPLANE In addition to the wide backplane module and parts typically included with an add-on mainframe the following parts will be needed. A. interconnect A PCBA 907647-001 B. interconnect B PCBA 903649-001 These are installed on the split backplane to make it contiguous. These items should have arrived with the original split backplane system. C. Terminator PCBA 903199-004 CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB141 Pg005 The above are unique to the single mainframe configuration. 1. It is assumed that the single mainframe is currently utilizing a split backplane. Prior to attaching the wide backplane module , remove the side panel/cover from the right hand side of the system and do the following. A.Remove top and bottom rear mount terminators from the right hand (CPU) side of the backplane. B. Install backplane interconnects (903647-001 and 903649-001) at the rear-center of the split backplane. Note that interconnect A goes at the TOP and interconnect goes at the BOTTOM.both interconnects are keyed. These interconnects make the split backplane contiguous. Proceed with normal wide backplane install. ORIGINATOR: LEIBOWITZ,WHALEN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB141 Pg006 FIB 00142 02/24/89 *** Loading with a Bad Membrane/Overlay *** If the front panel overlay/membrane switch becomes defective and you need to operate the system in a emergency, you can still get the system running by shorting the following pins to ground. ( this bypasses the membrane switch ) IE: ALT. LOAD, MOMENTARILY SHORT PIN 2 TO PIN 8 This assumes that the actual control panel PCB is not defective. MM896160 - control panel O/S MM896165 - control panel N/S MM896180 - switch, membrane - REAR OF CONTROL PANEL - | | | | ------------------------------------------ | ::: :::::::::::: | | J1 J2 | | | | | | | | | | | | .|- | .|- | J3 .|- --------------- .|- -| PIN 1 | -| 2 | -| 3 | -| 4 | -| 5 | -| 6 | -| 7 | -| PIN 8 | |------------------------------------------------------| ^ ----- (8 Pins that membrane sw. plugs into) PIN 1 = LOAD PIN 2 = ALT. LOAD PIN 3 = SENSE SW. 0 PIN 4 = GROUND PIN 5 = SENSE SW. 1 PIN 6 = SENSE SW. 2 PIN 7 = SENSE SW. 3 PIN 8 = GROUND ORIGINATOR: DICK LOISELLE CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB142 Pg001 FIB 00143 07/27/89 *** Incorrect Memory Err Logging - 8/9/10.6E Errorlog [ WPSF 545 ] *** PROBLEM: When viewing ECC Memory errors on 8/9/10.6E, you may see errors reported in ALL locations even when there is no physical memory in those locations. You may also see locations in the 24 MOST RECENT ERRORS that are not represented in the ERROR COUNTS BY ADDRESS RANGE. Such as: ADDRESSES OF 24 MOST RECENT ERRORS 5E00000 0000000 0000000 0000000 0200000 0000000 0000000 0000000 0000000 0000000 0000000 0000000 0000000 0000000 0000000 0000000 0000000 0000000 0000000 0000000 0000000 0000000 0000000 0000000 ERROR COUNTS BY ADDRESS RANGE 0000000-0200000-0400000-0600000-0800000-0A00000-0C00000-0E00000-1000000 1785 1277 1020 1275 1022 1275 1020 1277 1000000-1200000-1400000-1600000-1800000-1A00000-1C00000-1E00000-2000000 510 1020 1020 765 1020 1275 1275 1020 2000000-2200000-2400000-2600000-2800000-2A00000-2C00000-2E00000-3000000 512 1785 767 765 1020 765 510 767 CAUSE: This is a problem in the way the "8/9/10.6E.SYS.UTLERRORLOG" utility displays the errors. If the errors displayed in the 24 MOST RECENT ERRORS do not correlate with the errors in the ERROR COUNTS BY ADDRESS RANGE, do not replace any memory PCBAs until they are known. FIX: There are three different ways to determine where the correct errors are. Obviously you should first check for any memory PCBAs with amber LEDs lit. The other methods require the use of the "8/9/10.6C.SYS.ERRORLOG" utility program obtained from an 8/9/10.6C OS. 1. Install the "8/9/10.6C.SYS.ERRORLOG" utility on the system. Rename the existing "8/9/10.6E.SYS.ERRORLOG" utility on the system to "8/9/10.6E.SYS.OLDERRORLOG" and then rename the "8/9/10.6C" version to "8/9/10.6E.SYS.ERRORLOG". When the 8/9/10.6C version was used to view the above example, the errors were displayed correctly. In this case they were in the first 0000000-0200000 range. After you find out where the real locations are, RENAME the original "8/9/10.6E.SYS.ERRORLOG" back. NOTE: 8/9/10.6C WILL NOT DISPLAY OTHER ERRORS IN THE ERRORLOG CORRECTLY! 2. Backup the ".ERRLOG." file and put it down on a system that is on the 8/9/10.6C OS level. Rename this file to something like ".ECC." and use this file in the ERRORLOG for the FILE SPECIFIER. When using the n.6C version, a must be inputted to display the other screens of ECC errors. The n.6E version gave you one display with ALL ECC errors. This problem IS fixed in the n.6G version. At that time you can rename the "n.6G.SYS.ERRORLOG" on the "n.6E" and leave it. All errors are displayed correctly. NOTE: There have been instances of CPU cache parity errors logged against CPU 0 when the actual problem was an incorrectly logged memory error. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB143 Pg001 If this procedure does not isolate the problem, check jumpers/switch settings and BMTC per FIBs 122 & 123. ORIGINATOR: D. Luque/N. Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB143 Pg002 FIB 00144 04/17/89 *** General Installation Guide *** The intent of this Field Bulletin is to outline the proper procedure when installing or upgrading MAI BASIC FOUR MPX or ADVANCED SERIES SYSTEMS. The information has been assembled from several other fib's. AT NO TIME SHOULD THESE PROCEDURES BE DEVIATED FROM. IT IS MEANT TO INSURE A SMOOTH UPGRADE AND TO PREVENT EXCESSIVE DOWNTIME TO THE CUSTOMER. AT NO TIME SHALL THE OS LEVEL, ADD-ON HARDWARE AND RECONFIGURATION OF SYSTEM MODEL TYPES BE UPGRADED CONCURRENTLY. PRESITE SURVEY _________________ The FIRST step is to do a PRESITE SURVEY. The survey should be done far enough in advance so things are in place prior to INSTALLATION or UPGRADE. When a system is being upgraded to a different model type, ie., MPx 8xxx to the MPx 9xxx, the goal is for only the CPU's and DMA's to be installed in the final stage. A Presite Survey must be done prior to any conversion to insure proper PCBA LARL's (Lowest Acceptable Revision Levels) (Reference MPx FIB #54 and MPx HANDBOOK FIB #7) NOTE: The term "Add-On Hardware" refers to hardware other than the CPU(s) and DMA(s) Upgrade Kit, such as; BMTC, Memory, ISDC's, Disk drives, etc. The term "Upgrade Kit" refers to the MPx /ADVANCED SERIES CPU(S) and DMA(s). If the OS level is being upgraded between major OS releases, ie., 8.4, 8.5 (including 8.4E), or 8/9.6, along with Add-On hardware and the Upgrade Kit, it should be installed, along with the new System Config- uration Record (SCR), prior to the addition of the Add-On hardware. There are a few cases where the Add-On hardware is dependent on the software such as the 8" 314MB disk drives. These drives require the 8.5C OS level. If the system is going to be upgraded to the MPx 9xxx system with the 9.6 OS level, the 8.6 OS must be installed on the existing system first and run for at least one (1) week. When Add-On hardware, is being added to the system, it will be installed to the existing system prior to installing the Upgrade Kit. When add-on equipment is ordered, a new software config. record must be installed. and run for at least one (1) week to insure correct hardware operation. When the system is ready to be converted from its existing config- uration to the new system, only two (2) to three (3) steps will be required. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB144 Pg001 1. Put down on disk the MPx 9xxx OS/WCS images from the 9.6 OS tape while the system is still an MPx 8xxx system. Update the OS/WCS slot Zero using the MPx 9xxx images. (Refer to the 8/9.6 Software Announcement #148) This will provide a bootable MPx 9xxx slot. An altload from the 9.6 OS tape will perform an update to the OS/WCS image with the MPx 9xxx CPU installed. The aforementioned update to the image is preferred. Always leave slot one with the MPx 8xxx OS/WCS image for at least one (1) week incase there is a need to go back to the 8xxx system. 2. Install the MPx 9xxx Upgrade Kit. 3. After running for at least one (1) week, install the remaining Add-On hardware. (Hardware that could not be installed on the MPx 8xxx system due to OS dependencies or maximum configuration limitations.) HARDWARE UPGRADE STEPS **********CAUTION, DOES CUSTOMER HAVE A COMPLETE BACKUP ********************* When all the correct paper work has been done and the hardware starts coming in, the following steps will be taken to insure a smooth upgrade. 1. Upgrade the system PCBA's to current LARL for support of the add-on equipment and the MPx/ADVANCED SERIES Upgrade Kit. Insure that the PCBA's that will be carried over meet the LARL. to meet the requirements for the add-on equipment If any PCBA's are going to be replaced, ie., 1-16way for 2-8ways, have them installed too. We do not want to replace everything at once along with the add-on equipment. These changes can and should be done as soon as possible. Remember, the Add-On hardware WILL be installed on the existing MPx system (except for the Upgrade Kit) and tested if possible. 2. After the ordered software arrives, install the new OS and SCR. Go through the normal file conversion process if applicable and let the customer run for at least one (1) week on the new OS level. Do not upgrade the software and hardware at the same time. 3. After the customer has run without any software problems, install the supported Add-On hardware. There may be instances that the existing MPx system model will not support all the Add-On hardware. For example, the MPx 8010 system will only support up to 4MB of main memory and the MPx 9530 will support up to 12MB of main menory below 9.6a. Other differences will be the number of terminals and disk support. The voltages in each frame must be checked prior to installing the MPx 9000 Upgrade Kit. Refer to Field information Bulletin 130. If due to the limitations of the existing system, all the Add-On hardware (excluding the Upgrade Kit) cannot be installed, check for duplicate PCBA's. The new PCBA's can be rotated in for the original one(s) that have already been tested. Example: replace four (4) 1MB memory PCBA's with one (1) 4MB memory PCBA. Take out existing 16-way PCBA and install new 16-way PCBA. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB144 Pg002 4. After the system has run in this configuration for at least one (1) week, install the Upgrade Kit. Again, wait at least one (1) week before installing any remaining hardware. 5. Install remaining Add-On hardware that could not be installed in step 3 due to system limitations. REMEMBER: Insure that the Dump Area on disk is the correct size. NEW INSTALLATIONS ________________________________ PRESITE SURVEY Insure that the survey has been done and that the area involved meets the requirements set down in planning guide that was distributed by Product support. Physically check all ac lines for correct wiring,reference the environmental hanbook. Monitor the new circuits with an analyzer if possible. INSTALLATION OF HARDWARE Start at the plug to insure proper and tight connections. check acdu's for loose nuts and crimping. insure all cable connections are tight .(especially molex connectors). Using static protection at ALL times,Examine all PCBA's for: 1. REV.level 2. correct switch settings 3. correct jumper settings 4. loose chips Enter rev levels into system log. Make logic to frame ground checks.refer to environmental handbook for the individual system. At system turnon, check and adjust system / unit power supplies. If needed , install O.S and diagnostic slots /partitions. Run all diagnostics while marginning the voltages high and low. insure that all configured I/O works properly. Check all peripheral ac connections for proper voltage and grounding and logic to ground shorts. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB144 Pg003 Check all terminal type cables for induced noise on the receive line. (WHETHER THEY ARE MAI BASIC FOUR CABLES OR NOT.)Make sure that the cables are plugged into a device or jumper cable if installed on the I/O panel. Make hard copy of diagnostic procedures,fourtuple codes,and software announcement. make diagnostic tapes to keep on site. If anything is missing or broken report it in your installation report. and advise " Customer Satisfaction " . ORIGINATOR: J WHALEN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB144 Pg004 FIB 00145 04/17/89 *** General Upgrade & Installation Flow Chart *** THIS IS A GENERAL FLOW CHART TO HELP YOU THROUGH UPGRADES AND INSTALLS UPGRADE OR INSTALL FLOW CHART IS this an Upgrade or Install? UPGRADE INSTALL _________ ___________ "A" "B" "A" _________________________ | | |Is Presite counseling | __________\|and inspection complete? | | /|_________________________| |NO | |_____________________| YES _____________|____________ SPX_________| SPX or MPX | _____MPX_____ | |__________________________| | | | | | | _______________________________ | |Is present hardware up to | "C" NO____________|Rev. level for intended upgrade| | |_______________________________| | | _______________________ |YES | order necessary | | | hardware & install |____________\| |_______________________| /| | _______________________________ |Do you require a software level| YES__________| change? | | |_______________________________| | | order & install | NO |_____________________\| /| | ________________________________ | Do you require a configuration | YES______|record? | | |________________________________| | | | | No order & install_____________________\| /| _____________________________________ | | | Install upgrade kit using | | instructions for the specific | | machine type. | |____________________________________| CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB145 Pg001 "B" SPX OR MPX ____________ INSTALL ____________ | _____________________________\| | /| | _________________|_____________ | | Has Presite counseling | NO___________| been completed? | |_______________________________| | | YES ______________________________ | | | ______________________________\/___ | | Inspect site prior to install | | | for correct wiring & environment |______Not OK__ | | | | | | refer to site planning guide & | | | | Environmental Handbook | __________________ | | | | correct problems |___| | if there are any questions | |__________________| | contact a specialist!!! | |___________________________________| | | OK ____________________|___________________ | | ********** | CAUTION : USE STATIC PROTECTION | ******************** | AT ALL TIMES | |_______________________________________| | | | | _______________________________________ | Stage System | | Starting at the AC plug, check all | ____NOT OK___ | wire and cable connections (ACDUs, | | | P/S, backplanes, etc.) | | |_______________________________________| _______|__________ | | tighten, repair | . | | or replace | | |__________________| |OK | |/__________________________________| |\ ______________________________________________ | Check PCBA'S for: Rev. Level | | Switch and jumper settings | | loose chips | |______________________________________________| | | (continued on next page) CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB145 Pg002 Enter Rev. Levels into system log | | ___________________________________ | | | Make logic to frame ground checks | | in CPU & peripheral devices | | | | refer to environmental handbook | |___________________________________| | | ___________________________________ | At turnon, check & adjust | | system power supplies | |___________________________________| | | ___________________________________ | If needed, install O.S. & | | diagnostic slots. | |___________________________________| | | _____________________________________ | Run all diagnostics while marginning| |voltages high and low. | Failures?____ |_____________________________________| | | | | __________________ |/_____________________| correct problem | |\ |__________________| _____________________________________ | check all peripheral AC receptacles | | for proper voltage and grounding |__NOT OK______ |_____________________________________| | | ___________|_______ |/_____________________| correct problem | |\ |___________________| ___________________|___________________ | Check all serial device cables for | | induced noise.(rxd to grnd at CPU) | | using oscilloscope.(max level= 2V P/P)| |_______________________________________| | | ************** CABLES MUST BE TERMINATED BY A DEVICE OR JUMPER PLUG ********* WHEN CONNECTED TO THE I/O PANEL. ** MAKE COPIES OF FOURTUPLE CODES, DEMON AND REMIDI TESTS USING DOCWRITER AND ERRORS.LIST. ** MAKE DIAGNOSTIC BOOT TAPES AND KEEP ON SITE. ** ENTER ALL PERTINENT INFORMATION INTO THE SYSTEM LOG FOR FUTURE REFERENCE. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB145 Pg003 "C" _____________ SPX UPGRADE _____________ | _____________|____________ |Is present hardware up to | |REv. level |______NO_____ |__________________________| | | __________|____________ | order and install | YES hardware. run for 1 week | _______________________ | | |/________________________| |\ ___________________|___________________ | Do you have all hardware necessary | | to complete the upgrade?? |____NO_______ |_______________________________________| | | ___________|________ |YES | order from customer | |/____________________| satisfaction | |\ |_____________________| ___________________|___________________ | Is the software at the correct level | |for the upgrade? |______NO________ |_______________________________________| | | ___________|________ YES |/_______________________| order and install | |\ | run for 1 week | | |____________________| | ____________|__________ | Add Upgrade | |______________________| | | __________|____________________ | Using available diagnostics | | test system while marginning | | voltages. | |_______________________________| **********REMEMBER USE STATIC PROTECTION AT ALL TIMES ****************** NOTES _________ 1. Check all serial device cables for induced noise between Rxd and ground .Maximum level is 2v p/p. 2.When adding new peripheral devices or changing its location, check local AC outlet for proper grounding. ORIGINATOR: J WHALEN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB145 Pg004 FIB 00146 04/18/89 *** DMA III PCBA P/N 903679 CRC vs ECC format options [WPS 530] *** With the introduction of DMA III PCBA, P/N 903679, (supported on OS level 9/10.6E and above) there is now the ability to choose between CRC or ECC formatting. If a customer wants better data reliability, he may choose to reformat the disks to use ECC. The fixed disk drives that are supported on the DMA III and have this ability are the P314 and the F621 disks. The DMA III controller is supported on the MPx 9x00 and the Advanced Series systems. CRC (Cyclic Redundancy Check) is a 2 byte checksum written at the end of both the header and data fields of each sector. Its sole purpose is to determine if the data read back is correct or not. If a CRC error occurs, the only hope in obtaining correct data is to retry reads until no error occurs. Failing this, a disk error is reported and the I/O is aborted. ECC (Error Correcting Code) is a complex algorithm which writes 7 extra bytes at the end of each sector. ECC does not decrease the usable space of the disk, each sector remains 1024 bytes. It has an advantage over CRC in that, if only a few bits are wrong, the extra bytes contain enough information to correct errors up to 11 bits in length. If the error is uncorrectable, an ECC error is reported and the I/O is aborted. The DMA III controller automatically detects the format type of the drive. ECC format CANNOT be read on any other controller. The F621 requires the DMA III for operation but the P314 is also supported on the TDP and the DMA I PCBA's. If for some reason a downgrade must be performed, the P314 must be backed up and the drive reformatted to CRC. It is possible to do a disk to disk copy where the format types may be mixed. Disk format type (CRC/ECC) can be determined by using NEWX. NEWX disk test will display the format type of the disk. The ERRORLOG will display an ECC format by setting bit 30 of the Status Word. The Status Word bit meanings can be viewed by inputting "!ERR 128,0,0,0" on a VDT. ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB146 Pg001 FIB 00147 05/02/89 *** LS 700 Wire Harness Interference *** The fan cable harness sometimes loosens and interferes with the fan blades causing various problems . check your systems and clip existing wire wraps.lower cable and retie. The routing of the harness cable has been changed by manufacturing to include this. ORIGINATOR: J WHALEN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB147 Pg001 FIB 00148 05/09/89 *** Dumps 1,255,255,6 (ESTK failures) caused by ripple on LS-700 P/S. *** SYMPTOM/TEXT: A 9510 System with 2 16-ways, 2 DMA's, BMTC & 5MB Memory which was just upgraded from an 8020 dumped with a four-tuple of 1,255,255,6 anytime the system was loaded with RSTK enabled. This dump occured during initialization of terminals or shortly after and the red parity LED on the ESTK pcba was on. The CPU set was replaced twice with similar results. If one of the 16-ways or the BMTC was removed the system would complete the load and run cook (in one instance the same dump appeared after running cook for some time with the BMTC removed). The System loaded and ran with all hardware installed and the RSTK option.disabled. FIX: During the upgrade to a 9510 a second CPU Frame was added. When balancing the 5 volts in accordance with FIB #130 it was noted that the new frame shutdown when.set above 5.15 volts but the frames did appear to be balanced and all voltages metered okay with a DVM. All voltages were checked for ripple with a scope, both the 5 volt and 12 volt lines from the LS-700 in the new frame had a 1 volt ripple pp on them. The LS-700 was replaced and all failures ceased. ORIGINATOR: Barry Matthews CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB148 Pg001 FIB 00149 05/12/89 *** SCSI M280 Drives Display Incorrect # of Total Sectors [ WPSF 535R ] *** SYMPTOM: SCSI M280, 5 1/4 inch disk drives, may display different total sectors between like drives. CAUSE: This difference has been noticed between SCSI disk drives formatted on the 9.6C OS level of DIVE versus the 9.6E OS level. This does not cause any operational problems. The 250MB fixed disk drive has a Raw Formatted capacity of 263MB. The Functional Capacity (Raw Format less Relocated and Diagnostic area) is 260MB. User usable area will be less depending upon disk configuration (Data/System) and file system overhead. The correct display for this drive, set up as a DATA disk with a minimum dump area of 826 x 1024, should be 253406 sectors in type 3 load. The VID (Volume Information Display) screen display in DIVE should indicate 254425 usable sectors. See attached VID screen display. FIX: Prior to reformatting the disk drive with DIVE from the 9.6E OS tape or above (altload from tape), a FILE BY FILE BACKUP MUST BE DONE FIRST. A Fault Map listing for the drive being formatted and the VID screen information for the M280 (XT-3280) must be on hand for reference. The VID information and DIVE operator instructions can be found in the 9.6E DOCWRITER under DIVE. If you do not have 9.6E at the site, a Boot Tape can be made from another location that is on 9.6E. A Boot Tape requires that the first file on tape (for MPx 9x00) is .R6E15.INST. OSN.AT for a 1/2 inch tape unit, or .R6E15.INST.OSN.AC for a 1/4 inch unit. No other files are required. Once in DIVE, at the VID screen, compare the changeable (*) figures against the printed VID screen display from the 9.6E DOCWRITER. Make the appropriate changes. Some of the unchangeable (#) figures will not change until after the format has completed. A listing of the drive fault map will display. Insure that the OEM faults are included. FIGURE #1 M280 VID SCREEN A. SCSI DISK DRIVE (M280) Unit Number: 32 Device Type: 10 Variance: 32 ID Revision: 8.7.10.1 Date Written: Time Written: Disk Name: *????????? Vendor ID: #MBF-DISK Product ID: #XT-3280 Product Rev.: 42343032 Num of Cylinders: *1224 Descriptor Fields: #5 12 0 15 14 1223 13 0 Number of Heads : *15 Fmt Sector Cap. : 257040 Blocks per Track: *14 Last Track Sec. 0: 254397 Bytes per Block : *1024 Usable Sectors : 254425 Raw Block Cap. : #257040 Usable Blocks :#254426 Mode Sense/Select Pages: #580 Drive Mode Page 1: 2500 OS Default: 2500 CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB149 Pg001 Format Gap 1:#0 Gap 2: #0 Step Rate/2-Byte : #92 Interleave : #1 Write Precomp Cylinder : #0 Number of Tracks per Zone : *15 Landing Zone Cylinder : #0 Alternate Tracks per Zone : *0 Reduced Write Curnt Cyl: #0 Alternate Sectors per Zone : *2 Verify-by-Bytes : #F Alternate Tracks per Volume : #2 SCSI Commands: D9B0273E04B101180000000000000000000000000000000000000000 NOTE: * = Changeable Fields # = Not Changeable for This Drive Type ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB149 Pg002 FIB 00150 05/12/89 *** Excessive Tape Errs in ERRORLOG - Status 80000204 [ WPSF 539 ] *** PROBLEM: Excessive Magnetic Tape Unit errors (R* in the ERRORLOG option) are displayed in the ERRORLOG, with the Hardware Status Word 80000204. CAUSE: This is a problem seen only on the MPx 94xx (SCSI) systems, using the Magnetic Tape Cartridge Streamer (MTCS) supported on the DMA II PCBA. Error codes are different for SCSI devices supported by the DMA II PCBA used in the MPx 94xx system. The SCSI disk and tape units have different error meanings than those displayed by other DMA controllers. (Please see Field Bulletin #504) The Sense Key (02) in this Hardware Status Word indicates that the "Device is Not Ready". The Mag Tape Service Module interrogates the tape unit for its status. If the tape unit is rewinding or the door is open, this status is reported to the system and is logged as an ERROR when, in fact it's NOT ! FIX: This error in the ERRORLOG should be ignored. It is corrected in the 9.6G OS level. If the unit has encountered a Hard Error, it will be reported during the Saverestore process as a 'Hard Error' at which point you will exit the process on the next . When the error occurred, the MTCS went through its error routine by spacing the tape forward looking for good media. Have the customer clean the tape head using the tape cleaning cartridge (P/N 750012-001) and try again. If the error happens again, another tape should be used. If it still fails, then the unit and/or the SCSI Bus cable should be swapped out. ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB150 Pg001 FIB 00152 06/21/89 *** Bad Chips on Stache *** Possible system dumps may occur with fourtuple of 1,x,y,51 . there is no available text. A slower IC was installed by mistake on the stache board p/n 903707.The 74f280-B IC (p/n 168000-018) was mistakenly replaced with 74f280-A check the following locations on the stache board. 1A,1B,1H,1K,1M,1Q,1V,1X,1Z,1BB,3D,3E,4D,THRU 4F,5F,5R,,5S1, 5S2,5T,6C,6B2,7E,8E,8U,THRU 8X. If an ADVANCED SYSTEM should have ANY dumnps. check this board. All spares need to be checked. System boards.should be checked and replaced if needed on next call. ORIGINATOR: D. Luque/J. Whalen CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB152 Pg001 FIB 00153 06/12/89 *** Info - New Style/Old Style Power Adapter for MPx 7000 *** The power adapter PCB part no. 903508-001 / MM897035 has been modified. The original part has 2 connectors, J1 and P1. Both were molex plugs. On the High-Boy this PCB mounted on J14 of the backplane. The new style has 1 molex plug (J1) and 1 wire harnessed side (P1). This mounts on the +5V bus bar and then plugs into J14 on the backplane. NOTE: The new style can be used on both systems. The old style will not fit on the Low-Boy. The old style should have been purged from stock. ORIGINATOR: S.THOMPSON CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB153 Pg001 FIB 00154 06/21/89 *** MPx Checkist *** When working on persistent,unexplained or highly intermittent problems, we sometimes forget the basics This CHECKLIST is meant to cover those type of problems. If you have a question or want to add to this list , please advise. 1.Check the system voltages with an oscilloscope as well as a D.V.M. . 2.Check system grounding according to the Environmental Handbook. 3.Reseat PC boards,reseat chips on the boards. 4.Check foreplane connectors visually for pin damage and solder flow problems. 5.Check cables for: a.fraying b.tight fit c.female connectors can spread d.male connectors pins can get pushed back or broken or bent. 6.I/O cable connections, remove unterminated I/O cables check all serial cables for induced noise on the receive pin max= 2.0 vpp. 7.Listen for unusual sounds. a.extra noisy fans b.noisy drives c.power supply buzzing or squealing. (indicates an imbalance or the loss of a paralleled supply). 8.Check log to see if the problem relates to any change in the system configuration a.hardware change b.software OS change c.Applications software change ORIGINATOR: J. Whalen CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB154 Pg001 FIB 00155 06/26/89 *** Bad Math on BASIC, Using Masks. *** SYMPTOM/TEXT: An 8020 system printed wrong quantities when using masks. IE: print 1234.56:"####00.00" > 12.35 FIX: The system parameters for numeric notation were set for the European standard. In the European standard, the period and the comma are reversed. ORIGINATOR: Pat Salcedo CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB155 Pg001 FIB 00156 07/17/89 *** 8/9.E Errorlog Problem *** DATE: 07/17/89 TITLE: 8/9.E Errorlog Problem In the ERRORLOG for OS Level 8/9.6E there is a bug in reporting the correct Disk Area of a Disk hardware error. When listing a SUMMARY of all errors (or the Drive individually) it will list the Disk Area of the error always as SM (Segment Manager Shadow Area). It will never list FS( File System Area). But when you ask for a detailed report the FIRST error for a drive will be in the SM area and every subsequent error will be correct (whether the error resides in SM,FS,TS,RT or DA). If there is a question as to what area of the disk the error is in the best way to find out is to do a detailed report of the failing drive. The first error the ERRORLOG reports will be invalid for the Disk Area (all other information should be correct) but every error following the first IF ll be correct. These are examples from an ERRORLOG under OS Level 9.6E: ERRORLOG Summary Report --------------------------------------------------------------------------- Rec Err Err Unit Dev I/O Volume Sector/ Disk # Date Time # Name Status Operation Ser # Hd Cyl Sc Area -------------------------------------------------------------------------- 6 06/22/89 03:35 17 D1 80080000 Normal Read 8509833 1 1377 1 SM 7 06/23/89 03:26 17 D1 80080000 Normal Read 8509833 9 702 17 SM 31 06/24/89 03:27 17 D1 80080000 Normal Read 8509833 9 702 17 SM 32 06/27/89 12:31 17 D1 80080000 Normal Read 8509833 4 1148 15 SM ERRORLOG Detailed Report of same errors as above: (note the difference in Disk Area) --------------------------------------------------------------------------- Rec Err Err Unit Dev I/O Volum Sector/ Disk # Date Time # Name Status Operation Ser # Hd Cyl Sec Area -------------------------------------------------------------------------- 6 06/22/89 03:35 17 D1 80080000 Normal Read 8509833 1 1377 1 SM Retries=2 Retry Count=2 Device Type=Disk F P314 314MB Sector: 272665 STATUS: Error Abort, Data CRC/ECC Err IOCB: 10110000 0D610001 00496070 00000400 80080000 0202007C 00125C1C OACA01D4 00000004 00080000 22008000 110B1200 00000088 0081D989 00000000 00000000 --------------------------------------------------------------------------- 7 06/23/89 03:26 17 D1 80080000 Normal Read 8509883 9 702 17 FS Retries=2 Retry Count =2 Device Type=Disk F P314 314MB Sector=139175 STATUS: Error Abort, Data CRC/ECC Err IOCB: 10110000 4ABE0011 0042AE90 00000000 80080000 0202007C 0010ABA4 0137013C 00000004 00080000 12718000 11AC1200 00000088 0081D989 00000000 00000000 -------------------------------------------------------------------------- 9 06/24/89 03:27 17 D1 80080000 Normal Read 8509883 9 702 17 FS Retries=2 Retry Count=2 Device Type=Disk F P314 314MB Sector=139175 STATUS: Error Abort, Data CRC/ECC Err CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB156 Pg001 IOCB: 10110000 4ABE0011 00357930 00000000 80080000 0202007C 000D5E4C 07610220 00000004 00080000 0D558000 11521200 00000088 0081D989 00000000 00000000 ----- THIS PROBLEM HAS BEEN FIXED ON LEVEL 9.6G ----- ORIGINATOR: Kim Yaworsky CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB156 Pg002 FIB 00157 07/18/89 *** Check Batteries when checking Power Supplies *** When checking power supplies on an MPx system the batteries and the charger on the Protected Power Supply should also be checked. This is very simple and quick to do. (1) Press and hold SW1 (BATT INT) to disengage charger from battery. (2) Measure output of battery at +21VDC between TP1 (BAT) and TP3 (GND). If the voltage is not there or if it discharges rapidly then the battery should be replaced. (3) Measure output of battery charger between TP2 (CHGR) and TP3 (GND). Adjust R10 for +21VDC. If it cannot adjust to 21VDC then the PPS must be changed. Dead batteries on MPX systems have been known to cause flaky and intermittent problems. It should be standard maintenance procedure when checking voltages to also check the batteries. ORIGINATOR: Kim Yaworsky CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB157 Pg001 FIB 00158 11/11/92 *** Advanced Series 20 Model 21 Configuration & Spare Parts Matrix *** CONFIGURATION MATRIX MIN MAX CHASSIS 1 1 HIGH SPEED SLOTS 4 4 LOW SPEED SLOTS 4 4 CPU 1 1 MEMORY 4MB 12MB DISK DRIVES: CAPACITY 364MB 1.4GB DMAII CONT. 1 1 NUMBER OF DRIVES 1 2 DRIVE TYPES 364 0R 690MB 250,364,690MB TAPE DRIVES NUMBER OF DRIVES 1 2 * DRIVE TYPES 120MB 1/4"MCS 120MB 1/4"MCS 1/2"MTS,1/2"GCR 1/2"MTS,1/2GCR LOW SPEED SLOT CONT. OPTIONS 0 4 16WAY 0 3 LAN 0 1 BMTC 0 1 IMLC 0 2 SERIAL PORTS ** 4 52 TERMINALS 1 52 SERIAL PRINTERS 0 51 PARALLEL PRINTER PORTS 2 2 * MAXIMUM IS ONE 1/4" AND ONE 1/2" TAPE DRIVES. ** MAXIMUM PORTS CAN BE REDUCED BY ADDITION OF BMTC,IMLC AND LAN CONTROLLERS. In the base cabinet ,three of the four high-speed slots are used by the MCS/M,THE CPU,and the DMAII. This leaves one high-speed slot open for the addition of memory and four low-speed slots for the selection of 16 ways, BMTC, IMLC, LAN. UNIQUE SPARE PARTS FOR AS-21 MM Part Number MBF Part Number Description MM295100 400758-001 5 1/4 380 MB SCSI Disk CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB158 Pg001 MM295200 400758-002 5 1/4 760 MB SCSI Disk MM650036 400716-004 tape drive 125MB 1/2 H SCSI MM650051 400788-001 1/4" Tape enclosure (P/S, etc.) MM892630 903770-001 PCBA Backplane AS-20 MM892690 916432-001 DMAII cable MM892735 916431-001 cable, SCSI internal MM892745 916420-001 BUSS bar aS/20 MM892750 916430-001 BUSS bar assy. MM892755 304000-001 SCSI Terminator MM892780 916443-001 cable, SCSI external ORIGINATOR: John Whalen MODIFIED BY: Norm Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB158 Pg002 FIB 00159 07/26/89 *** Part Number for Batteries in Protected P/S *** SYMPTOM/TEXT: In reference to FIB #157, thsese batteries are field replacable and can be ordered using P/N MM892090/183003-001. FIX: ORIGINATOR: John Tank CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB159 Pg001 FIB 00160 07/27/89 *** Problems Formatting 5-1/4" Drives on 7xxx Systems [ WPSF 546 ] *** This Field Bulletin covers two possible problems that you may encounter while formatting a 5 1/4 inch disk drive supported on the MPC controller. The MPC controller is used in the MPx 7000/7100 series systems. This is NOT a problem with 5 1/4 inch SCSI drives supported off the DMA-II PCBA. 1. DIVE vs 5-1/4 DISK ON MPC (RAW) PROBLEM: At format, the drive will re-zero about every 10 seconds and not format. CAUSE: If you receive a 5-1/4 inch (ST506), MPC supported disk, as a spare or replacement (not in a system shipment/add-on/C-kit), it may not be formatted. If there is not an Alttrack Listing from DIVE with the disk, most likely, it will be in RAW format. FIX: If this is the case, you will need to format the disk on an SPx system first before it can be formatted with DIVE on the MPx. Not doing so, the drive will re-zero about every 10 seconds and not format. (There may be some chance that the drive will format on an MPx first, but time will be lost if not!). With the release of the 8/9/10.6G OS level, the DIVE version will be able to format the RAW disk without the need to format on the SPx first. 2. DIVE VS 5-1/4 DISK, ERR 88000000, SEEK ERROR PROBLEM: When a 5-1/4 inch, MPC supported disk drive is formatted the first time with DIVE (after format on SPx, the error "DISK STATUS 88000000 ERROR ABORT, SEEK ERROR/THIS TRACK WILL BE RE-LOCATED" may occur. CAUSE: This problem occurs when the disk drive is formatted for the first time. Extra bytes were trying to be written at the end of disk and are being reported as a Seek Error. FIX: Let DIVE continue. The first pass will flag this area as Bad in the relocated track area. The next pass at this location will also report it as Bad, the area was already flagged as Bad from the previous pass so no action will take place. With the release of the 8/9/10.6G OS level, this too is fixed. NOTE: Areas that are flagged a Bad in the Relocated Track Area ARE NOT assigned relocated tracks. ORIGINATOR: D. Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB160 Pg001 FIB 00161 08/01/89 *** SMDI and SMDII Differences [ WPSF 547 ] *** This field bulletin is directed to clarify the differences between the SMDI (PN's 903531 and 903591) and the SMDII (PN 903633) PCBAs. Each PCBA supports two P314 fixed disk drives. The SMDI/II PCBA converts the TDP/DMA Bus signals (50-pin) and Radial to SMD Bus signals (60-pin, multi color) and Radial. SMDI: The name SMDI means Storage Media Device (SMD) Interface. This PCBA was released to interface the 8-inch P314 SMD fixed disk drive to our existing controllers, TDP, DMA-1. The "I" was not intended to mean 1 (one). The SMDI supports two P314 disk drives, each disk must have a unique drive ID of zero (0) or one (1) relative to the Radial cable port being used. The drives will be Bused from the TDP/DMA-1 to the SMDI (J1). (NOTE: TDP supports 2 disks/ the DMA-1 supports 4 disks). The Bus data goes through the SMDI and out J7 to the first drive (D0). If there are two drives, the SMD Bus cable will then continue out of the first drive (D0) to the second (D1) drive. The drive at the end of the Bus cable will will have the Bus terminating packs. Drives other than the terminating drive will have these Bus terminating packs removed. The DMA-1 PCBA can support 4 disk drives. When two SMDI PCBAs are used on one DMA-1 PCBA (for a total of 3 to 4 drives) each disk drive must have a unique drive ID of Zero (0), one (1) on the first SMDI PCBA; two (2) and three (3) on the second SMDI PCBA, relative to the Radial cable being used. The two SMDI PCBAs will be Bused together with the terminators installed on the end SMDI PCBA only (R1, R2, and R3). See figure #1. Pin #1 (black dot) on the terminator pack is installed so the dot is towards pin # 50 of the Bus cable (to the left). See figure #4. ........................................................................... ____ ____ _____ _____ T| D1 |<--B--| D0 |<-B---J7| SMD |J1<--------B-| TDP | LEGEND | ID |<--+ | ID |<-R0--J6| I |J3<--------R0| or | ------- | 1 | | | 0 | +--J5| |J4<--------R1| DMA | B=Bus cable |____| | |____| | |_____| |-----| Rn=Radial cable # | | J2 +----R2| DMA | Dn=Drive # +---R1------+ | | +--R3| | T=Terminator B | | |_____| ID=Drive address | | | n switch setting +-------+ | | | | | ____ ____ _____ | | | T| D3 |<--B--| D2 |<-B---J7| SMD |J1<-+ | | | ID |<--+ | ID |<-R2--J6| I |J3<---+ | | 3 | | | 2 | +--J5| T |J4<-----+ |____| | |____| | |_____| | | +---R3------+ FIGURE #1 TWO SMDI PCBAs WITH 2/4 DRIVES ............................................................................ CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB161 Pg001 ALL-IN-ALL the SMDI passes the Bus and Radial information to the drive without being ID sensitive, that's why the drives must have unique, Radial cable relative ID's. In fact, you could swap Radial cable drive 0 (J3 in, J6 out) with Radial cable drive 1 (J4 in, J5 out) as long as the respective drive ID corresponds with the Radial cable being used (they are passive radial channels, not ID sensitive). Though this is not the standard cabling scheme, it could be used for troubleshooting to determine possible defective SMDI radial port. JUMPERS: There are eight sets of jumpers, 0 through 7, used for time delay. There must be one jumper installed (if not, drives may fail to spin-up), each set of jumpers equals 10 seconds. Jumper set 0 is 10 seconds delay, set 1 is 20 seconds, set 7 is 80 seconds. This delay is for both drives. ----------------------------------------------------------------------------- SMDII: The name SMDII came from SMDI, as a means to differentiate between the two. The SMDII PCBA is required in the MPx 7100/9600 system, for the P314 disk drive, to interface to that version of the disk indicator panel. The SMDII supports two P314 disk drives, each disk must have an ID of zero (0). Each disk will have its own SMD Bus cable from the SMDII (not daisy chained) and each disk will be terminated at the disk drive. The DMA-1 PCBA can support 4 disk drives. When two SMDII's are used on one DMA-1 PCBA (for a total of 3 to 4 disk drives) each disk drive will have an address of zero (0). The two SMDII's will be Bused together with the Bus terminators (R56, R57, R58) installed on the end SMDII PCBA only. See figure #2. Pin #1 on the terminator pack (black dot) is installed so the dot is towards pin #1 of the Bus cable (to the right). See figure 4. _____ +----B----------J8| | ____ | ____ | | _____ T| D1 |<-+ T| D0 |<-B---J7| SMD |J1<--------B-| TDP | LEGEND | ID |<--+ | ID |<-R0--J6| II |J3<--------R0| or | ------- | 0 | | | 0 | +--J5| |J4<--------R1| DMA | B=Bus cable |____| | |____| | |_____| |-----| Rn=Radial cable # | | J2 +----R2| DMA | Dn=Drive # +---R1------+ | | +--R3| | T=Terminator B | | |_____| ID=Drive address | | | n switch setting +-------+ | | _____ | | | +----B----------J8| | | | | ____ | ____ | | | | | T| D3 |<-+ T| D2 |<-B---J7| SMD |J1<-+ | | | ID |<--+ | ID |<-R2--J6| II |J3<---+ | | 0 | | | 0 | +--J5| T |J4<-----+ |____| | |____| | |_____| | | +---R3------+ FIGURE #2 TWO SMDII PCBAs WITH 2/4 DRIVES ............................................................................ CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB161 Pg002 ALL-IN-ALL the SMDII monitors the Bus for the drive ID's attached to it (drives 0/1 or 2/3). The Radial cables must be on their proper Radial port on the SMDII (J3 in/J6 out or J4 in/J5 out) to correspond to its relative Bus cable connection (J7 or J8). For troubleshooting, since all the drives are addressed zero (0). you can remove the Bus/Radial cable from the suspected bad drive and attach the cables to the other drive. Then test, if that drive also appears bad then the SMDII would be suspect. To test in the other direction, you could put the suspected bad drive on the good drive's Bus/Radial cables and test. Don't forget that the problem could also be the Disk Controller (TDP/DMA) or the Bus/Radial cables from the controller to the SMDII. JUMPERS: Two groups of jumper posts (JP2 and JP3) control disk sequencing time delay. A delay jumper must be installed on one pair of posts in each group. The posts are numbered as shown below and the corresponding delay is indicated. These delays are accurate to +/- 20%. TIME DELAY ---------- JP2 = Drive 0 0 = No time delay (as shipped) JP3 = Drive 1 30 = 30 seconds 60 = 60 seconds Jumper JP1 is drive address select for the drives that will be connected to the SMDII PCBA. JP1 has three (3) posts of which two (2) will be jumpered to indicate which set of drive numbers will be used on that SMDII PCBA. Selections are Drives 0-1 or Drives 2-3. Drives 0-1 __ \ JP1 |<>|<>| \___ Drives 2-3 FIGURE #3 SMDII DRIVE ADDRESS SELECT JUMPER ............................................................................ Refer to Field Bulletins 358A and 367 (and FIB 91) for added information. (continued on next page) CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB161 Pg003 _____________________________ _____________________________ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SMDI | | SMDII | | | | | | ________ | | ::::::::::::::::::: :::::: | | |________| | | ___________________ to proceed after each err) Error 80100331 Volume ID read (4) >> Error 80100331 Volume ID read (7) >> Error 80100331 SCSI Read Capacity result >> 3) A VID screen will display. Insure the '*' values are the same as those values in the 9.6E DOCWRITER -DIVE- section. 4) Enter Volume (disk) serial number. (If not already there) 5) ALTTRACK listing will display. Make corrections if needed. (NOTE: There are some instances where an Alttrack listing is not presented, i.e., a previous format attempt did not complete) 6) "Do you want to format drive Y/N ", If all is OK enter Y(es). 7) "Enter number of patterns for certify phase (1...9)", enter number. 8) Prompt "Dive is about to format your entire disk, >>>>> Are you READY?? (Y/N=QUIT)?" 9) If YES is selected, the drive will be formatted. The format process takes one pass of the drive, this is where the TRACK/SECTOR headers are written. At the end of this pass you will be notified that "Format is complete: Time nnnnnn". Other information will also be displayed. It will then proceed (without need for input) with the Certification phases. 10) "Certifying usable disk area: Drive n: Writting Pattern # n : Logical Sector number : nnnn Elapsed Time: nn:nn:nn: Drive n: Verifying Pattern #n : Logical Sector number : nnnn" CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB168 Pg001 Once the Certifying phase is complete, the "DIVE Volume ID Display/Set-up" will appear on the screen with the prompt: 11) "ENTRIES CORRECT-- Shall we proceed to write Volume ID (Y/N/Q(uit))" You MUST enter 'Y', failure to do so will require you to run DIVE again to get to this point again. This is the last step. You may get an error displayed (flashed) at the top of the screen. You may also get: "Non-Fatal Error trying to Enable disk -> 3.7.30.1" then the prompt: "ALL DONE !!!!!". This is OK, these error messages depends on the condition of the disk prior to formatting. ALL DONE means it has completed. 12) A Type 3 load will now be required to set the disk personality (System/Data/Backup). ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB168 Pg002 FIB 00169 10/26/89 *** Dumps, Mem Timeouts, Notes on NEP,STACHE, Mem PCBAs [ WPSF 558 ] *** ADVANCED SERIES STACHE PCBA 903707 System dumps may occur with the Four-Tuple of 1,X,Y,51. There is No Text Available For This Four-Tuple. A slower IC was inadvertently installed on the STACHE PCBA (P/N 903707). The 74F280-B IC (HS PARITY GENERATOR/CHECKER P/N 168000-018) was mistakenly replaced with 74F280-A IC (P/N 168000- 005). This slower IC (-A) should be checked at the following locations on the STACHE PCBA: 1A, 1B, 1H, 1K, 1M, 1Q, 1V, 1X, 1Z, 1BB, 3D, 3E, 4D thru 4F, 5F, 5R, 5S1, 5S2, 5T, 6C, 6B2, 7E, 8E, 8U thru 8X. If an Advanced Series 60 system should have any dumps, it is advised to check the IC's at these locations even if the dump is not 1,x,y,51. All STACHE PCBA's, spares too, need to be checked. Good spares should be reserved for systems dumping with the 1,x,y,51 Four-Tuple. Others should be replaced ASAP but not in a manner to deplete stocks from the first pass. (Even if there is only one IC out of the many locations, it still needs to be replaced). Replacement STACHE PCBA's should be replaced through your normal routine. HIGH SPEED ECC MEMORIES (903621) It is recommended that ALL versions (-001 thru -008) of this memory PCBA be at revision 'N'. In fully populated MPx 9000 systems (more than 30 PCBA's) most likely will have problems due to backplane loading. Advanced Series systems too are likly to have problems with Memory Timeouts if memory boards are not a revision 'N' or above. All non-N revisions should be replaced. ADVANCED SERIES NEP PCBA 903705 Added testing of the NEP PCBA has been implemented in the 10.6G REMIDI level. This REMIDI level, when running at HIGH V-Margins (+5v) has caught some marginal NEP PCBA's. It is suggested that this level of REMIDI is used when troubleshooting Advanced Series system problems. A REMIDI boot tape can be made and used from systems that have the .DIAG. node on 10.6G. ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB169 Pg001 FIB 00170 10/26/89 *** LEDs On During System Start-up [ WPSF 562 ] *** There are a few circumstances that cause Red LED's to turn ON during the first power up of the system from a 'Cold Start'. A Cold Start occurs when the ACDU(s) are turned ON after being in an OFF state. When the system is loaded after a Cold Start, all memory locations are tested during selftest. During a Normal load or a Power Fail, when the system is coming up, is known as a Warm Start. A Warm Start occurs when the Control Panel Key is turned ON after it has been loaded once. Provided that the Load or Alt Load has not been depressed, certain locations in memory are preserved, so during initial selftest these areas are not destroyed and the system can return where it left off. RED LED'S WITH DMA2 IN SYSTEM (MPx 9x00) When power is first applied to the system from a Cold Start, Red LED's may turn ON the DMA2 and Memories. This problem may occur with Multi-CPU systems with the DMA2 controller. It ONLY happens after a Cold Start when the system is first turned ON. Once the Red LED's are turned OFF (via a push button switch on the PCBA's), repeated Warm Starts will not cause the Red LED's to turn ON again (except if there is an error). The loading CPU waits for about 5 seconds, and then goes offline. The error message 'FOFF' (neither Load/Alternate load set) will display. This is normal and happens before system memory is initialized. The 2nd CPU then acquires the system load privilege and enables and clears all of the DMA controllers. When the DMA2 is enabled, it must read its Control and Status Register (CSR) area in main memory in order to preserve its state during powerfail (warm start). Unfortunately, the DMA2 reads an area of main memory that is not initialized (written to) by the CPU first. Thus, when the DMA2 reads this location, an immediate Memory Parity Error occurs (Red LED's) on the DMA2 and Memory. This is not a problem with the DMA1 and DMA3. WORKAROUND: To instruct the operator to press the Load or Altload button within 5 seconds of power up, or to ignore the error and clear the Red LED's after initial power on. If the Load or Altload method is used, the error message 'E081' (Disk not ready/Tape Off-Line) may occur. This is not a problem; wait until the device is ready and reload the system. This error never occurs again during power ON time (ACDU remaining ON) even after a powerfail recovery. RED LED's WITH DMA2 INCORRECT STRAPPING Incorrect strapping of JMP1 on the DMA2 can cause Red LED's or even a Boot Strap error of F017. There is some documentation that has been released with incorrect strapping for the DMA2 (Refer to Field Bulletin # 554). JMP1 on the DMA2 (PN 903599-001/-002 and 903741-001/-002) must be strapped for pins 2 to 3, pins 1 to 2 are not supported. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB170 Pg001 Pin numbers are from Top to Bottom 3-2-1, pin 1 on the etch side has a square solder pad. No matter what system (MPx or Advanced), always use 2 to 3. The silkscreen indicates MPx 9000 for pins 2 to 3, and Sequoia for pins 1 to 2. Pins 1 to 2 are NOT to be used even if it is installed in the Sequoia (Advanced Series) system. If there is NO jumper installed at JMP1, it will default into the MPx 9000 mode. This is OK too. Please change your documentation to reflect this information. RED LED'S ON MOST PCBA'S AT TURN ON / AT LOAD (Christmas Tree) 1) When the system is first turned ON by the system control panel key switch, many PCBA's Red LED's turn ON. This occurrence can be caused by the Protected Power Supply (PPS) not coming up. The Green LED on the power supplies, (LS700/PPS), should be checked and the voltage levels verified. 2) After the LOAD switch is depressed at the system control panel, during system load, many PCBA's Red LED's turn ON. This occurrence can be caused by duplicate Shared Memory board ID's. The Shared Memory PCBA's (8ways, 16ways, BMTC's, IMLC's, LAN's) should be checked for duplicate ID's. You can back out half the Shared Memory PCBA's then load the system again. If the Red LED's go away, suspect one of the PCBA's that was backed out of the system. It may be possible the board address (ID) switch is flaky causing an address that was not set, thus duplicating another. ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB170 Pg002 FIB 00171 10/31/89 *** Advanced Series 20 Hardware Announcement [ WPSH 25 ] *** The Advanced Series 20 (Model 21) utilizes the same CPU power as the Advanced Series 40 (AS40) system. The Advanced Series 20 is packaged as a standalone, single chassis system and will only use one (1) AS40 CPU. It will provide a low entry point into the Advanced Series systems. However, there will be no MPx to Advanced Series 20 upgrades or carrying over MPx PCBA's from existing MPx systems. Copyright 1989 MAI Basic Four, Inc. All rights reserved. TABLE OF CONTENTS 1.0 CONFIGURATION. . . . . . . . . . . . . . . . . . . . .1 2.0 ADVANCED SERIES 20 (MODEL 21) CHASSIS. . . . . . . . .1 3.0 MAINFRAME. . . . . . . . . . . . . . . . . . . . . . .1 4.0 PCBA'S . . . . . . . . . . . . . . . . . . . . . . . .2 5.0 DISK DRIVES. . . . . . . . . . . . . . . . . . . . . .3 6.0 TAPE UNITS . . . . . . . . . . . . . . . . . . . . . .3 7.0 OPERATING SYSTEM . . . . . . . . . . . . . . . . . . .4 8.0 DIAGNOSTICS. . . . . . . . . . . . . . . . . . . . . .4 9.0 INSTALLATION . . . . . . . . . . . . . . . . . . . . .4 10.0 M380/M760 DISK DRIVE JUMPER SETTINGS . . . . . . . . . . 11.0 M280 DISK DRIVE JUMPER SETTINGS . . . . . . . . . . . . 1.0 CONFIGURATION The Advanced Series 20 (Model 21) will consist of the following min/max configuration: ITEM MIN MAX REMARKS ----------------------------------------------------------------- CPU 1 1 NEP PCBA only MEMORY 4Mb 12Mb MCS/M + 1-4Mb or 1-8Mb (SCSI) 1 2 M380 (or M760 future) PRINTER 0 2 TAPE 1 2 DMA2/BMTC DMA2 PCBA 1 1 TOTAL NUMBER OF SHARED MEMORY PCBA'S 0 4 ISDC'S 0 3 16-Way only BMTC 0 1 IMLC 0 1 LAN 0 1 2.0 ADVANCED SERIES 20 CHASSIS CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB171 Pg001 The Advanced Series 20 (Model 21) system will consist of one (1) single frame. The frame is the same height and width as a Desk-Height add-on mainframe. The frame has been slightly modified to be a standalone unit without the hazard of tipping over. The Power System, Mainframe, and disk drive(s) will be contained in this frame. The 1/4-inch MCS unit will be external and sit on top of the system. The standard backplane/chassis used in other MPx/Advanced Series systems are 13-slots wide. The use of the 10-slot Split Backplane, which is three (3) slots less than the standard backplane, leaves enough room to house two (2) 5-1/4-inch SCSI disk drives. The I/O backpanel is different than before. Instead of adding the I/O panels on the disk frames as before, they now can mount behind the Protected Power Supply. This new backpanel will support the following: 1) LAN connection. 2) AC receptacle for 1/4-inch SCSI MCS. 3) One (1) 4-way panel. 4) Two (2) 16-way panels. 5) SCSI receptacle (for MCS or SCSI terminator). NOTE: Three (3) 16-way PCBA's are supported, the third 16-way I/O panel will mount on the ACDU. All 16-way I/O panels use shorter internal cables. The new assembly is 907659-002 which comes with the purchase of a 16-way PCBA for the AS Model 21. 3.0 MAINFRAME The mainframe uses a 10-slot Split Backplane; five (5) low speed and five (5). high speed. Two slots are required for the Bus interconnect PCBA's, thus leaving four (4) configurable low speed slots and four (4) configurable high speed slots. Backplane Bus terminators are built into the backplane thus eliminating two PCBA's for bus termination. The Logic Ground (backplane) to Chassis Ground (cardcage) connection (Green Wire) is attached on the Low Speed side only. This connection is not to be on the High Speed side. High Speed Slots (80ns)- Four (4) of the five (5) slots are used in the minimum system configuration with the following PCBA's: 1-MBA PCBA 1-MCS/M PCBA 1-NEP PCBA 1-DMA2 PCBA This configuration leaves one (1) slot that may be used for a 4/8Mb memory PCBA only. No other PCBA can be used in this slot! Do not reposition the PCBAs to install the optional Memory PCBA next to the MCS/M. Other Advanced Series systems require that the Memory PCBA's reside after the MCS/M, this is not true in the Model 21. Low Speed Slots (160ns)- These four (4) slots are for optional PCBA's, they may or may not be used. PCBA slot priority from Right to Left of the Interconnect PCBA (INTRCNT) is as follows (shown in proper location): /----------Low Speed Side---------\ /-----High Speed Side-------\ 16way / LAN / IMLC / BMTC / INTRCNT || MBA / MCSM / NEP / DMA2 / MEM CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB171 Pg002 4.0 PCBA's The Advanced Series 20 (Model 21) system is SCSI based. Only the DMA2 PCBA (P/N 903599-002 or 903741-002) can be used for support of Disk/Tape/Printer devices (with exception of the Tape unit, an optional BMTC may be used). Since the SCSI MCS tape unit is external and the DMA2 supplies termination power to the SCSI Bus Terminator, a pico fuse has been added to the DMA2 to meet code. A Green LED, DS5 (located under Self-Test switch SW3), has been added for testing of the fuse by depressing SW1 (Test/Reset LEDs). If the fuse is good, DS5 will turn ON. The PCBA revisions are as follows: MBA PCBA 903617, must be at Rev H or greater. NEP PCBA 903705, must be at Rev G or greater (Rev K is preferred). 4/8Mb PCBA 903617-008,-007, must be at Rev N or greater. DMA2 PCBA 903599-002, must be at Rev M or greater. (Rev N if system contains more than 4Mb of memory.) Or DMA2 PCBA 903741-002, must be at Rev E or greater. (Rev F if system contains more than 4Mb of main memory.) BMTC PCBA 903413, must be at Rev Z or greater. IMLC PCBA 903534, must be at Rev D or greater. LAN PCBA 903595-002, must be at Rev H or greater. 16way PCBA 903437, must be at Rev J or greater. 5.0 DISK DRIVES (Refer to M364 SCSI TIP) The Advanced Series 20 (Model 21) supports a maximum of two (2) disk drives. There are two, 5-1/4 inch SCSI drive models available, the M380 and M760 (the M280 SCSI disk may also be used). Both drive models are ECC formatted. These two new SCSI drive additions, as in the past, have been evaluated to meet MBF specifications. Disk drives which do not meet MBF specifications will display a prompt: "Stop, you are attempting to use the proprietary software of MAI BASIC FOUR, INC. in violation of the license related thereto of otherwise in violation of the rights of the licensor. Please contact the Director of Worldwide Product Support at the licensor's corporate headquarters in Tustin, California, USA, (714) 731-5100." The SCSI Bus termination will be provided by an external SCSI termination . plug (P/N 304000) which will either plug into the rear of the system or onto the MCS tape unit. (See Tape Unit section) Unlike the M280, the SCSI Bus pin #1 for the M380/M760 is towards the DC connector. This conforms to the SCSI pinout standard (the SCSI MCS tape . unit, pin #1 is away from the DC power connector. For proper jumper settings, please refer to figures #1 and #2. M380 - The M380 has a Functional Capacity of 364Mb (AKA 364Mb). The M380 requires the DMA2 PCBA for support with the 10.6G OS level. The M380 has a SCSI Bus transfer rate of 1.5-MBytes/sec. The average seek time is 16ms; track-to-track 3ms; maximum 35ms. There are 8 data heads with one servo head. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB171 Pg003 M760 - The M760 has a Functional Capacity of 690Mb (AKA 690Mb). The M760 requires the DMA2 PCBA for support with the 10.6G OS level. The M760 has a SCSI Bus transfer rate of 1.5-MBytes/sec. The average seek time is 18ms; track-to-track 3ms; maximum 35ms. There are 15 data heads with one servo head. This would equate to almost twice the data available to transfer, without the need to perform a seek operation as the M380. 6.0 TAPE UNITS All tape units will be external. The standard tape unit will be the SCSI 120Mb 1/4-inch MCS. Optional tape units may be the GCR or MTS units. The MTR may be used if its coming from an upgrade of of a 13xx customer. SCSI MCS 1/4-inch Tape - This tape unit is supported by the DMA2 PCBA. Though this unit is external, the SCSI transport is the same as currently used in the MPx 9400 systems (transports are interchangeable). . This SCSI MCS will attach to the host internal SCSI Bus with external SCSI Bus cable 916443. The standard Advanced Series 20 (Model 21) system includes a SCSI Bus Terminator (P/N 304000). When a SCSI MCS unit is attached, this SCSI Terminator will be taken off the host and plugged into the SCSI MCS tape unit. The SCSI MCS tape unit will then plug into the host using cable 916443. If the SCSI MCS tape unit is taken off the system, this SCSI Bus Terminator MUST be put back on the host. DO NOT DISCONNECT THIS UNIT FROM THE SCSI BUS WHILE THE SYSTEM IS ON-LINE! 7.0 OPERATING SYSTEM The 10.6G OS, or later, is required for operation. With the release of 10.6G, the diagnostic programs/files will be under the node .R6Gnn.DIAG., where previously they were under the .R6nnn.INST. node. The OS tape will be one of two types, with Diagnostics or without Diagnostics. If the customer does not sign the License Agreement for Diagnostics, the .DIAG. node will not be included. Refer to the 8/9/10/6G Softrware Announcement for more information on this issue. 8.0 DIAGNOSTICS When REMIDI is run, the error '6003' will occur. This is not an error, this error message indicates that no STACHE board was found. Please refer to DOCWRITER, option number 1, "DOCWRITER ALL User's Guide" for added information. Section 2.3 "DIAGNOSTIC NOTES AND CAUTIONS" contains information on tests error that you may encounter while troubleshooting the system. 9.0 INSTALLATION The Model 21 requires the same 20amp twist-lock dedicated line as other MPx systems. This is the only AC power receptacle required for this system. The two drives obtain power from the LS700 as the drive and MCS did in the MPx 71xx. Other AC receptacles are required for VDT's, printers, etc. Height: 29.5-inches (75cm) Width: 12.6-inches (64cm) Depth: 32.6-inches (83cm) Weight: TBD (approx 180-lbs) CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB171 Pg004 Voltages: 100 VAC @ 50/60 Hz: +120 VAC @ 60 Hz 220 VAC @ 50/60 Hz: 230/240 VAC @ 50/60 Hz Currents, ACDU: 16.0-Amps @ 100/120 VAC 8.0-Amps @ 220/240 VAC 2.0 KVA Operating Temperature (system): 50-F to 100-F Relative Humidity (system): 20% to 80% (non-condensing) BTUs/Hour: 6600 BTU/H 10.0 M380/M760 Disk Drive Jumper Settings A. Drive address jumpers JP37 JP36 JP35 Binary Weight Device Address --------- ---------- --------- ------------- -------------- Installed Installed Installed 1 1 1 07 (Reserved)* Installed Installed Removed 1 1 0 06 Installed Removed Installed 1 0 1 05 Installed Removed Removed 1 0 0 04 Removed Installed Installed 0 1 1 03 Removed Installed Removed 0 1 0 02 (Disk 1) Removed Removed Installed 0 0 1 01 (Disk 0) Removed Removed Removed 0 0 0 00 (Reserved)** * SCSI device address 07 is reserved for the DMA-II board. ** Device address 00 is reserved for SCSI tape drives. B. Miscellaneous Jumpers Jumper Settings Jumper Settings ------- ---------- -------- ---------- ***JP1 Installed JP18 Removed ***JP2 Installed JP26 Removed ***JP3 Installed JP32 Installed ***JP4 Removed JP33 Installed ***JP8 Installed JP34 Removed ***JP9 Installed JP38 Removed JP10 Installed JP39 Installed JP11 Installed JP40 Installed JP14 Installed JP41 Installed JP15 Removed TXD-E19 Installed *** Not on M380. 11.0 M280 Disk Drive Jumper Settings A. Drive address jumpers SCSI ID JP12 JP13 JP14 ------- ---- ---- ---- 07 In In In 06 Out In In 05 In Out In NOTE: Please have on-hand some spare 04 Out Out In jumpers, may not be in upgrade kit 03 In In Out to change ID. 02 Out In Out 01 In Out Out 00 Out Out Out CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB171 Pg005 B. Miscellaneous Jumper Settings OLD=P/N 1012539 / NEW=P/N 1014382 Jumper MBF Setting Description OLD / NEW ----- ----- ----------------- -------------------------------------. JP-21...JP-1...JUMPER............MFG TEST ONLY JP-41...JP-2...JUMPER............MFG TEST ONLY JP-42...JP-7...OPEN..............JUMPER FOR WRITE PROTECT JP-43...JP-3...JUMPER............MFG TEST ONLY JP-44...JP-8...JUMPER............JUMPER FOR SPIN UP AT POWER ON JP-81...JP-10..JUMPER............JUMPER FOR DRIVE SUPPLIES TERM POWER JP-82...JP-9...OPEN..............JUMPER FOR HOST SUPPLIES TERM POWER JP-83...JP-12..SEE ID SETTINGS...ID0 JUMPER FOR DEVICE ADDRESS JP-84...JP-13..SEE ID SETTINGS...ID1 JUMPER FOR DEVICE ADDRESS JP-85...JP-14..SEE ID SETTINGS...ID2 JUMPER FOR DEVICE ADDRESS JP-86...JP-15....................JUMPER FOR INTERFACE PARITY ENABLE JP-87...JP-16....................JUMPER FOR SPIN UP AT POWER ON JP-91...JP-4.....................MFG TEST ONLY JP-92...JP-5.....................MFG TEST ONLY JP-93...JP-6.....................MFG TEST ONLY JP-94...JP-11....................MFG TEST ONLY ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB171 Pg006 FIB 00172 11/01/89 *** System time reverting to 00:00:00 *** TITLE: System time reverting to 00:00:00 Resetting the system time in SPX, MPX or BBIII systems can be accomplished by using the BASIC command SETTIME. To set the system time to 00:00:00 you would use the statement 0100 SETTIME0. It changes the value of the TIM system variable to 00:00:00. Two accounts (one SPX and one MPX) were experiencing problems with their system times reverting to 00:00:00. Hardware did not fix the problem. A global search was done on the applications programs for the SETTIME command but none were found. However when a global search was done on the entire system a match was found in a GAMES program, the Word Unscramble Game. It used to come standard on BBIII systems. Both of these accounts had previously upgraded from BBIII systems and kept their GAMES programs on the system. Apparently some employees had found out about the GAMES programs on the system and every time they used Word Unscramble it would cause the system time to revert to 00:00:00. This caused serious problems with applications programs that needed the correct system time. Statement 2010 in program .GAMES.%3!12 was the culprit. You can change the statement to a REM statement but the best solution is to just delete the program.!@#$! ORIGINATOR: Kim Yaworsky CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB172 Pg001 FIB 00173 11/20/89 *** SPLIT BACKPLANE UPGRADES !!!!!! *** When installing Split Backplane upgrade kits make sure that the interconnect boards on the backplane at slots 6 and 7 are removed !!!!! these interconnects are sent for future use ,in case the system is upgraded to 2 backplanes. these connectors make it a single backplane again. ****REMOVE THE CONNECTORS FOR SPLIT BACKPLANE USE****** FOR INSTRUCTIONS TO DO THE VARIOUS UPGRADES ON THE ADVANCED SERIES SEE THE AS 40 SERVICE MANUAL SECTION 2 .... ORIGINATOR: J WHALEN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB173 Pg001 FIB 00174 01/17/90 *** Advanced Series 20 Installation Requirements [ WPSF 568R ] *** This single frame system cannot have additional frames added. It requires the same 20amp twist-lock (IGL5-20R) dedicated line as any other single chassis MPx system (without disks). This system will only has a maximum of two (2) disk drives which are powered from the host's power system. (Power system = LS700/PPS). They are housed in the host so there are no AC receptacle concerns for the drive(s). The SCSI 1/4-inch tape unit is optional and is supported by the DMA2 via an external SCSI Bus cable. This unit plugs into an external AC receptacle on the back of the system, no other device may plug into this AC receptacle. Other MBF 1/2-inch tape units may be used instead which will require a standard AC outlet for the device and a BMTC PCBA. SPECIFICATIONS Height: 29.5-inches (75cm) Width: 12.6-inches (64cm) Depth: 32.6-inches (83cm) Weight: 180-lbs. Voltages: 100 VAC @ 50/60 HZ; +120 VAC @ 60 HZ 220 VAC @ 50/60 HZ; 230/240 VAC @ 50/60 Currents, ACDU: 16.0-A @ 100/120 VAC; 8.0-A @ 220/240 VAC Operating Temperature (system): 50o-F to 100o-F Relative Humidity (system): 20% to 80% (non-condensing) BTUs/Hour (system): 6600 BTU/H | ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB174 Pg001 FIB 00175 11/28/89 *** BMTC Rev. "AA" not working on AS System *** SYMPTOM: Tape Drive hangs without any other tasks running in low-speed chassis. If other tasks are running (ex. DISKREAD), tape drive works fine. PROBLEM DETERMINATION: Missing ECN on new built Rev. "AA" BMTC PCBA's. FIX: + 5 volts not supplied to pin 14 on IC "1T". Run a jumper from closest lead of C162 (+ 5 volts) to 1T-14. ORIGINATOR: J. O'Brien CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB175 Pg001 FIB 00176 12/14/89 *** System 7000 Tape Errs, Disk Goes Off Line *** SYMPTOM/TEXT: Intermittant tape drive errors, & or disk drops ready or other errors. FIX: The 2 power cables to the tape & disk units from the power adapter PCBA mounted on the LS700 have a problem. They develop a high resistance connection at the power adapter PCBA. If you check the 5 & 12 volts at the tape or disk by removing the cable, the voltages will look O.K.. The voltage must be checked with the unit connected. If this condition exists, you will see around 3V or so on the 5V line. If you pull the connector off the power adapter PCBA, you may see a discolored edge. This is the 5V side. Temporary fix: -tighten connector- ORIGINATOR: Don Nystrom & Pete Dobrow -1334 CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB176 Pg001 FIB 00177 01/17/90 *** Control Panel Modification Monitors +5V [ WPSF 582 ] *** A design change has been implemented to the System Control Panel of MPx and Advanced Series systems. This change was made to enhance the systems capability to shut-down during rare PCBA component failure. All parts in production, inventory and field spares will have this rework done to incorporate this enhancement. When a system control panel requires replacement, the enhanced version should be used. A NEW system control panel, P/N 903800, is being released that will have this enhancement embedded. NOTE: Troubleshooting the power-system, with this modification, may require defeating this circuitry. Refer to the Trouble Shooting section of this document. This change can only be implemented to the 'Membrane, Lock-key Switch' system control panel. The old style 'Button' system control panel cannot be updated. It must be replaced with one of the 'Membrane, Lock-key Switch' system control panels. This also requires the MCS PCBA to be at revision 'L' or higher and the system front panel cover also needs to be replaced. Use your normal system upgrade procedures if you elect to add this enhancement to the old 8000 'Button' system. Rework requires the addition of a 'piggyback' PCBA, P/N 903796, to be added to the system control panel. On the Desk High Advanced Series systems, the system control panel PCBA is mounted on the right side between the fan housing and the side cover. The added dimension of the 'piggyback' PCBA to the system control will interfere with the side panel. In this case, the NEW system control panel (903800) is required. This change is required on the following system control panels: Desk High System: The Desk High systems (AKA 'LowBoy') use a two piece system control panel. There are three versions of this style of control panel; they are: 903607 - This version has a captive ribbon cable at J2. NOTE: If you choose to replace this version with one of the others, the ribbon cable from J2 to MCS(/M) PCBA will also be required, P/N 907174-053. 903675 - This version has a detachable ribbon cable connector at J2. 903800 - This is a NEW version that has been released with this feature incorporated into it. It has a detachable ribbon cable connector at J2. Tall Framed Systems: The Tall Framed (chassis) systems use a one piece system control panel. There are two versions of this style system control panel. 903432 - This version CANNOT be updated, it must be replaced with the reworked 903567 PCBA. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB177 Pg001 903567 - This version can be updated and will be used as a replacement for the 903432 PCBA. TROUBLE SHOOTING: The ECN (14009) adds a small piggy back PCBA to the system control panels to shut down the power system when the +5v drops to approximately +3.6v or below (this usually indicates current foldback). The extra circiutry may, in some cases, make trouble shooting a power system problem a little difficult. The "protective" circuit may be over-ridden by grounding J1-5 on any of the updated system control panels. Ground J1-5 when the system control Panel is turned OFF, leave this pin grounded during test. DO NOT leave the customer site with J1-5 grounded. ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB177 Pg002 FIB 00178 02/07/90 *** Upgrade Problems from AS-41 (Split-backplane) to larger AS Systems *** SYMPTOM: When adding second chassis to split-backplane AS System, Interconnects A & B must be inserted on back of split-backplane. System will now not function as upgrade and may crow-bar power supply. PROBLEM DETERMINATION: Bad Interconnect B (903649-001 / MM892502). PCBA's have been found to have shorts (ex. J1-1 (gnd) to J1-2 (+5V)). FIX: This problem will only show up on upgrade, as Interconnects are sent with original order. Order new Interconnect B PCBA and return old one. ORIGINATOR: J. O'Brien CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB178 Pg001 FIB 00179 02/09/90 *** DMA III PCBA's corrupting data (Quick Test) *** SYMPTON: Corruption of data files that reside on disk drives connected to DMA III's, with no errors logged in ERRORLOG. PROBLEM DETERMINATIONS: DMA III's below Rev. "J", have several suspect IC problems. Tests to check for data corruption, due to faulty IC's, are mentioned below. FIX: Replace suspect DMA III PCBA with a DMA III PCBA at Rev. "J". ----- HOW TO RUN A TEST TO DETERMINE IF YOU HAVE THIS PROBLEM ----- 1) Run "DEMON" or "NEWX", with voltage margins set to LOW. 2) Select "Unit Tests", "Disk Drives", and the selected drive that is attached to suspect DMA III. 3) Press "Z" to clear default options. 4) Select test 5 (Write/Verify Tracks). 5) Select option F (Pattern), use pattern "51515151" instead of default "6DB6DB0F". Run on loop for 15 to 20 minutes. 6) Change pattern to "40404040" and again run on loop for 15 to 20 minutes. 7) If "Verify Errors" occur, the DMA III PCBA is bad. 8) When the "Verify Error" occurs, it will be the result of a dropped bit. A "51" will be an "11", or a "40" will be a "00". ORIGINATOR: J.O'Brien CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB179 Pg001 FIB 00180 05/23/90 *** MTCS (1/4" SCSI) in SAVERESTORE, then ESC can cause system dump *** Recently there has been an enhancement to the MTCS 120MB SCSI tape unit. The enhancement allows the MTCS to 'Disconnect' from SCSI bus when a 'Space Forward' is issued. This allows other SCSI devices to utilize the SCSI bus while the Space Forward is being performed. Previously the MTCS would stay on the bus preventing other SCSI devices from using it. This enhancement was made in 6Y30 version of FW on the MTCS (as marked on the back of the unit). Presently, it has been noticed that under certain circumstances a dump or hang may occur if ESC(ape) is depressed when a Space Forward is being done through a large file. FIELD PROBLEM: The nature of the failure may lead the CE to replace the SCSI disk drive(s) on the SCSI Bus. When the failure occurs, you may see one of two possible error messages: 1) 5C11000n DRIVE OFFLINE, may be displayed to the terminal and a system hang may occur. The Green LED on the front of the SCSI drive may stay on steady, thus leading the CE to believe the SCSI drive is at fault (hung). 2) Four-tuple dump 2,0,14,0 - 80020000, may occur. This too would lead the CE to believe the disk went offline (80020000 = Abort flag/Disk not ready) and the errorlog may have the same entry. Find out what the user was doing. Were they using SAVERESTORE and then ESC(aped) while it was in operation ? If so, inform the user not to ESC(ape) out during the operation. We are currently working on a fix for this problem. ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB180 Pg001 FIB 00181 07/17/90 *** Incorrect 16-way Switch Settings in AS 20 & 40/60 Service Manuals *** The 16-way address switch settings (S2) are incorrect for board addresses 32 and above in: Advanced Series 20 Installation and Maintenance Manual - M8212A Advanced Series 40 and 60 Installation & maintenance Manual - M8210B It is unknown if there are other revisions of the Advanced Series manuals affected. These manuals incorrectly show S2-7 closed (0) for board addresses 32 and above, S2-7 should be open (1) for all board addresses. Correct 16-way switch settings for the 9xxx and ASx systems can be found in MPx and ASx Handbook FIB 32 (in the HANDBOOKS category). ORIGINATOR: Norm Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB181 Pg001 FIB 00182 08/24/90 *** 1,x,y,6 Memory Parity Dumps - P/N 903621-xxx PCBAs [ WPSF 615 ] *** System dumps may occur on MPx and Advanced Series systems with 1,x,y,6 (Memory Parity Error) four-tuples and the Red Multi-bit error LED (DS3) will turn ON. There was a change made at the OEM of the 32-Bit EDAC IC used on the 4/8/16 MB High-Speed ECC Memory PCBA P/N 903621-xxx at location '3BB'. An upgraded die used for the 'Plastic' package of the EDAC IC appears to have different characteristics (though still within OEM specs) than the die used for the 'Ceramic' EDAC. Due to these changed characteristics a 'Component Disqualification' for the 32-bit EDAC IC, SN74AS632N, P/N 162082-002 was issued (the part number has not changed). THIS DOES NOT MEAN THAT ALL 'PLASTIC' EDAC IC'S ARE BAD, NOR DOES THIS MEAN THAT THE HIGH-SPEED ECC MEMORIES ARE TO BE REPLACED IN WORKING SYSTEMS THAT HAVE THEM! It DOES mean that if you are going to a trouble location that is having Memory-parity dumps and the 'RED LED' is ON, this, more than likely, is the cause. Insure that the SPARE you are taking to THIS location has the 'Ceramic' EDAC IC. There is no revision level change for this Component Disqualifica- tion to the High-Speed ECC Memory. MEMORY TESTING Depending on where a suspected memory resides in the system will determine the length of time of the test. Not knowing where a suspected memory is (outside of the error LED turing ON) or just testing the system; the following will help. 1) Disable ALL Cache. This will cause more accesses to main memory vs just going to on-board Cache of CPU's. 2) Use High voltage margin of the LS700 +5volts. 3) Must have a HEAVY load on the system. This will insure that ALL memory is being used/tested. System processes start at Low end memory, user processes/tasks start at the High end of memory. Therefore, without a heavy load all of main memory may not be used. 4) Wait..........how long cannot be determined, at least 30 to 45 min. The system memory configuration will determine the time and the frequency of the faulty component error. ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB182 Pg001 FIB 00183 08/24/90 *** BMTC at Rev. AB goes offline May Cause Dumps/Hangs [ WPSF 616 ] *** MPx/ASxx Systems BMTC 903413, Rev.'AB' Going Offline When using the SAVERESTORE utility, the system may dump or hang. Using DEMON or NEWX will not detect any problem. There have been a few instances where revision 'AB' BMTC's have caused system dumps or hangs to occur when using SAVERESTORE. The Green LED (DS2 selftest OK) on the BMTC will go out at the time when the tape label is read form tape. SAVERESTORE may even be successful, but if the Green LED goes OUT, the BMTC should be replaced to avoid a possible system dump or hang. Though revision 'AB' only changed a source for an IC socket, new build BMTC's are using second source IC's (older BMTC's that have been updated to this revision level should not have this problem). Though the second source IC's are within specifications, a slight timing difference has occurred (thus the problem). This problem has been addressed by ECN #14381, which brings BMTC to revision 'AD'. This ECN insures that second source IC's slight differences do not cause any problems. The rework instructions are as follows for the BMTC PCBA 903413-001: A) Remove IC at location 8H (74LS259). B) Add IC 74F259 (MBF P/N 168001-021) at location 8H. C) Trace cut 8H-14 (DISD-) on the Solder Side. D) Jumper: 1. 5K-18 to 6T-1 (RCLK). 2. 6M-13 to 6T-2 (DISD-) 3. 8H-14 to 6T-3 (NDISD-) E) Change revision tag from 'AC' to 'AD' to reflect this change. ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB183 Pg001 FIB 00184 08/31/90 *** 1/2" MTS Tape Boot Fails with Bootstrap Error E086 *** SYMPTOM: 1/2" MTS tape boot fails with bootstrap error E086, the tape drive may also have intermittant read errors. The internal logic ground to frame ground short may have been disconnected. See FIB 24 in the Cipher MTS FIB group (type 4402) for details. ORIGINATOR: Norm Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB184 Pg001 FIB 00185 10/11/90 *** P/N for Rubber Shock Mounts for 5 1/4" Disk Drives on a 7000 *** SYMPTOM/TEXT: The 5 1/4" drives on a 7000 (high-boy) are mounted vertically using rubber shock mounts. If this drive has to be replaced for some reason, these rubber mounts may stick to the drives & tear. FIX: Part number for the Shock Mount is MM001511/245016-001 ORIGINATOR: John Tank CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB185 Pg001 FIB 00186 10/11/90 *** Hardware Flow Control Available on M.6H [ WPSF 622 ] *** SUPPORT OF HARDWARE FLOW CONTROL WITH OS RELEASE M.6H (or later) With the release of M.6H OS level, uni-directional hardware flow control is supported. Not only is the M.6H OS required, but a new serial cable, P/N 916509-B, and a new version of 16way, P/N 903437-002, is required too (this feature supported on the 16way only). Below is the pin-out of the 916509 rev B cable. This cable requires 4-twisted pair cable (existing serial cables are 2-twisted pair; they cannot be converted). DB-15P (BACKPANEL) DB-25P (DEVICE) PA PB RXD 10-------------------------------2 TXD \ LEGEND: TXD 9-------------------------------3 RXD | o = connection RTS 12--------------------------o----5 CTS | ) = No Conn | |==\ SGND 1--------------------------)----7 SGND | Twisted wire CTS 11--------------------------)----20 DTR / pair return | attached to DCD 13---o o----8 DCD SGND line. | | DSR 4---o o----6 DSR | DTR 5---o CABLE 6---o | SGND 14---o Twisted pair for RXD/TXD/RTS/CTS go to PA1 (SGND) and PB7 (SGND). Only the 16way (-002) will support uni-directional hardware flow control with cable P/N 916509, rev B. The device will be able to throttle the host, but the host will not throttle the device. (This will cure the 'Data Loss' problem that occurs with ISP printers when they are turned off.) This version of 16way is downward compatible with earlier OS releases, but the hardware flow control will not work without M.6H OS. Flow control is implemented by monitoring the CTS (Clear To Send) signal on the RS232 connector from the device. If CTS drops, the host will cease transmitting until CTS is detected or until a specified timeout has occurred. If the timeout occurs, a "timeout" error will be returned to the user. The timeout value is reset for each character transmitted. This means that if CTS drops multiple times during a transmission, 5 seconds (for example) will be allowed for each detection of CTS dropping. Hardware flow control is available for any serial device except for SPE.MODEM. Hardware flow control must be configured in TERM.CONFIG for it to be operational. Enter the extended options menu (by using 'X' at the prompt ENTRIES CORRECT (Y/N)) for the port being configured and enter 'Y' at the line 'CTS FLOW CONTROL:'. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB186 Pg001 HOW TO OBTAIN 16way -002: The 16way -002 version is NOT required for the use of the M.6H OS release. It is ONLY required for those ports (along with M.6H) that wish to implement this hardware flow control. DO NOT replace every 16way in the system. Use the standard procedures in your location that is used for 'Revision Upgrades'. The change to the 16way to make it a -002 version was done to change the pull-down resistors on the connectors so that the controller will see an un-powered CTS signal as a low and not as a high. Without this change, the hardware flow control would see a powered-off device as online instead of offline. Please refer to ECN #14316 for 16way rework. Flow control, past and present on BOSS/VS (MPX to Advanced Series Systems): There have been basically three levels of flow control support on the BOSS/VS OS releases. Flow control is implemented by downloading Z80 code from the ISDCOS program into the ISDC controllers. The term 'software' or 'hardware' flow control refers to the level or type of control in use and not what implements the actual control. The control throttling in the ISDC's is done under control of the program running in the ISDC. The fact that the UART pins are wired to the connectors means only that software could be written in the ISDC to send the appropriate I/O commands to the UART to raise or lower the pins. The UART is a simple, dumb device. It cannot raise or lower control signals by itself. The UART is basically a serial to parallel converter, a parallel to serial converter, a FIFO for data characters and a line driver for control signals. From the first release of BOSS/VS, simple XON/XOFF software flow control has been available. In this mode, the ISDC will recognize the XOFF character from a device to stop transmitting characters to that device and the XON character from a device to restart transmitting characters to that device. On the M.6G release, the option for 'bi-directional' XON/XOFF software flow control was added. In this mode, the ISDC will send the XOFF character to stop a device which is sending too much data for the ISDC to handle. The ISDC will send the XON character to the device to have it resume sending data. On the M.6H release, the option for simple CTS hardware flow control was added. In this mode, the ISDC will recognize the state of the CTS signal on the RS232 connector from the device and start or stop transmitting data to that device as appropriate. The ISDC will only transmit data to the device when the CTS signal is high. ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB186 Pg002 FIB 00187 10/11/90 *** System Hangs/Dumps/Drive Offline in SAVERESTORE [ WPSF 630 ] *** TYPE: Problem SYMPTOM: Under certain circumstances a dump or hang may occur if ESCAPE is depressed when a Space Forward is being done through a large file. This is a problem with the MDL 4408 MTCS 1/4-inch SCSI tape drive. The nature of the failure may lead the Customer Service Representative (CSR) to replace the SCSI disk drive(s) on the SCSI bus. When the failure occurs, you may see one of two possible error messages: 1) 5C11000x DRIVE OFFLINE, may be displayed to the terminal and a system hang may occur. The Green LED on the front of the SCSI drive may stay on steady, thus leading the CSR to believe the SCSI drive is at fault (hung). 2) A dump with Four-tuple dump 2,0,14,0 - 80020000, may occur. This too would lead the CE to believe the disk went offline (80020000 = Abort flag/Disk not ready) and the errorlog may have the same entry. CAUSE: Recently there has been an enhancement to the MTCS 120MB SCSI tape unit. The enhancement allows the MTCS to 'Disconnect' from the SCSI bus when a 'Space Forward' is issued. This allows other SCSI devices to utilize the SCSI bus while the Space Forward is being performed. Previously the MTCS would stay on the bus preventing other SCSI devices from using it. This enhancement was made to the 6Y30 level of FW in the MTCS. The FW level is marked on the back of the unit, you may need to remove the top plate of the MTCS to view the FW level located to the left, facing the front of the tape unit. This is not an issue with the 3X10 FW level. SOLUTION: Find out what the user was doing. Were they using SAVERESTORE and then ESCAPED while it was in operation? If so, inform the user not to ESCAPE out during the operation. ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB187 Pg001 FIB 00188 11/28/90 *** BMTC/GCR Data Integrity [ WPSF 636 ] *** TYPE: Problem SYMPTOM: Restoring data from the GCR will not report 'Hard errors' under certain circumstances. If a 'COMPARE' is not done, the corrupted data will not be detected. CAUSE: Sometimes the GCR will report a soft (corrected) error and a hard error on the same read. When this happens, the BMTC reports just the soft error to the software. The software then handles the soft error as a corrected error. This some- times causes the software to miss a hard error on tape and does not retry the read, nor does it report the hard error. The GCR sends 'buffered' data unlike the byte-by-byte transfer that the MTS and Reel-to-Reel drives do. This problem has been researched and reported against the GCR. The HCC and the 1/4" MTCS also use buffered data. They too may exhibit the same failure. SOLUTION: Mask the 'Soft error' signal at the GCR on J6 pin 42 (a soft error is a corrected error) with a small piece of tape so the hard error will always be seen when it occurs. Make sure that the tape does not cover any other pins on the connector on the GCR. Always do a compare of the tape to disk to insure that the data is correct. ECN #14694 has been released against the BMTC, P/N 903413, to address this issue. This ECN brings the LARL of the BMTC to revision 'AE'. REWORK INSTRUCTIONS for the 903413-001 PCBA. A. Install IC 74S08 (P/N 101615) at location 8R. Pin #1 of IC to pin #1 of IC socket. B. Cut trace on solder side between 8M-3 to 8M-6. C. Jumper: 1. 8R-3 to 8M-6 2. 8R-2 to 8M-13 3. 8R-1 to 8M-15 (RSHS-) ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB188 Pg001 CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB188 Pg001 FIB 00189 01/29/91 *** +12 V. Crowbars in LS700 PS with Xyplex Terminal Server Attached *** SYMPTOM/TEXT: The +12 Volts would crowbar on the LS700 Power Supply with too many Xyplex terminal server ports attached. FIX: The chassis that the LS 700 resided in had 5 16-Ways, 4 8-Ways, a BMTC and an IMLC in it. The 16 and 8 Ways had 26 Terminal Server ports attached to them. By reducing the number (in our particular instance) to 20 the current draw was minimized and the LS 700 +12 Volts stayed up. This is very similar to FIB # 78. ORIGINATOR: Kim Yaworsky CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB189 Pg001 FIB 00190 08/01/91 *** Temporary System Hangs, Disk Errs Logged with no Status - ASxx *** SYMPTOM: Temporary system hangs (1-2 minutes), may be accompanied with a flashing disk not ready message (VERY BRIEF FLASH) when the system resumes operation. Also logs a disk error with no status bits on (status of 00000000). Affects multi-processor ASxx systems with a DMA-II controller. PROBLEM DETERMINATION: To test for this condition, start multiple disk copies (4 or more) going at the same time to/from disk(s) on the DMA-II. This problem may NOT show up in even extensive COOK runs. FIX: ECN 15118 has been released to correct this problem. P/N 903599-002 at Rev P has the ECN installed P/N 903741-002 at Rev K has the ECN installed Check for the presence of an IC (74S373) at location 1S, if the IC is present this ECN is installed. Installation Instructions: A. Install IC, 74S373 (P/N 161077-001) at spare location 1S. B. Lift legs: 1. 7D-8 (MDX15-) 2. 7B-14 (MDX19-) 3. 6C-13 (MDX20-) C. Jumper: SOURCE DESTINATION SIGNAL-NAME 1. 3X-11 1S-11 MSTR 2. 1R-18 1S-3 MDX15- 3. 1R-16 1S-4 MDX19- 4. 1R-14 1S-7 MDX20- 5. 1S-2 7D-8 LIFTED LEG LMD15- 6. 1S-5 7B-14 LIFTED LEG LMD19- 7. 1S-6 6C-13 LIFTED LEG LMD20- 8. 1S-1 1R-1 PD3 ORIGINATOR: Norm Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB190 Pg001 FIB 00191 07/05/91 *** SCSI Device Termination *** There have been many errors in various documents regarding SCSI device terminator orientation, this FIB is intended to give an explanation of how the termination is accomplished and how to check for proper termination on any internal (single-ended) SCSI bus. This FIB does NOT apply to differential SCSI busses such as the external SCSI bus used on the external tape drives connected to the GPx systems. The SCSI (Small Computer System Interface) bus must be terminated at both ends of the bus. The SCSI controller has built in termination, however the other end of the bus MUST BE TERMINATED at the last device and ONLY THE LAST DEVICE on the bus. Terminator packs must be removed from any other SCSI devices on the bus. The terminators used are either SIP (Single Inline Packs) or DIP (Dual Inline Packs) which contain 220/330 ohm networks with the 220 ohm resistor tied to +5V and the 330 ohm resistor tied to ground and where each signal on the bus is connected into an individual network. +5V | 2 2 0 signal ------* +3V inactive state 3 3 0 | ----- --- - The signals are negative (ground) active and when properly terminated each inactive signal should be approximately +3V. To check for proper termination, disconnect the SCSI bus cable, power up all SCSI devices and measure the voltage at each SCSI device between pin 1 (ground) and pin 2 (Data bit 0). The signal voltage on terminating devices should measure approximately +3V and the voltage at non-terminating devices should measure approximately ground. Measurements at a device with the terminator packs reversed will read approximately +2V. Measurements can be made with a DVM or an oscilloscope. It may be easier to connect the SCSI bus cable to the device being checked and measure the voltage on an open bus connector, however you must be sure only one SCSI device is connected to the cable at a time. Use the following SCSI cable signal table to verify that all signals are properly terminated. (continued on next page) CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB191 Pg001 SCSI Bus Signals Ground Pins: ALL ODD NUMBERED PINS Signal Pins: 2 - DB0 SCSI BUS bit 0 4 - DB1 SCSI BUS bit 1 6 - DB2 SCSI BUS bit 2 8 - DB3 SCSI BUS bit 3 10 - DB4 SCSI BUS bit 4 12 - DB5 SCSI BUS bit 5 14 - DB6 SCSI BUS bit 6 16 - DB7 SCSI BUS bit 7 18 - DBP SCSI BUS Parity 20 - OPEN 22 - OPEN 24 - OPEN 26 - +5V Terminator Power (from controller only) 28 - OPEN 30 - OPEN 32 - ATN Attention 34 - OPEN 36 - BSY Busy 38 - ACK Acknowledge 40 - RST Reset 42 - MSG Message 44 - SEL Select 46 - C/D Control/Data 48 - REQ Request 50 - I/O Input/Output ORIGINATOR: Norm Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB191 Pg002 FIB 00192 07/09/91 *** Power Supply Sequencing & Testing Information *** LS700 P/S Simplified Sequencing Diagram MAIN FRAME CONTROL PANEL ___________ | | OVER TEMP | ON/OFF | SENSORS LS700 DISK | SWITCH | ____ ____ _____ ACDU | | on/off | | | | | | ____ | / o------>-----------o-------o--------*---->| | PFD- | | | | | plgdin | \ | | \ | | | |>-----*-->| | | ___ * ->-----------o-------o--------|-*-->| | | |____| | _ | | |____| |____| | | |_____| | |________|__| | | | ^ | | LS700 | | | | _____ | | MCS | | | | | ___^______ *---->| | PFD- | | | | | | |>-----* | | | *-->| | | | ___ |>--PFI- |_____| | | _ |>--SRST- | |__________| | ^ | | | *----------------------------------------------* Required signals for an LS700 to sequence up 1. AC input and proper voltage program plug orientation 2. PLGDIN must be ground (generated on MCS) 3. ON/OFF REMOTE (shown as ON/OFF in diagram) must be high (about + 15V). This signal is controlled by the main frame control panel at the ON/OFF switch. If the switch is in the OFF position this signal is grounded at the switch, if the switch is in the ON position this signal is allowed to float (the actual pull-up voltage is from the LS700). ON/OFF REMOTE is also controlled by the over temp sensors. All over temp . sensors are in series and are designed to short PLGDIN to ON/OFF REMOTE if the rated temperature (116 degrees F) is exceeded. Required MCS power system signals 1. PFD- (Power Fail Detect) must be high (+5V) for the MCS to remove PFI- (Power Fail Interrupt) and SRST- (System Reset) signals from the backplane. If PFD- is low (ground) the CPUs and all PCBAs are held reset. PFD- is generated by each LS700 in responce to a loss of input AC power. NOTE: PFD- is used to sequence disk power, if there is a problem in the disk ACDU (or cabling to it) PFD- can be held low. Disconnect J10 from LS700s to eliminate this possibility when troubleshooting. ....................................................................... CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB192 Pg001 METHODS FOR TESTING LS700 POWER SIUPPLIES Testing without any cables or load attached: 1. Verify proper AC programming plug orientation 2. AC power must be applied to P1: P1 - 1 = NEUTRAL (or 2nd HOT if 220V) P1 - 2 = HOT P1 - 3 = AC GROUND 3. Jumper J3 - 1 to +5V bus bar - this provides voltage feedback 4. Jumper J6 - 4 (PLGDIN) to ground bus bar (or any ground return) NOTE: Use pin orientation etched on the LS700 PCBA, don't use the pin numbers on the sequence cable connectors, they are different. Testing with the LS700 installed in a system using sequence cables: 1. Connect J6 on LS700 to J1 on main frame control panel using cable P/N 906628-xxx. 2. Connect J2 on main frame control panel to J1 on MCS PCBA (with MCS plugged into backplane) using cable P/N 906615-xxx. 3. Connect J3 on LS700 to J16 on backplane. The LS700 should sequence up and down with the on/off switch NOTE: If in a multi-frame system, don't exceed the capacity of a single LS700. The easiest way is to remove everything except the MCS. ........................................................................ Protected Power Supply (PPSII) Input AC power the only requirement for the protected power supply to sequence up (green LED). ORIGINATOR: Norm Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB192 Pg002 FIB 00193 09/18/91 *** Advanced Series Memory Parity & Timeout Dump Analysis *** NOTE: Charts for decoding memory timeout and parity dumps are located in MPx and ASx Systems Handbooks, FIB 37 covers the 7xxx, 8xxx, 9xxx series systems, and FIB 47 covers the ASx series systems. Subject: MPx/Advanced Series Don Luque Date: 7/11/91 FB #465 Memory Errors ADDENDUM Type: Informational Purpose: To update Field Bulletin # 465; Clarify Advanced Series Memory errs Symptom: Example: system dumps with 1, 4, 227, Z. Z= 5 (memory timeout error) or 6 (memory parity error). Cause: At this time it's unknown. (Need to keep reading this FB.) Solution: Unlike the other MPx systems, the Advanced Series system memory errors are grouped under four (4) 16MB memory 'banks', 0 thru 3. Memory errors can also be called by 'Shared Memory' controllers, such as BMTC's, 16way's, IMLC's, and LAN's. These controllers require a unique Memory Map Controller Number (MMC#). The MMC number of these controllers can be found in the NEWX display for that particular controller. Please reference Field Bulletin # 465 (FIB #37), table 3. This table should read Advanced Series 64MB Memory Map and the following should be added: |---------- X VALUE ------------| 16 MBYTE BANK CPU #0 CPU #1 CPU #2 CPU #3 -------------------------------------------------------------- Bank 3, 48th to 63rd Mbyte 3 7 11 15 Bank 2, 32nd to 47th Mbyte 2 6 10 14 Bank 1, 16th to 31st Mbyte 1 5 9 13 Bank 0, 0th to 15th Mbyte 0 4 8 12 -------------------------------------------------------------- In our example, '1, 4 (x value), 227 (y value), Z' the 'x' value is 4. In the chart above, 4 is under CPU #1 and in Bank 0. We now use Table 3 to determine where the error location is, looking under Bank 0. /- BANK # Derived from the 'x' value / /- MEMORY LOCATION this is the 'y' value / / /-MMC# ERR # 0,229 START ADDRESS E50000 H, 15007744 DEC #42 SHARED MEM ERR # 0,228 START ADDRESS E40000 H, 14942208 DEC #43 SHARED MEM --> ERR # 0,227 START ADDRESS E30000 H, 14876672 DEC #44 SHARED MEM ERR # 0,226 START ADDRESS E20000 H, 14811136 DEC #45 SHARED MEM ERR # 0,225 START ADDRESS E10000 H, 14745600 DEC #46 SHARED MEM In this case, when NEWX was used to see what MMC was addressed as #44, it was a 16way. Replacing it cured the system dumps. This information is also in the Advanced Series 40/60 Installation and Maintenance Manual -M8210-; order #008210-003. ORIGINATOR: Don Luque CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB193 Pg001 CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB193 Pg002 FIB 00194 MAI COMPANY CONFIDENTIAL 03/03/92 *** ISDC Cable Present Jumpering & ISDC Interface Signal Pin-outs *** On OS levels prior to n.6A the ISDC serial ports could not be accessed in a type 1 load unless the cable was installed at load time. Beginning with OS n.6A the port can be accessed if there is a configured ISDC port (and a working ISDC) at boot time. The following tables give the signals at the ISDC connectors, backpanel connectors, and at the DB-25 connector for signal chasing and to allow you to jumper cable present if necessary for systems on older OS levels. A PCBA jumper borrowed from a spare PCBA works for jumpering cable present on the ISDC ribbon connectors (jumper cable- to ground for cable present). ........................................................................... TABLE 1 - MCS SERIAL INTERFACE SIGNAL PIN-OUTS SIG NAME PORT 0 PORT 1 PORT 2 PORT 3 DB-25 PCBA BK/PNL PCBA BK/PNL PCBA BK/PNL PCBA BK/PNL -------- ------ ------ ------ ------ ------ ------ ------ ------ ----- TxDATA J10-03 J0-09 J11-03 J1-09 J12-03 J2-09 J13-03 J3-09 2 RFV J10-04 J0-03 J11-04 J1-03 J12-04 J2-03 J13-04 J3-03 RxDATA J10-07 J0-10 J11-07 J1-10 J12-07 J2-10 J13-07 J3-10 3 GND J10-12 J0-01 J11-12 J1-01 J12-12 J2-01 J13-12 J3-01 7 CABLE - J10-13 J0-06 J11-13 J1-06 J12-13 J2-06 J13-13 J3-06 GND J10-14 J0-14 J11-14 J1-14 J12-14 J2-14 J13-14 J3-14 ........................................................................... TABLE 2 - 8 WAY SERIAL INTERFACE SIGNAL PIN-OUTS SIG NAME PORT 0 PORT 1 PORT 2 PORT 3 DB-25 PCBA BK/PNL PCBA BK/PNL PCBA BK/PNL PCBA BK/PNL -------- ------ ------ ------ ------ ------ ------ ------ ------ ----- CTS J1-01 J0-11 J2-01 J1-11 J3-01 J2-11 J4-01 J3-11 5 DSR J1-02 J0-04 J2-02 J1-04 J3-02 J2-04 J4-02 J3-04 6 TxDATA J1-03 J0-09 J2-03 J1-09 J3-03 J2-09 J4-03 J3-09 2 DSRS J1-04 J0-03 J2-04 J1-03 J3-04 J2-03 J4-04 J3-03 DTR J1-05 J0-05 J2-05 J1-05 J3-05 J2-05 J4-05 J3-05 20 RTS J1-06 J0-12 J2-06 J1-12 J3-06 J2-12 J4-06 J3-12 4 RxDATA J1-07 J0-10 J2-07 J1-10 J3-07 J2-10 J4-07 J3-10 3 RLSD (CD) J1-09 J0-13 J2-09 J1-13 J3-09 J2-13 J4-09 J3-13 8 RI J1-11 J0-08 J2-11 J1-08 J3-11 J2-08 J4-11 J3-08 GND J1-12 J0-01 J2-12 J1-01 J3-12 J2-01 J4-12 J3-01 7 CABLE - J1-13 J0-06 J2-13 J1-06 J3-13 J2-06 J4-13 J3-06 GND J1-14 J0-14 J2-14 J1-14 J3-14 J2-14 J4-14 J3-14 (continued on next page) CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB194 Pg001 TABLE 2 - 8 WAY SERIAL INTERFACE SIGNAL PIN-OUTS (continued) SIG NAME PORT 4 PORT 5 PORT 6 PORT 7 DB-25 PCBA BK/PNL PCBA BK/PNL PCBA BK/PNL PCBA BK/PNL -------- ------ ------ ------ ------ ------ ------ ------ ------ ----- CTS J5-01 J4-11 J6-01 J5-11 J7-01 J6-11 J8-01 J7-11 5 DSR J5-02 J4-04 J6-02 J5-04 J7-02 J6-04 J8-02 J7-04 6 TxDATA J5-03 J4-09 J6-03 J5-09 J7-03 J6-09 J8-03 J7-09 2 DSRS J5-04 J4-03 J6-04 J5-03 J7-04 J6-03 J8-04 J7-03 DTR J5-05 J4-05 J6-05 J5-05 J7-05 J6-05 J8-05 J7-05 20 RTS J5-06 J4-12 J6-06 J5-12 J7-06 J6-12 J8-06 J7-12 4 RxDATA J5-07 J4-10 J6-07 J5-10 J7-07 J6-10 J8-07 J7-10 3 RLSD (CD) J5-09 J4-13 J6-09 J5-13 J7-09 J6-13 J8-09 J7-13 8 RI J5-11 J4-08 J6-11 J5-08 J7-11 J6-08 J8-11 J7-08 GND J5-12 J4-01 J6-12 J5-01 J7-12 J6-01 J8-12 J7-01 7 CABLE - J5-13 J4-06 J6-13 J5-06 J7-13 J6-06 J8-13 J7-06 GND J5-14 J4-14 J6-14 J5-14 J7-14 J6-14 J8-14 J7-14 ........................................................................... TABLE 3 - 16 WAY SERIAL INTERFACE SIGNAL PIN-OUTS SIG NAME PORT 0 PORT 1 PORT 2 PORT 3 DB-25 PCBA BK/PNL PCBA BK/PNL PCBA BK/PNL PCBA BK/PNL -------- ------ ------ ------ ------ ------ ------ ------ ------ ----- GND J1-1 J0-1 J1-13 J1-1 J1-25 J2-1 J1-37 J3-1 7 TxDATA J1-2 J0-9 J1-14 J1-9 J1-26 J2-9 J1-38 J3-9 2 GND J1-3 J0-2 J1-15 J1-2 J1-27 J2-2 J1-39 J3-2 RxDATA J1-4 J0-10 J1-16 J1-10 J1-28 J2-10 J1-40 J3-10 3 DSRS J1-5 J0-3 J1-17 J1-3 J1-29 J2-3 J1-41 J3-3 CTS J1-6 J0-11 J1-18 J1-11 J1-30 J2-11 J1-42 J3-11 5 DSR J1-7 J0-4 J1-19 J1-4 J1-31 J2-4 J1-43 J3-4 6 RTS J1-8 J0-12 J1-20 J1-12 J1-32 J2-12 J1-44 J3-12 4 DTR J1-9 J0-5 J1-21 J1-5 J1-33 J2-5 J1-45 J3-5 20 RLSD (CD) J1-10 J0-13 J1-22 J1-13 J1-34 J2-13 J1-46 J3-13 8 CAB- J1-11 J0-6 J1-23 J1-6 J1-35 J2-6 J1-47 J3-6 GND J1-12 JO-14 J1-24 J1-14 J1-36 J2-14 J1-48 J3-14 SIG NAME PORT 4 PORT 5 PORT 6 PORT 7 DB-25 PCBA BK/PNL PCBA BK/PNL PCBA BK/PNL PCBA BK/PNL -------- ------ ------ ------ ------ ------ ------ ------ ------ ----- GND J2-1 J4-1 J2-13 J5-1 J2-25 J6-1 J2-37 J7-1 7 TxDATA J2-2 J4-9 J2-14 J5-9 J2-26 J6-9 J2-38 J7-9 2 GND J2-3 J4-2 J2-15 J5-2 J2-27 J6-2 J2-39 J7-2 RxDATA J2-4 J4-10 J2-16 J5-10 J2-28 J6-10 J2-40 J7-10 3 DSRS J2-5 J4-3 J2-17 J5-3 J2-29 J6-3 J2-41 J7-3 CTS J2-6 J4-11 J2-18 J5-11 J2-30 J6-11 J2-42 J7-11 5 DSR J2-7 J4-4 J2-19 J5-4 J2-31 J6-4 J2-43 J7-4 6 RTS J2-8 J4-12 J2-20 J5-12 J2-32 J6-12 J2-44 J7-12 4 DTR J2-9 J4-5 J2-21 J5-5 J2-33 J6-5 J2-45 J7-5 20 RLSD (CD) J2-10 J4-13 J2-22 J5-13 J2-34 J6-13 J2-46 J7-13 8 CAB- J2-11 J4-6 J2-23 J5-6 J2-35 J6-6 J2-47 J7-6 GND J2-12 J4-14 J2-24 J5-14 J2-36 J6-14 J2-48 J7-14 (continued on next page) CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB194 Pg002 TABLE 3 - 16 WAY SERIAL INTERFACE SIGNAL PIN-OUTS (continued) SIG NAME PORT 8 PORT 9 PORT 10 PORT 11 DB-25 PCBA BK/PNL PCBA BK/PNL PCBA BK/PNL PCBA BK/PNL -------- ------ ------ ------ ------ ------ ------ ------ ------ ----- GND J3-1 J8-1 J3-13 J9-1 J3-25 J10-1 J3-37 J11-1 7 TxDATA J3-1 J8-9 J3-14 J9-9 J3-26 J10-9 J3-38 J11-9 2 GND J3-3 J8-2 J3-15 J9-2 J3-27 J10-2 J3-39 J11-2 RxDATA J3-4 J8-10 J3-16 J9-10 J3-28 J10-10 J3-40 J11-10 3 DSRS J3-5 J8-3 J3-17 J9-3 J3-29 J10-3 J3-41 J11-3 CTS J3-6 J8-11 J3-18 J9-11 J3-30 J10-11 J3-42 J11-11 5 DSR J3-7 J8-4 J3-19 J9-4 J3-31 J10-4 J3-43 J11-4 6 RTS J3-8 J8-12 J3-20 J9-12 J3-32 J10-12 J3-44 J11-12 4 DTR J3-9 J8-5 J3-21 J9-5 J3-33 J10-5 J3-45 J11-5 20 RLSD (CD) J3-10 J8-13 J3-22 J9-13 J3-34 J10-13 J3-46 J11-13 8 CAB- J3-11 J8-6 J3-23 J9-6 J3-35 J10-6 J3-47 J11-6 GND J3-12 J8-14 J3-24 J9-14 J3-36 J10-14 J3-48 J11-14 SIG NAME PORT 12 PORT 13 PORT 14 PORT 15 DB-25 PCBA BK/PNL PCBA BK/PNL PCBA BK/PNL PCBA BK/PNL -------- ------ ------ ------ ------ ------ ------ ------ ------ ----- GND J4-1 J12-1 J4-13 J13-1 J4-25 J14-1 J4-37 J15-1 7 TxDATA J4-1 J12-9 J4-14 J13-9 J4-26 J14-9 J4-38 J15-9 2 GND J4-3 J12-2 J4-15 J13-2 J4-27 J14-2 J4-39 J15-2 RxDATA J4-4 J12-10 J4-16 J13-10 J4-28 J14-10 J4-40 J15-10 3 DSRS J4-5 J12-3 J4-17 J13-3 J4-29 J14-3 J4-41 J15-3 CTS J4-6 J12-11 J4-18 J13-11 J4-30 J14-11 J4-42 J15-11 5 DSR J4-7 J12-4 J4-19 J13-4 J4-31 J14-4 J4-43 J15-4 6 RTS J4-8 J12-12 J4-20 J13-12 J4-32 J14-12 J4-44 J15-12 4 DTR J4-9 J12-5 J4-21 J13-5 J4-33 J14-5 J4-45 J15-5 20 RLSD (CD) J4-10 J12-13 J4-22 J13-13 J4-34 J14-13 J4-46 J15-13 8 CAB- J4-11 J12-6 J4-23 J13-6 J4-35 J14-6 J4-47 J15-6 GND J4-12 J12-14 J4-24 J13-14 J4-36 J14-14 J4-48 J15-14 ............................................................................ __ __ __ | | | |_ | | | | | |_| J 1 | | | | | |_ | |_ | | | |_| J 2 | | | | | | |_ | | | J 4 | | | |_| J 3 | |_| | | | |_ | |_ | | | |_| J 4 | | | | | | |_ | | | J 3 | | | |_| J 5 | |_| | | | |_ | |_ | |_ | |_| J 6 | | | | |_| J 13 | |_ | | | J 2 | |_ | |_| J 7 | |_| | |_| J 12 | |_ | |_ | |_ | |_| J 8 | | | | |_| J 11 | | | | | J 1 | |_ | |_ | |_| | |_| J 10 | |_| J 9 | | |__| |__| |__| MCS PCBA 8 WAY PCBA 16 WAY PCBA ORIGINATOR: Norm Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB194 Pg003 FIB 00195 MAI COMPANY CONFIDENTIAL 04/16/92 *** Number of Alternate Tracks Allowed on MPx/ASx Disk Drives *** The allowable number of alternate tracks can be calculated using the HEADS program for non-scsi drives. Multiply the number of cylinders in the relocated area (reloc) times the number of heads (HDS1 + 1) to obtain allowable alternate tracks. DRIVE HDS + 1 * RELOC = TRACKS ----- ------- ---- ------ F621 27 * 28 = 756 P154 7 * 40 = 280 P314 11 * 36 = 396 T303 19 * 19 = 361 ORIGINATOR: Don Luque/Norm Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB195 Pg001 FIB 00196 MAI COMPANY CONFIDENTIAL 02/01/93 *** Disk not recognized by system after disk replacement *** SYMPTOM: Disk does not show up on a tape boot after replacing the drive. DIVE was run on the drive and appeared to complete normally. PROBLEM DETERMINATION: If drive 0 was replaced, OS tape boot only shows drive 1 as a target drive choice (if there is a drive 1). DEMON disk tests work with no errors. FIX: Run DIVE again selecting the minimum number of passes. Apparently the default vol label wasn't written correctly, this will normally be corrected by running DIVE the second time. ORIGINATOR: Norm Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB196 Pg001 FIB 00197 MAI COMPANY CONFIDENTIAL 05/25/93 *** Unable to mount fixed disk after OS upgrade to R7B *** SYMPTOM: Unable to mount one fixed disk after OS slots updated with R7B OS, would not mount in a type 3 load (therefore could not setup family information/etc.) and would not mount in a type 1 load. Reloading the OS slots with the old R6x OS allowed normal drive access, system loaded and functioned normally. DEMON ran with no errors on the failing drive. Attempted to mount the failing drive in a type 1 load using the FAMILY utility on the R7B OS, an error message indicating INVALID FORMAT occurred. PROBLEM DETERMINATION: Load NEWX (or DEMON), select disk drives and observe the format type. All drives on A TDP or DMAI controller must be formatted CRC. FIX: Any drive formatted ECC on a TDP or DMAI controller will fail to mount on OS release 7B and probably all level 7 OS releases. Reformat affected drives using CRC format. NOTE(S): The format rules have not changed but the operating system in releases prior to R7 did not check the format type for validity. ECC format IS supported on MPC, DMAII, and DMAIII controllers. Prior to upgrading a system to 7A/B load NEWX/DEMON and verify the drives format, also install the new config record prior to the upgrade. ORIGINATOR: Norm Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB197 Pg001 FIB 00198 MAI COMPANY CONFIDENTIAL 06/02/93 *** 5 1/4" Disk Not Ready & Data Errors *** SYMPTOM: Intermittant not ready and data errors on 5 1/4" drives in MPx and ASx systems. PROBLEM DETERMINATION: CAREFULLY meter the voltages at the drive, use paper clips to reach into the connector pins (see figure under FIX 1). Compare the voltages with +5V & +12V at the card cage, there should be very little voltage drop. If the failure is intermittant a PC power supply can be placed in the disk frame to provide power for failing disk or tape units. Run the power cable for the power supply outside of the frame to an AC receptacle. A DS1500 P/S P/N MM501060 will work to power three drives. NOTE: The power connectors on the power adapter PCBA CAN EASILY BE PLUGGED OFFSET, be SURE the plug mates correctly with the connector or THE DRIVE WILL SMOKE! PROBLEM 1. The DC power cables which provide power to disk 0 and the tape drive, connecting between the drives and the power adapter PCBA on the backplane, may develop a high resistance connection at the power adapter PCBA or at the drive DC connector. FIX 1. There are two ways to cure the problem with the connection at the power adapter PCBA a. Remove the power adapter PCBA and unsolder the J2 and J3 connectors, clip the corresponding plug from the end of the cable, and solder the cable wires in the holes previously used by the J2 and J3 connectors. NOTE: Be sure and verify proper wiring before connecting to the drives. See figure below. ___________ / \ View of power connector looking at the female | O O O O | end where it would connect to the disk/tape |__|__|__|__|__| drive. | | | | | | | *-- +5V | | *-- GND | *-- GND *-- +12V b. Disconnect the power cable from the power adapter PCBA, remove the pins from the connector by pressing down on the flat retainer clip (accessable through slits in connector body) while pulling on the wire, retension the pin by pulling the end of the connector back towards the wire. * * PULL * * BACK----> * * WIRE--------**************** RETAINER--->/ CAREFULLY form the retainer clip out by slipping a knife blade CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB198 Pg001 under the back edge of the retainer. If bent too far it will break! Reinsert the pins in the connector body. To fix problems with connections at the drive DC connector use a scribe or similar tool to squeeze the male molex pins together. This can be done without removing the pins. PROBLEM 2: The voltage from the external disk drive power supply is incorrect. FIX 2: There is an adjustment pot on the disk P/S PCBA which adjusts both +5V & +12V, it is the only pot on the PCBA. You will have to split the voltages a little, try to get the lowest voltage to its nominal value without causing the other voltage to be > 5% high. ex. +12.0V & +5.18V PROBLEM 3: The AC cable from the ACDU to the drive P/S may develop a high resistance in the connections at either end of the cable. FIX 3: Retension the connectors by forming the pins on both ACDU connector and cable plug to provide more tension using a small screwdriver, the pins do not need to be removed from the connectors. Also there are normally several extra connectors on the ACDU which can be used. Retension the pins at the drive P/S end of the cable as in FIX 2.b. ORIGINATOR: Norm Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB198 Pg002 FIB 00199 MAI COMPANY CONFIDENTIAL 03/07/94 *** 1.X GB 3.5 INCH DISKS *** Marketing is making available via market codes and Manufacturing is shipping kits to use 3.5 inch and 5.25 inch disk drives to replace the existing 8 inch disk drives. These will be available as of 1/7/94. The new disk drives will be the Seagate 1.05 Gigabyte ST11200 and 1.69 Gigabyte ST11900 or the Fujitsu 1.08 Gigabyte M2694ESA. There will be kits available to convert 8 inch form factor to 3.5/5.25 inch form factor. The DMA II with cable (QJ002AA) and the and 1.7 Gb disk (DU110AA) will need to be ordered seperately. BOSS/VS M.7B is required to support the 3.5 inch disk drives. Included in this Bulletin is a facsimile of the Site Survey, additional steps required due the the new drive type, jumper settings for the drives, and a DIVE VID screen example for each drive. Site Survey Instructions for 1GB/1.7GB/1.4GB drives on 9000/AS platforms. 1. The market codes to order depends on the cabinet size and the number of existing 5.25 or 3.5" drives already installed in the system. 2. The patch kit is required for 1GB Fujitsu M2694ES drives (400943-001), which contains a program VID to be run after a tape DIVE format. 3. Power requirements for the 5 1/4" disk drives is 35 watts and 12 for the 3 1/2" disk drives. 4. If the drive requires to be formatted, run the external DIVE from a tape load (Alt Load). If you receive a "could not enable the drive" error message, then select Relocate Alt Track from the menu (instead of Format), enter car- riage returns until you're back into the main menu, then select Format again. This process will enable the drive and allow formatting. During DIVE make certain to verify 1024 bytes per sector and name the drive if it is going to be a system drive with WCS and OS slots. If there is no drive name loading of . the slots will hang. 5 1/4 & 3 1/2 drives/controllers ___1. 1GB 3.5" disk drive DU111Z (includes a patch kit) ___2. 1.7GB 3.5" disk drive DU110Z ___3. DMA-II controller and cable QJ002A Hardware Dependant On Drive Number Tall Cabinet (add-on) ___1. Drive 1 DV005F Hardware, cables, mounting plate, ACDU, power supply. ___2. Drive 2 DV006Z Hardware, cables, power supply. ___3. Drive 3 DV007Z Hardware, cables, mounting plate, power supply. ___4. Drive 4 DV006Z Hardware, cables, power supply Tall Cabinet (CPU) ___1. Drive 1 DV011Z Hardware, cables, mounting plate, power adapter. ___2. Drive 2 DV012F Hardware, cables, ACDU, power supply. ___3. Drive 3 DV013Z Hardware, cables, mounting plate, power supply. ___4. Drive 4 DV014Z Hardware, cables, power supply. Low Cabinet (add-on) ___1. Drive 1 DV008F Hardware, cables, mounting plate, ACDU, power supply. ___2. Drive 2 DV009Z Hardware, cables, power supply. ___3. Drive 3 DV010Z Hardware, cables, mounting plate, power supply. ___4. Drive 4 DV009Z Hardware, cables, power supply. Low Cabinet (CPU) ___1. Drive 1 DV015Z Hardware, cables, mounting plate, power adapter. ___2. Drive 2 DV016F Hardware, cables, ACDU, power supply. ___3. Drive 3 DV017Z Hardware, cables, mounting plate, power supply. ___4. Drive 4 DV018Z Hardware, cables, power supply. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB199 Pg001 DIVE Volume ID Display/Set-up Unit Number: 16 Device Type : 10 Variance :32 Id Revision: 8.7.10.1 Date Written: ##/##/## Time Written:##:##:## Disk Name : ######## Vendor Id : Fujitsu Product Id : M2694ES-1024 Product Rev.: 000000 Num of Cylinders : 1818 Description Fields: 1 0 0 15 41 1817 5 0 0 Number of Heads : 15 Fmt Sector Cap : 1118070 Blocks per Track : 41 Last Track Sec. : 1115077 Bytes per Block : 1024 Usable Sectors : 1120234 Raw Sector Cap. : 1118070 Usable Blocks : 1120235 Mode Sense/Select Pages: 7800 Drive Mode Page 1: 2100 OS Default: :2500 Format Gap 1: 0 Gap 2 : 0 Step Rate/2-byte : 0 Interleave :1 Write Precomp Cylinder : 0 Number of Tracks per Zone :15 Landing Zone Cylinder : 0 Alternate Tracks per Zone :0 Reduced Write Curnt Cyl: 0 Alternate Sectors per Zone :5 Verify-by-Bytes : F Alternate Tracks per Volume :15 SCSI Commands : D9B0273E04B1011800000000000000000000000000000000000000000000000 Note: # represents user input data DIVE Volume ID Display/Set-up Unit Number: 16 Device Type : 10 Variance : 32 Id Revision: 8.7.10.1 Date Written: ##/##/## Time Written: ##:##:## Disk Name : ######## Vendor Id : SEAGATE Product Id : ST11200N Product Rev : 000000 Num of Cylinders: 1872 Description Fields: 1 0 0 15 41 1817 5 0 0 Number of Heads : 15 Fmt Sector Cap. : 1067040 Blocks per Track: 38 Last Track Sec. : 1067376 Bytes per Block : 1024 Usable Sectors : 1067414 Raw Sector Cap. : 1067040 Usable Blocks : 1067415 Mode Sense/Select Pages: 7800 Drive Mode Page 1: 2100 OS Default: :2500 Format Gap 1: 0 Gap 2 : 0 Step Rate/2-byte : 0 Interleave :1 Write Precomp Cylinder : 0 Number of Tracks per Zone :15 Landing Zone Cylinder : 0 Alternate Tracks per Zone :0 Reduced Write Curnt cyl: 0 Alternate Sectors per Zone :12 Verify-by-Bytes : F Alternate Tracks per Volume :30 SCSI Commands: D9B0273E04B10118000000000000000000000000000000000000000000000000 Note: # represents user input data DIVE Volume ID Display/Set-up Unit Number: 16 Device Type : 10 Variance : 32 Id Revision: 8.7.10.1 Date Written: ##/##/## Time Written: ##:##:## Disk Name : ######## Vendor Id : SEAGATE Product Id : ST11900N Product Rev.: 000000 Num of Cylinders: 2621 Description Fields: 1 0 0 15 41 1817 5 0 0 Number of Heads : 15 Fmt Sector Cap. : 1729860 Blocks per Track: 44 Last Track Sec. : 1729755 Bytes per Block : 1024 Usable Sectors : 1729799 Raw Sector Cap. : 1729860 Usable Blocks : 1729800 Mode Sense/Select Pages: 7800 Drive Mode Page 1: 2100 OS Default: :2500 Format Gap 1 : 0 Gap 2 : 0 Step Rate/2-byte : 0 Interleave: :1 Write Precomp Cylinder : 0 Number of Tracks per Zone :15 Landing Zone Cylinder : 0 Alternate Tracks per Zone :0 Reduced Write Curnt Cyl: 0 Alternate Sectors per Zone :10 Verify-by-Bytes : F Alternate Tracks per Volume :30 SCSI Commands: D9B0273E04B10118000000000000000000000000000000000000000000000000 Note: # represents user input data CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB199 Pg002 JUMPER DESIGNATIONS Seagate ST11900N or ST11200N J2-RES off Reserved J2-DS off Delay Motor Start J2-ME off Enable Motor Start J2-WP off Write Protect J2-PE on Parity Error (all drives) J2-TE on Enable Term (last physical drive only) J2-TP on Term. Power from Drive (last physical drive only all but MPx/AS J2-TP off Term. Power to SCSI Bus NOTE: Term. Power (from SCSI Bus), jumper two outer pins of J2-TP and J2-TP rear most two of J2 selectors. (MPx only). eg: . . . . . . . . for last physical drive on an MPx. | | . . . . . . ._. R D M W P T T T E S E P E E P P S J5-A0 Address Weight 1 \ J5-A1 Address Weight 2 - Use for Drive Address J5-A2 Address Weight 4 / J6-A2 off Address Weight 4 J6-A1 off Address Weight 2 J6-A0 off Address Weight 1 J6-SSP off Sync Spindle (factory setting=on, remove if present) J6-LED off Remote LED J6-RES off Reserved NOTE: The drive address may be set at either J5 or J6(not both). Since the front bezel must be removed to use J6, J5 is the accepted addressing jumper. NOTE: The least significant bit of the SCSI ID "A0", is the front most pair of J5. Fujitsu 2694ESA SW1-1 on SCSI-II cmd level enable SW1-2 off Diag. Mode SW1-3 on Unit attention enable SW1-4 on Resel. retry mode SW1-5 on SCSI parity enable SW1-6 off Sync mode SW1-7 on LED display SW1-8 on Motor start auto enable CNH10-1,2 on Spindle sync enable CNH10-3,4 on Internal enable CNH10-5,6 on External enable CNH11-1,2 A0 Address weight 1 \ CNH11-3,4 A1 Address weight 2 - use for drive address CNH11-5,6 A2 Address weight 4 / CNH11-7,8 on Write enable CNH11-9,10 Factory use only CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB199 Pg003 VID Installation for BOSS/VS (9.7.B and 10.7.B) 1. Follow the normal backup procedures. 2. This procedure applies to M2694ES Fujitsu (400943-001) 1 GB drives only. A utility called "VID" will need to be run on the new drive(s) being in- stalled, after they have been formatted, and before type 3 load Family/ Volume update. 3. After the backup is complete, load the "VID" utility using Saverestore from the tape supplied. 4. Power down the system. 5. Install the new drive(s) in the system. In case of a new boot drive, in- stall the new drive(s) temporary to allow the utility VID to be run. 6. Install the new DMA-II controller and cable if required. 7. Install the drive on the LS-700 power supply using a 907748-001 power cable, or in an external cabinet. Do not remove the existing disk drives at this time, if replacing the boot drive. 8. Bring the system back up and format the drive (see Note 1). Next, run the utility "VID" on the drive. The first prompt will be to "input disk index". Type in the SCSI drive device address. Next, an error message will be displayed "Error: 0.0.0.52 - 00000034 attempted to format enable disk>>". Type a carriage return. The screen will then be updated with new values. Note the value of "Last track sector" which should be 1115077. Type another carriage return to exit the program. If the system has an error while writing the volume label during the type 3 load, then retry this step. 9. Rotate any other additional drives through the previous two steps. 10. If this is a boot drive replacement, then power off the system, and com- plete the upgrade of the disk drives, installing the new drives and hard- ware, and removing the old drives and hardware. Bring the system back up and continue with the restore of the software, using type 2 load. 11. Continue with normal installation of the drives, if this is not a boot drive replacement. NOTE 1: If the disk drive cannot be enabled while running tape format, from the menu run Relocate Track. then go back to the menu and run format. ORIGINATOR: M. SHEHAN CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB199 Pg004 FIB 00200 MAI COMPANY CONFIDENTIAL 06/21/94 *** 1.7GB Disk Drive Patch for BOSS/VS *** UPDATED: 7/20/94 SUBJECT: PATCH 68 FOR 1.7GB DISK ON BOSS/VS AUTHOR: DALE JENSEN TYPE : INFORMATIONAL DATE : 6/20/94 PURPOSE: THIS IS TO INFORM THE FIELD OF PATCH 68, WHICH IS AVAILABLE FOR THE BOSS/VS SYSTEMS WHEN USING A 1.7GB DISK DRIVE. PATCH 68 WAS RELEASED TO RESOLVE PROBLEMS SEEN WITH 1.7GB DISK DRIVE WHEN INSTALLED ON AN BOSS/VS SYSTEMS. THE PATCH CONTAINS 4 PROGRAMS THAT WILL CORRECT PROBLEMS WITH EXCESSIVE SOFT READ ERRORS, RELOCATION OF BAD BLOCKS FAILURE, ENABLE/DISABLE PROBLEMS IN A TYPE 1 LOAD, AND A PROBLEM WRITING THE VOLUME LABEL. FILES RELEASE ON THIS PATCH TAPE ARE : 1. .R7B04.SYS.ROT : THIS IS USED TO RELOCATE SECTORS ON THE DISK. 2. .R7B04.SYS.SETRETRY : THIS PROGRAM WILL ENABLE THE RETRY LOGIC ON ALL SCSI DISK DRIVES. TO EXECUTE THIS PROGRAM, JUST ENTER 'SETRETRY' AT THE COMMAND MODE PROMPT. NO OUTPUT IS SENT TO THE SCREEN AND NO INPUT IS REQUIRED. THIS PROGRAM WILL REDUCE THE SOFT DISK ERRORS BEING REPORTED TO THE ERRORLOG. 3. .R7B04.SYS.UTLFAMILY: THIS PROGRAM WILL ALLOW YOU TO SET UP THE DISK FAMILY INFORMATION AND ENABLE/DISABLE THE FAMILY WITHOUT ANY PROBLEMS. 4. .R7B04.SYS.VID : THIS PROGRAM IS USED TO SET THE VOLUME LABEL INFORMATION FOR THE DISK DRIVE. THIS PROGRAM NEEDS TO BE RUN PRIOR TO SETTING UP THE FAMILY INFORMATION. IF THE VOLUME LABEL HAS NOT BEEN SET UP PREVIOUSLY, YOU WILL BE REQUIRED TO ENTER THE DISK NAME AND THE RAW SECTOR CAPACITY FOR THE DRIVE. THE RAW SECTOR CAPACITY SHOULD BE EQUAL TO THE FORMATTED SECTOR CAPACITY. NOTE 1: WHEN YOU FIRST RUN THIS PROGRAM, AN ERROR '17.5.17.1 CHECKSUM' WILL BE REPORTED TWICE. JUST 'CR' BOTH TIMES THIS ERROR COMES UP. NOTE 2: IF THE DRIVE REPORTS AN ERROR 0.0.0.52, YOU WILL HAVE TO JUST 'CR' AND THEN EXIT THE PROGRAM. THE NEXT TIME YOU RUN IT, YOU WILL NOT GET THE ERROR HOWEVER, NO CHANGES CAN BE MADE TO THE VID. THIS PROGRAM IS USED AFTER THE DRIVE HAS BEEN FORMATTED USING DIVE. THIS PATCH IS BEING SHIPPED WITH ALL NEW 1.7GB DISK DRIVES ORDERED FOR A BOSS/VS SYSTEM AND TO ALL BOSS/VS SITES THAT HAVE PREVIOUSLY BEEN SHIPPED THIS DISK DRIVE. ORIGINATOR: Dale Jensen CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB200 Pg001 FIB 00201 MAI COMPANY CONFIDENTIAL 02/26/96 *** Release R7B Dive Docwriter File *** DIVE User's Guide NOTICE This specification includes original works of authorship and proprietary information protected by copyright and trade secret laws. The Copyright Act of 1976 provides for civil liability and severe criminal penalties for unauthorized copying or disclosure of protected works. Possession and use of this document is restricted and subject to the terms of the MAI Systems Corporation license agreement for this specification ("Agreement"). You shall not publish, reproduce or transmit, in whole or in part, this specification in any form or by any means, whether electronic, mechanical, photographic, or OtherWise. You shall not disclose, or fail to make your best efforts to prevent the inadvertent disclosure of, this document to any third party except to your employees on a need-to-know basis, which employees you shall bind in writing to the terms of the Agreement and be responsible for their compliance therewith. If you fail to act in accordance With this notice and the Agreement, your license to this specification will be immediately and automatically terminated, and you may expose yourself to civil and criminal liability. Copyright 1988, Rev. 1992 by MAI Systems Corporation All rights reserved. MAI and BASIC FOUR are registered trademarks of MAI Systems Corporation. C O N T E N T S 1 REVISION HISTORY. . . . . . . . . . . . . . . . . 2 RELATED DOCUMENTS . . . . . . . . . . . . . . . . 3 PURPOSE . . . . . . . . . . . . . . . . . . . . . 4 FORMATTING OVERVIEW . . . . . . . . . . . . . . . 5 DIVE. . . . . . . . . . . . . . . . . . . . . . . 5.1 Formatting Restrictions . . . . . . . . . . . . 5.1.1 Sacred disk areas . . . . . . . . . . . . . . 5.1.2 Restrictions on DIVE . . . . . . . . . . . . 5.2 Operator Interface . . . . . . . . . . . . . . 5.2.1 Initial Interface . . . . . . . . . . . . . . 5.2.2 Traditional Disk Drives . . . . . . . . . . . 5.2.3 SCSI Disk Drives . . . . . . . . . . . . . . 5.3 Program Termination . . . . . . . . . . . . . . 5.4 Output . . . . . . . . . . . . . . . . . . . . 5.5 Disk Errors and Error Reporting . . . . . . . . 5.5.1 Soft Errors . . . . . . . . . . . . . . . . . 5.5.2 Sector ID Errors . . . . . . . . . . . . . . 5.5.3 Write Errors . . . . . . . . . . . . . . . . 5.5.4 SCSI Disk Errors . . . . . . . . . . . . . . 5.6 Internal Operation . . . . . . . . . . . . . . 5.7 Defects found after the initial format. . . . . 6.0 ROT . . . . . . . . . . . . . . . . . . . . . . A SCSI DISK DRIVE (M280). . . . . . . . . . . . . . B SCSI DISK DRIVE (M380). . . . . . . . . . . . . . CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB201 Pg001 C SCSI DISK DRIVE (M760). . . . . . . . . . . . . . D SCSI DISK DRIVE (P1-17S). . . . . . . . . . . . . 1.0 REVISION HISTORY The following information is maintained in reverse chronological order. - 05/19/92 STEVE WARNER Added Appendix D for the P1-17S VID parameters. - 01/31/91 STEVE WARNER Added a brief description of the ROT program. - 12/17/90 STEVE WARNER Removed "THIS IS A FUTURE PRODUCT" from the M760. Removed tables for the third party drives since they were never implemented. (M169,M93,M126,M59) Added a section expalining how to handle "grown" defects. - 12/01/88 HARRY COMPTON Added vid screen data for the M760 disk drive as a future product. - 9/21/88 HARRY COMPTON Added vid screen data for the M380 disk drive. - 8/17/88 HARRY COMPTON Updated M280 vid screen data. Removed all conflicting references to 'Advanced Series' systems. - 6/24/88 HARRY COMPTON Updated M280 vid screen data. Added 'Advanced Series' system type to document. - 4/30/88 HARRY COMPTON Added comments pertaining to warn users not to interrupt SCSI disk drives during the format procedure. - 3/25/88 DAVID WONG Added comments explaining new feature that allows reading/writing fault map from/to disk or tape. - 3/10/88 DAVID WONG Added comment on possible DIVE abortion due to security ID violation caused by programs trying to access SCSI drive during raw format process. - 12/3/87 DAVID WONG Added more VID screen samples for SCSI third party CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB201 Pg002 drives. Noted that "Sacred disk areas" preservation only applies to traditional disks. - 11/4/87 DAVID WONG Added comments to explain the special case of third party drive standard format. - 10/16/87 DAVID WONG Added comments on "hang" possibility of other programs trying to access SCSI drive when it's formatting. - 10/5/87 DAVID WONG Changed "Raw Sector Cap." to "Raw Block Cap.". Corrected some sample parameters in VID screen. - 09/23/87 DAVID WONG General update. - 08/31/87 DAVID WONG Spelling corrections and recompiled for release of new DOCWRITER. - 08/28/87 DAVID WONG Added more detailed description on SCSI drive format. - 07/29/87 STEVE WARNER First draft. 2.0 RELATED DOCUMENTS 011207 Formatting of BOSS/VS Disks 011278 BOSS/VS Disk Format Specification 011272 Formatting of BOSS/VS Disks Including Track Interaction 011189 BOSS/VS Configuration Control Functional Specification 011211 BOSS/VS System Load Functional Specification 3.0 PURPOSE This document is intended to be a user's guide to the operation of DIVE. DIVE is the disk formatter for MPx and Advanced Series disk drives. However, for interest and clarity, some of the internal operations that occur during a format operation are discussed. Restrictions on formatting as imposed by the system configuration spec are also discussed. Additionally, other formatting "support" programs are described. 4.0 FORMATTING OVERVIEW The formatter program supports two disk formatting schemes. The method used depends upon the controller which is connected to the drive. One disk format operation consists of specifying a head and cylinder and then issuing a "format" command to the disk controller. The disk firmware then CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB201 Pg003 establishes the ID field, data field, and CRC/ECC fields for each sector on the track. The other disk format operation is for the Small Computer System Interface (SCSI). The program issues a single "format" command to the disk controller which is passed to the disk drive over the SCSI bus. The appropriate "format" is the very minimum that must happen before the system can read the disk. Actually, the word "format" is most often used in a much broader sense. It implies not only the above operation but also the certification that the usable disk space is free of media defects. This is accomplished by having the program that does the formatting also do extensive pattern testing and relocation of bad tracks. In the context of this document, "formatting" shall include all of the above. 5.0 DIVE DIVE is an acronym for Disk Initialization, Verification, and Evaluation. This is the primary disk formatter for the MPx and Advanced Series systems. It runs under the regular OS and can be run at any time if it is on the system. 5.1 Formatting Restrictions There are software, hardware, and system security considerations that place some restrictions on what, when, and where a disk may be formatted. These restrictions are heeded by the software so this section is included merely to be explanatory. It is not defining operating procedures. 5.1.1 Sacred disk areas Because certain tracks on a disk may contain highly sensitive information (e.g. configuration records and system serial numbers), the following "read first" axiom will apply to these and only these tracks before any format operation for traditional disk drives: IF THE TRACK IS READABLE AND HAS BEEN INITIALIZED, DO NOT FORMAT IT. OTHERWISE, FORMAT IT. This axiom will insure that: 1) Factory fresh disks that have never been formatted on an MPx or Advanced Series systems will be completely formatted. 2) Disks that have been completely formatted but not initialized can be completely formatted again. 3) Disks that are re-formatted in the field will retain their current system serial number and configuration record. 4) If the configuration record/serial number tracks develop hard errors, they will be formatted. If this is required, the configuration record and system serial number will have to be re-installed. Note that hard errors cannot be intentionally induced. Any CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB201 Pg004 "monkeying" with the encrypted information will be caught by the software checksum. 5.1.2 Restrictions on DIVE DIVE may format a disk satisfying the following conditions only: 1) Any fixed disk that can be disabled by the file system. This will always be a disk that is not currently in use by the file system. (DIVE automatically attempts to disable the selected disk and reports if it cannot do so.) 2) A removable disk if and only if the host system has sufficient priviledge as determined by the system serial number. In addition, the disk must be disabled as in (1) above. 5.2. Operator Interface This section will describe what the user has to do to execute DIVE. It is divided into three sections. The first section is common to all drive types. The second and third sections describe the differences between SCSI drives and the traditional drive types. 5.2.1 Initial Interface When DIVE first comes up, its version number is displayed along with a warning that it will format an entire disk. Next the system time and date are displayed and the user is asked to verify that the date is correct. If it is not correct, it can be entered from the keyboard. Both the date and time are kept in the relocated track summary so it is important that at least the date is correct. If the disk has no readable volume serial number, it must be entered next. If this is a newly formatted disk or track zero has to be formatted for any reason, this number will become the default volume serial number. The next display is a list of all disk drives which are on line. For each drive, the following information is given: 1) The drive number (device index) 2) The board number to which it is attached 3) The board relative device number (either 0 or 1) 4) The unit number (physical address) 5) A short description of the drive The operator selects which disk he wishes to format from this list by entering the drive number. In the event some alien device is connected (one that DIVE does not recognize), that fact will be reported in item 5 above and the program will refuse to format it. Likewise, if removable disks are installed and the system serial number CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB201 Pg005 indicates insufficient privilege to format it, the drive(s) will be displayed in low intensity and the formatter will refuse to format it. At this point the operator interface differs between the traditional and the SCSI drives. Both sections follow below. 5.2.2 Traditional Disk Drives This section applies to the traditional disk drive types. If the operator is formatting a SCSI type disk drive they should proceed to the next section. The operator has an opportunity to create the "VID" (volume I.D.). This information is written to sectors 4 and 7 during the format process. On the traditional drive types this will serve for information only and is not actually used by the system. The operator may answer "No" if he does not want to perform this step. The drive is disabled for formatting and the controller is checked to ascertain whether or not it supports more than one format type (either CRC or ECC). If the controller supports multiple format types, one additional input must be made to select which one. Depending upon the current format state, one of the following three prompts will be presented: 1. Disk is currently formatted with a CRC format. Do you wish to change to ECC format (Y/N) ? 2. Disk is currently formatted with an ECC format. Do you wish to change to a CRC format (Y/N) ? 3. Select ECC or CRC format (E/C) ? Note: Some drives are formatted in ECC format only. On these drive types the operator will not see the third prompt. The third item is the choice presented for disks that have never before been formatted. There is no default for this selection. The operator will then be asked to enter a list of known bad tracks. This list consists mostly of items provided by the manufacturer and, presumably, was obtained by exhaustive diagnostic testing. Under no circumstances should DIVE be depended upon to find all the bad tracks on this list. This list can be entered directly from the keyboard or from a serial file created by the system editor, or by the DIVE or ALTTRACKS program if the disk has been formatted before. After the list is entered, the program performs range checks to insure that all entries are valid and that no track was entered more than once. It also displays all entered tracks and asks the operator to verify that all entries are correct. If the program or the operator detects invalid entries, a "mini-editor" is invoked which allows the operator to rectify the situation. Next, a pre-read of certain tracks is performed and a validity check made for some of the installation parameters. If the CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB201 Pg006 read is successful and the check is satisfied, the operator will be notified that certain tracks WILL NOT be formatted. Conversely, if the read or the check is bad, the operator will be notified that all tracks WILL be formatted. If these tracks are formatted for any reason, the operator will have to supply a volume serial number. Also, an option is given to abort the procedure at this point. A change in the format type (switching ECC/CRC) will also cause formatting of all tracks. If the operator elects to proceed, formatting will commence and run to completion with no further operator intervention. During execution, the program displays what phase of operation it is currently performing. For example, it indicates when it is formatting, writing, or verifying, and also shows the current disk cylinder number. Any I/O errors are displayed with English explanations. Any time an additional bad track is found, the entire bad track list is shown on the screen at the time the relocation is done. If the number of relocated tracks ever exceeds the physical limit, an appropriate message is printed out and the program quits. Just prior to completion, DIVE wraps up by writing the relocated track summary to disk. If it was necessary to format track zero, certain default parameters are also written out to the volume information label. The total number of relocated tracks is printed out to the VDT. The relocated track summary can then be listed to a disk file or a tape file before exiting DIVE, or by running ALTTRACKS after exiting DIVE, and the volume label should be checked by running FAMILY or doing a type 3 load option. The entire format operation takes about one hour per 70 megabytes. 5.2.3 SCSI Disk Drives This section describes the differences in the operator interface for the SCSI disk drives. The program requires more operator interface to make it more flexible in regards to supported drive types. The major difference between the approach to the SCSI disk drives and previous types is where the drive geometry is stored. Previously this information was part of the operating system. On the SCSI the information is stored on the disk drive. Most of this information is available through the SCSI interface with the "Mode Sense" command. On this type of disk the VID must be constructed and written to disk (sectors 4 and 7). There are two types of formatting procedure for SCSI drives in DIVE: standard and non-standard. A standard format procedure automatically sets some key parameters for the drive and requires less user input and is recommended for most uses. A non-standard format procedure is meant for users who have a thorough knowledge of the drives and need to format the drives with various attributes, such as format without manufacturer supplied defects, stop on errors, format with internal certification, etc. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB201 Pg007 Thus the first question asked after the operator selects a SCSI drive to format is "Do you wish to do a standard format (Y/N/Q)?". Either "Y" or "N" will lead to the VID screen where all the format related parameters are shown. Refer to appendix A, B or C for details on the currently known SCSI drive types. The "*" indicates changeable parameters and the "#" indicates non-changeable parameters. The operator uses the motorbars to move through the screen. The operator should refer to the appropriate appendix and use the changeable values shown for the drive type being formatted. At the bottom of the VID screen sits the question "ENTRIES CORRECT (Y/N/Q(uit))". It should be answered after all the necessary changes are made. If this is a non-standard format, the next question will be "Enable the 'Save Parameters' bit in the mode select CDB? Y/N". This is to decide whether the drive should store the parameters in some special area or not. In most cases the answer should be "N". The next prompt is: "Volumn serial number: ". A user selected number should be entered. Then "Do you want to get the fault map from Disk or Tape (Y/N, = N)?", if this is a disk load DIVE, or "Do you want to get the fault map from tape (Y/N, = N)?", if it's a tape load DIVE, prompts for a previously created file of bad sectors. If the file is to come from a disk, a file name will then be requested. If it's from the tape, it can be either in DIVE format or in Intersystem Transport format, and the prompt "Is the file in DIVE or Intersystem Transport tape format (D/I, = I)?" will have to be answered accordingly*. It then prompts for the tape drive number and the file name. The SCSI disks have the fault maps stored on the drives. The Manufacturer's defect (fault) list is recorded permanently on the drive and cannot be changed. The defects which have been added during the life of the drive (grown defects) are also stored on the drive. Both of these lists are retained by the drive during the format process. If the standard format process is always used then these defects will always be preserved on the drive. The grown defects can only be changed using the non-standard format. This is seldom required. Since all the defects are stored on the drive the user will not need to have saved them to tape. At the "defects from tape?" prompt the user should enter the default, = N, and continue. The fault map will be on the disk already and the standard format will use this list. * A fault map file listed at the end of DIVE to a tape is always in DIVE format, while an Intersystem Transport format tape file can be created from a disk file by running the file conversion utility "BQR" followed by "MCSI". DIVE then reads and displays the bad sectors from the file, together with those from the drive's internal defect lists* in "Cylinder, Head, Byte from Index" format and asks "Any corrections to this list (Y/N/Q(uit))?". If the answer is 'Y', it follows with another prompt "A)dd, C)hange, D)elete: ". At this point the operator can add, change or delete items to and from the list. Note however, in the standard format procedure, the operator is free to change and/or delete items CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB201 Pg008 coming from the bad file or those he just entered, but not items coming from the drive's internal defect lists. This is because a standard format, except in the case of a third party drive format, automatically uses all items of the internal defect lists in the formatting, the "deleting" or "changing" of these items from the screen is not really going to delete or exclude them from the formatting process. If the operator tries to delete or change an item from the internal defect lists, he will be warned with the message: "** Warning: standard format does not allow deleting (changing) a defect that is on the drive's internal defect list. to continue...". * Except for the case of the third party drive, standard format procedure. In the case of a third party drive format, the standard format procedure will neither read nor display the internal defect lists since they are not going to be used during the formatting. This means the user either uses the defects coming from the bad file or builds his own defect list by adding one item at a time. He may need to do this even when the drive had been previously formatted with those defects. On the other hand, he won't encounter the problem of not being able to delete/change some items of the list, for the simple reason that none of the items on the list is from the drive's internal defect lists. Once the operator has decided on the defects he wants to map out in the formatting process, he is prompted with the question "Do you want to format drive? Y/N=certification only/W(rite VID)/Q(uit):". An "N" answer will skip the formatting and go directly to the certification phase, a "W" answer will lead to a VID screen and allow the operator to change and write new parameters to drive sector 4 & 7, and a "Y" answer will lead to the display of the "COMMENCING RAW FORMAT" message and the drive, board, device, and unit numbers, followed by the prompts "Dive is about to format your entire disk", ">>>>> Are you READY ??? (Y/N=Quit)?". This is the last minute confirmation with the operator. Once a "Y" is entered, DIVE starts formatting immediately and displays the time elapsed in hour:minute:second format. The actual format time will depend on the drive types. For example, a 280 MB drive will take DIVE about 10 minutes to format. During this period of time, the drive is completely occupied by the format command and any program that tries to access the drive may be hung or cause DIVE to abort with the security ID violation message. WARNING! DO NOT interrupt or reboot during the format operation on SCSI disk drives. This could cause a permanent off-line condition. When the format completes, DIVE will show two columns of parameters. The ones on the left are read from the drive using mode sense command, and those on the right are user inputs prior to the format. Both values should be the same. If not, a "mismatch" message will appear next to the mismatching pair and the program terminates. The program then proceeds to the certification phase. There are nine different patterns that can be used. Each pattern will take about twice as long as the formatting time. During CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB201 Pg009 certification, if unrecoverable errors are found, DIVE will record the bad sectors and reassign them at the end of certification without user intervention. The user will be notified at the end with the message "xxx sectors reassigned". 5.3 Program Termination When all passes have been completed, the program will relocate all areas it has determined to contain errors. A summary of these relocated areas will also be written on the disk beginning at the first sector on the track preceding the relocated track area (which is outside of the domain of the file system). DIVE also offers the operator an opportunity to list all the defects to a disk or a tape file by asking "Do you want to save the fault map to Disk or Tape (D/T, = none)?", when the operator is running a disk load DIVE, or "Do you want to save the fault map to tape (Y/N, = none)?", when in a tape load DIVE. A file name and/or a tape drive number will then have to be entered by the operator. If track 0 was formatted, the program will write a volume label with default values substituted for system dependent values (e.g. sysdump size). Finally, the program will place the disk in an IO format enabled state and a file system disabled state. The disk will then have to be initialized by the FAMILY utility (or a type 3 load) before it can be enabled. 5.4 Output The formatter will provide comprehensive information about the current operations being performed as well as a detailed report on any errors encountered. If a condition arises that renders the disk either unusable or rejectable, a bold and unmistakable message will be printed on the printer and the VDT as to why. Four possibilities are: 1. Number of bad tracks exceeds procurement specification. 2. Track interaction detected on a track that was not identified as a defect by the manufacturer. 3. Number of bad tracks exceeds size of relocated track area. 4. There are too many consecutive ID errors. (This will prevent finding the alternate for this track.) Items 1) and 2) above apply primarily to the receiving/inspection area where disks are deemed acceptable or not. This does not imply that they are unusable. If items 3) or 4) occur, the disk is definitely unusable. 5.5 Disk Errors and Error Reporting During normal execution, writes and verifies encompass an entire track. If an error occurs during the verification process, each sector on the track will be read a maximum of 10 times to break down the error to the sector level. A list of CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB201 Pg010 all bad sectors within the track will be maintained. Any and all errors that occur in a format operation will be reported to the VDT. 5.5.1 Soft Errors A soft error is defined as an error that will not repeat in N retries. Just what value N should assume is purely arbitrary. Also, a soft error on one data pattern may become a repeatable soft or even a hard error on another data pattern. For purposes of formatting and certifying a disk, a conservative approach will be taken. If a given track never has more than one error during the entire formatting operation, it will be treated as soft. Otherwise, it will be treated as a hard error and the track will be relocated. 5.5.2 Sector ID Errors Errors of this type are of particular concern since they interfere with the ability to find a track's alternate. As a part of the single sector reads mentioned at the beginning of this section, a list of all sectors with ID errors will be maintained and printed. Furthermore, the maximum number of consecutive ID errors will be computed and printed out. If at any time the number of consecutive errors exceeds eight (8), the disk will be considered unusable and a conspicuous message reflecting this situation will be printed out. 5.5.3 Write Errors If a write error occurs (which will happen if a permanent bad header exists), then some and possibly all of the track had nothing written to it. If this occurs, the track in question will be reformatted and rewritten. 5.5.4 SCSI Disk Errors The SCSI drive passes back error information to the system. The meaning of these error codes is not consistent between all drive types. The operator should have the specific drive manual available during the format process. The error number is a eight digit number. The upper sixteen bits is the "Sense Key" and the lower sixteen bits is the "Sense Code". The drive manual should have lists with a description of these "Codes". The following errors are some additional errors which can occur: Error: 17.5.17.1 = 11051101 Checksum result (4) - This error indicates that no information was found in sector 4. The formatter will write this information if it is allowed to run to completion. Hit a carriage return to continue. Error: 17.5.17.1 = 11051101 Checksum result (7) - This error indicates that no information was found in sector 7. The formatter will write this information if it is allowed to run to completion. Hit a carriage return to continue. Error: 80100500 SCSI Mode Sense Page 1 result - This error is for information only. It is received on the upgrades which CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB201 Pg011 use the SCSI adapter board. This board does not support this feature of SCSI. Hit carriage return and continue. 5.6 Internal Operation This section is a synopsis of how MPx and Advanced Series disks are formatted. It is included for reader interest only and is not intended to be complete nor a disk format specification. First, a disk is "initialized" by performing a true FORMAT over the entire surface of the disk (excluding hardware diagnostic tracks). This operation establishes the ID fields, sector sizes, data fields, CRC/ECC fields, etc. Until this is done, the disk is neither readable nor writeable by the system. Likewise, disks formatted on other systems are not readable by the MPx or Advanced Series systems. When this operation is complete, the formatter checks the correctness of the list of bad tracks entered from the terminal or from a serial file. Next, the relocated track area is certified and then the known bad tracks are relocated to known good ones. The relocation is done by writing the alternate location (head and cylinder) into the ID field of each sector on the bad track. The disk firmware examines this area on any read/write/verify operation and automatically performs a seek to the new track. If the ID field of a sector is itself unreadable, the firmware examines other sectors of the same track to see if the track is relocated. The probability that all sector ID fields on one track are unreadable is extremely remote. SCSI disks relocate defects a sector at a time. The defect management is handled by the drive. The surface appears to the operator as a continuous surface without defects. When a block is reassigned the drive takes care of the details. Having relocated all known bad areas, the formatter begins a search for any bad areas that may have recently developed or may have not been caught by the manufacturer. It does this by writing and verifying a series of different test patterns. These patterns (in hex notation) are: 1) FFFFFF ..** 2) 010101 ..** 3) 0F0F0F ..** 4) 965965 ..** 5) CB2CB2 ..** 6) AAAAAA ..** 7) FEFEFE ..** 8) DADACA58C2FE ..** 9) 6DB6DB0F ..** where ..** indicates that the pattern is repeated to the end CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB201 Pg012 of the track. Each pattern is written and then verified. Pattern 9 is always the last pattern written and verified. As an example, if three patterns were selected for the verify phase, patterns 7, 8 and 9 would be used. If one pattern was selected then pattern 9 would be used. Any error will result in the offending track being relocated to a known good spare. Since alternate tracks cannot have alternates, bad tracks in the relocated track area will be marked simply as unusable and no track will ever be relocated to them. When the verify operation has completed all test patterns, the relocated track summary is written to disk on the first track just below the relocated track area. On an 18 K byte track, for example, 2300 bad tracks are provided for in the relocated track summary. This is probably a factor of ten more than will ever be needed. This record is initially zero-filled and the entire track written out when formatting is completed. The actual permissible limit is determined by other constraints such as the size of the relocated area. If at any time the actual number of bad tracks exceeds this limit, the formatter will halt with an appropriate message that the disk is unusable and probably needs servicing. The SCSI drive maintains the defect list and the exact location on the surface is not a concern to the operator. At the low end of the disk (usually track zero), certain information about the disk is written that can be accessed only through certain OS modules. This information contains such things as volume serial number, file system area, sysdump area, special shadow area, and the like. Since the format program determines some of the limits in this area, it will partially fill these records with default values that it knows about. This is done only as a convenience and all this information should be checked on a frozen start or by setting the volume label information through the FAMILY utility. The formatter will only write this information if it is not present in the first place. Finally, a freshly formatted disk must be installed as a new family and the directory initialized before it can be enabled by the system. 5.7 Defects found after the initial format The disk drives are initially formatted with DIVE. The defects from the Manufacturer's defect list are reassigned during this process. Additionally, defects which are discovered during the surface analysis are reassigned. The operating system is then installed and the drive is used normally. During the life of the drive new defects occur. These are called "grown" defects. These defects must be corrected by reassigning them to a good track or sector. This is done using the ROT (Relocate one track or sector) program. 6.0 ROT (Relocate one track or sector) ROT is a program which is used to reassign defects after the initial disk format. This section was added to the DIVE document since ROT has no document. New defects are discovered when the operating system reports a persistent disk error with a specific sector. The traditional drives require reassigning the entire track to avoid the defect. The user finds the physical location of the track using the HEADS program. The sector provided by the operating system is input and CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB201 Pg013 the program provides the physical head and cylinder for the defect. This head and cylinder is the input to the ROT program and the track defined by the head and cylinder is reassigned. The SCSI drives are able to reassign a single sector. The logical sector number is provided in the error message from the operating system. This sector number is provided directly to the ROT program and the sector is reassigned. This saves the user one step and simplifies the process. A. SCSI DISK DRIVE (M280) Unit Number: 32 Device Type : 10 Variance : 32 Id Revision: 8.7.10.1 Date Written: Time Written: Disk Name:*?????????? Vendor Id:#MBF-DISK Product Id:#XT-3280 Product Rev.:#42343032 Num of Cylinders:*1224 Descriptor Fields:#5 12 0 15 14 1223 13 0 Number of Heads :*15 Fmt Sector Cap. : 257040 Blocks per Track:*14 Last Track Sec. 0: 254397 Bytes per Block :*1024 Usable Sectors :#254425 Raw Block Cap. :#257040 Usable Blocks :#254426 Mode Sense/Select Pages:#5800 Drive Mode Page 1: 2500 OS Default: 2500 Format Gap 1:#0 Gap 2:#0 Step Rate/2-byte :#92 Interleave:#1 Write Precomp Cylinder :#0 Number of Tracks per Zone :*15 Landing Zone Cylinder :#0 Alternate Tracks per Zone :#0 Reduced Write Curnt Cyl:#0 Alternate Sectors per Zone :*2 Verify-by-Bytes :#F Alternate Tracks per Volume:#2 SCSI Commands:D9B0273E04B101180000000000000000000000000000000000000000 Note: * = changeable field # = not changeable for this drive type B. SCSI DISK DRIVE (M380) Unit Number: 35 Device Type : 10 Variance : 32 Id Revision: 8.7.10.1 Date Written: Time Written: Disk Name:*?????????? Vendor Id:#MBF-DISK Product Id:#XT-8380S Product Rev.:#00000000 Num of Cylinders:*1632 Descriptor Fields:#1 0 0 8 28 1631 43 0 Number of Heads :*8 Fmt Sector Cap. : 365568 Blocks per Track:*28 Last Track Sec. 0: 356065 Bytes per Block :*1024 Usable Sectors :#356093 Raw Block Cap. :#365568 Usable Blocks :#356094 Mode Sense/Select Pages:#7800 Drive Mode Page 1: 2100 OS Default: 2500 Format Gap 1:#0 Gap 2:#0 Step Rate/2-byte :#0 Interleave:#1 Write Precomp Cylinder :#0 Number of Tracks per Zone :*8 Landing Zone Cylinder :#0 Alternate Tracks per Zone :#0 Reduced Write Curnt Cyl:#0 Alternate Sectors per Zone :*5 Verify-by-Bytes :#F Alternate Tracks per Volume:*24 SCSI Commands:D9B0273E04B101180000000000000000000000000000000000000000 CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB201 Pg014 Note: * = changeable field # = not changeable for this drive type C. SCSI DISK DRIVE (M760) Unit Number: 22 Device Type : 10 Variance : 32 Id Revision: 8.7.10.1 Date Written: Time Written: Disk Name:*?????????? Vendor Id:#MBF-DISK Product Id:#XT-8760S Product Rev.:#00000000 Num of Cylinders:*1632 Descriptor Fields:#1 0 0 15 28 1631 26 0 Number of Heads :*15 Fmt Sector Cap. : 685440 Blocks per Track:*28 Last Track Sec. 0: 674761 Bytes per Block :*1024 Usable Sectors :#674789 Raw Block Cap. :#685440 Usable Blocks :#674790 Mode Sense/Select Pages:#7800 Drive Mode Page 1: 2100 OS Default: 2500 Format Gap 1:#0 Gap 2:#0 Step Rate/2-byte :#0 Interleave:#1 Write Precomp Cylinder :#0 Number of Tracks per Zone :*15 Landing Zone Cylinder :#0 Alternate Tracks per Zone :#0 Reduced Write Curnt Cyl:#0 Alternate Sectors per Zone :*5 Verify-by-Bytes :#F Alternate Tracks per Volume:*45 SCSI Commands:D9B0273E04B101180000000000000000000000000000000000000000 Note: * = changeable field # = not changeable for this drive type (continued on next page) D. SCSI DISK DRIVE (P1-17S) Unit Number: 36 Device Type : 10 Variance : 32 Id Revision: 8.7.10.1 Date Written: Time Written: Disk Name:*?????????? Vendor Id:#MBF-DISK Product Id:#P1-17S Product Rev.:#00000000 Num of Cylinders:*1520 Descriptor Fields:#1 0 0 19 54 1519 1 0 Number of Heads :*19 Fmt Sector Cap. : 1559520 Blocks per Track:*54 Last Track Sec. 0: 1560026 Bytes per Block :*1024 Usable Sectors :#1560080 Raw Block Cap. :#1824228 Usable Blocks :#1560081 Mode Sense/Select Pages:#7800 Drive Mode Page 1: 2100 OS Default: 2500 Format Gap 1:#0 Gap 2:#0 Step Rate/2-byte :#0 Interleave:#1 Write Precomp Cylinder :#0 Number of Tracks per Zone :*19 Landing Zone Cylinder :#0 Alternate Tracks per Zone :#0 Reduced Write Curnt Cyl:#0 Alternate Sectors per Zone :*6 Verify-by-Bytes :#F Alternate Tracks per Volume:*0 SCSI Commands:D9B0273E04B101180000000000000000000000000000000000000000 CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB201 Pg015 Note: * = changeable field # = not changeable for this drive type ORIGINATOR: MBF CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB201 Pg016 FIB 00202 MAI COMPANY CONFIDENTIAL 07/23/96 *** 5 GB SCSI 1/4" MTCS - requires DMA II - 003 *** Support for the 5 GB external SCSI 1/4" MTC tape drive requires a new level of firmware on the DMA II which changes the part number to a -003. 917026-003, 5GB EXTERNAL SCSI MTCS -------------------------------------------------------------------------- 400950-004 TDC4220 - Tape drive, external 5 Gigabyte, this is a 2.5 GB drive with data compression ------------------------------------------------------------------ 304000-001 - Terminator, single ended, scsi ------------------------------------------------------------------ 916443-001 - cable, external scsi, 1 meter ------------------------------------------------------------------ 917022-001 - cable, scsi adapter (connector panel & extension cable with receptacle) ------------------------------------------------------------------ 165057-082 - I.C. PROM DMA II *** MAKES -003 DMA II ------------------------------------------------------------------ NOTES: 1. Requires -"003" DMA II (903599-003 or 903741-003). 2. Although the 2 GB drive may be used to boot and install standard MPX/AS O.S. tape, media of a capacity less than 1.0 GB is not recommended for archival use as it may result in a "command reject" error during a compare. Must use "Magnus" (1.0; 1.2; 2.0) tape media for writing on MPx. 3. MPx tested with firmware revision level = 05. 917026-003, 5GB EXTERNAL SCSI MTCS -------------------------------------------------------------------------- 400950-004 TDC4222 - Tape drive, external 5 Gigabyte, this is a 2.5 GB drive with data compression ------------------------------------------------------------------ 304000-001 - Terminator, single ended, scsi ------------------------------------------------------------------ 916443-001 - cable, external scsi, 1 meter ------------------------------------------------------------------ 917022-001 - cable, scsi adapter (connector panel & extension cable with receptacle) ------------------------------------------------------------------ 165057-082 - I.C. PROM DMA II *** MAKES -003 DMA II ------------------------------------------------------------------ NOTES: 1. Requires -"003" DMA II (903599-003 or 903741-003). 2. Although the 5 GB drive may be used to boot and install standard MPX/AS O.S. tape, media of a capacity less than 2.0 GB is not recommended for archival use as it may result in a "command reject" error during a compare. Must use "Magnus" (2.0; 2.5) tape media for writing on MPx. 3. MPx tested with firmware revision level = 07. DMA II REWORK: 903599-002 and 903741-002 Remove prom at location 5C and replace with MAI part number 165057-082. Identify assembly as 903599-003 and 903741-003 respectively. CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB202 Pg001 ORIGINATOR: Ira Leibowitz/Norm Jones CPU-BASIC FOUR-7xxx,8xxx,9xxx,ASxx------------------FIB202 Pg002